[U-Boot] [PATCH 00/14] Gateworks Ventana add support for new boards

[U-Boot] [PATCH 00/14] Gateworks Ventana add support for new boards

[Tim Harvey]

This is a series of minor cleanups and addition of some new boards in the
Gateworks Ventana product family.

Tim Harvey (14):
  imx: ventana: add additional DRAM configurations
  imx: ventana: config: add gzwrite support
  imx: ventana: move mmc_init to common
  imx: ventana: use mmc_root in boot scripts
  imx: ventana: change name of rs232_en to indicate polarity
  imx: ventana: fix hwconfig
  imx: ventana: make OTG VBUS power enable board specific
  imx: ventana: make SD3_VSELECT board specific
  imx: ventana: add EMMC configuration
  drivers: net: add MV88E6xx to Kconfig
  imx: ventana: add GW5904 support
  imx: ventana: add GW560x support
  imx: ventana: add GW5903 support
  imx: ventana: config: add EMMC boot options

 board/gateworks/gw_ventana/README           |  17 +-
 board/gateworks/gw_ventana/common.c         | 553 ++++++++++++++++++++++++++--
 board/gateworks/gw_ventana/common.h         |   6 +-
 board/gateworks/gw_ventana/eeprom.c         |  15 +-
 board/gateworks/gw_ventana/gsc.c            |   4 +
 board/gateworks/gw_ventana/gw_ventana.c     |  95 +++--
 board/gateworks/gw_ventana/gw_ventana_spl.c |  93 +++++
 board/gateworks/gw_ventana/ventana_eeprom.h |   3 +
 configs/gwventana_defconfig                 |  64 ----
 configs/gwventana_emmc_defconfig            |  63 ++++
 configs/gwventana_gw5904_defconfig          |  68 ++++
 configs/gwventana_nand_defconfig            |  64 ++++
 drivers/net/Kconfig                         |  18 +
 include/configs/gw_ventana.h                |  18 +-
 14 files changed, 924 insertions(+), 157 deletions(-)
 delete mode 100644 configs/gwventana_defconfig
 create mode 100644 configs/gwventana_emmc_defconfig
 create mode 100644 configs/gwventana_gw5904_defconfig
 create mode 100644 configs/gwventana_nand_defconfig

-- 
2.7.4

[U-Boot] [PATCH 01/14] imx: ventana: add additional DRAM configurations

[Tim Harvey]

- 64bit 8gB density (4GiB) IMX6DQ
- 64bit 4gB density (2GiB) IMX6SDL

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana_spl.c | 45 +++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index b610e06..8cc2a57 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -355,6 +355,25 @@ static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = {
 	.p1_mpwrdlctl = 0X40304239,
 };
 
+static struct mx6_mmdc_calibration mx6sdl_256x64_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x0048004A,
+	.p0_mpwldectrl1 = 0x003F004A,
+	.p1_mpwldectrl0 = 0x001E0028,
+	.p1_mpwldectrl1 = 0x002C0043,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0 = 0x02250219,
+	.p0_mpdgctrl1 = 0x01790202,
+	.p1_mpdgctrl0 = 0x02080208,
+	.p1_mpdgctrl1 = 0x016C0175,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl = 0x4A4C4D4C,
+	.p1_mprddlctl = 0x494C4A48,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl = 0x403F3437,
+	.p1_mpwrdlctl = 0x383A3930,
+};
+
 static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
 	/* write leveling calibration determine */
 	.p0_mpwldectrl0 = 0x002A0025,
@@ -368,6 +387,25 @@ static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
 	.p0_mpwrdlctl = 0x303E3C36,
 };
 
+static struct mx6_mmdc_calibration mx6dq_512x64_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x00230020,
+	.p0_mpwldectrl1 = 0x002F002A,
+	.p1_mpwldectrl0 = 0x001D0027,
+	.p1_mpwldectrl1 = 0x00100023,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0 = 0x03250339,
+	.p0_mpdgctrl1 = 0x031C0316,
+	.p1_mpdgctrl0 = 0x03210331,
+	.p1_mpdgctrl1 = 0x031C025A,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl = 0x40373C40,
+	.p1_mprddlctl = 0x3A373646,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl = 0x2E353933,
+	.p1_mpwrdlctl = 0x3C2F3F35,
+};
+
 static void spl_dram_init(int width, int size_mb, int board_model)
 {
 	struct mx6_ddr3_cfg *mem = NULL;
@@ -468,7 +506,14 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 		mem = &mt41k256m16ha_125;
 		if (is_cpu_type(MXC_CPU_MX6Q))
 			calib = &mx6dq_256x64_mmdc_calib;
+		else
+			calib = &mx6sdl_256x64_mmdc_calib;
 		debug("4gB density\n");
+	} else if (width == 64 && size_mb == 4096) {
+		mem = &mt41k512m16ha_125;
+		if (is_cpu_type(MXC_CPU_MX6Q))
+			calib = &mx6dq_512x64_mmdc_calib;
+		debug("8gB density\n");
 	}
 
 	if (!(mem && calib)) {
-- 
2.7.4

[U-Boot] [PATCH 01/14] imx: ventana: add additional DRAM configurations

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> - 64bit 8gB density (4GiB) IMX6DQ
> - 64bit 4gB density (2GiB) IMX6SDL
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/gw_ventana_spl.c | 45 +++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
> 
> diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
> index b610e06..8cc2a57 100644
> --- a/board/gateworks/gw_ventana/gw_ventana_spl.c
> +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
> @@ -355,6 +355,25 @@ static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = {
>  	.p1_mpwrdlctl = 0X40304239,
>  };
>  
> +static struct mx6_mmdc_calibration mx6sdl_256x64_mmdc_calib = {
> +	/* write leveling calibration determine */
> +	.p0_mpwldectrl0 = 0x0048004A,
> +	.p0_mpwldectrl1 = 0x003F004A,
> +	.p1_mpwldectrl0 = 0x001E0028,
> +	.p1_mpwldectrl1 = 0x002C0043,
> +	/* Read DQS Gating calibration */
> +	.p0_mpdgctrl0 = 0x02250219,
> +	.p0_mpdgctrl1 = 0x01790202,
> +	.p1_mpdgctrl0 = 0x02080208,
> +	.p1_mpdgctrl1 = 0x016C0175,
> +	/* Read Calibration: DQS delay relative to DQ read access */
> +	.p0_mprddlctl = 0x4A4C4D4C,
> +	.p1_mprddlctl = 0x494C4A48,
> +	/* Write Calibration: DQ/DM delay relative to DQS write access */
> +	.p0_mpwrdlctl = 0x403F3437,
> +	.p1_mpwrdlctl = 0x383A3930,
> +};
> +
>  static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
>  	/* write leveling calibration determine */
>  	.p0_mpwldectrl0 = 0x002A0025,
> @@ -368,6 +387,25 @@ static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
>  	.p0_mpwrdlctl = 0x303E3C36,
>  };
>  
> +static struct mx6_mmdc_calibration mx6dq_512x64_mmdc_calib = {
> +	/* write leveling calibration determine */
> +	.p0_mpwldectrl0 = 0x00230020,
> +	.p0_mpwldectrl1 = 0x002F002A,
> +	.p1_mpwldectrl0 = 0x001D0027,
> +	.p1_mpwldectrl1 = 0x00100023,
> +	/* Read DQS Gating calibration */
> +	.p0_mpdgctrl0 = 0x03250339,
> +	.p0_mpdgctrl1 = 0x031C0316,
> +	.p1_mpdgctrl0 = 0x03210331,
> +	.p1_mpdgctrl1 = 0x031C025A,
> +	/* Read Calibration: DQS delay relative to DQ read access */
> +	.p0_mprddlctl = 0x40373C40,
> +	.p1_mprddlctl = 0x3A373646,
> +	/* Write Calibration: DQ/DM delay relative to DQS write access */
> +	.p0_mpwrdlctl = 0x2E353933,
> +	.p1_mpwrdlctl = 0x3C2F3F35,
> +};
> +
>  static void spl_dram_init(int width, int size_mb, int board_model)
>  {
>  	struct mx6_ddr3_cfg *mem = NULL;
> @@ -468,7 +506,14 @@ static void spl_dram_init(int width, int size_mb, int board_model)
>  		mem = &mt41k256m16ha_125;
>  		if (is_cpu_type(MXC_CPU_MX6Q))
>  			calib = &mx6dq_256x64_mmdc_calib;
> +		else
> +			calib = &mx6sdl_256x64_mmdc_calib;
>  		debug("4gB density\n");
> +	} else if (width == 64 && size_mb == 4096) {
> +		mem = &mt41k512m16ha_125;
> +		if (is_cpu_type(MXC_CPU_MX6Q))
> +			calib = &mx6dq_512x64_mmdc_calib;
> +		debug("8gB density\n");
>  	}
>  
>  	if (!(mem && calib)) {
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 02/14] imx: ventana: config: add gzwrite support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 24e3150..31b3010 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -143,6 +143,7 @@
 #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
 #define CONFIG_CMD_GSC
 #define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
+#define CONFIG_CMD_UNZIP         /* gzwrite */
 #define CONFIG_RBTREE
 
 /* Ethernet support */
-- 
2.7.4

[U-Boot] [PATCH 02/14] imx: ventana: config: add gzwrite support

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  include/configs/gw_ventana.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
> index 24e3150..31b3010 100644
> --- a/include/configs/gw_ventana.h
> +++ b/include/configs/gw_ventana.h
> @@ -143,6 +143,7 @@
>  #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
>  #define CONFIG_CMD_GSC
>  #define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
> +#define CONFIG_CMD_UNZIP         /* gzwrite */
>  #define CONFIG_RBTREE
>  
>  /* Ethernet support */
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 03/14] imx: ventana: move mmc_init to common

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c     | 35 +++++++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/gw_ventana.c | 33 -------------------------------
 2 files changed, 35 insertions(+), 33 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 4065c56..eb14cb7 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -6,10 +6,12 @@
  * SPDX-License-Identifier: GPL-2.0+
  */
 
+#include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/mxc_i2c.h>
+#include <fsl_esdhc.h>
 #include <hwconfig.h>
 #include <power/pmic.h>
 #include <power/ltc3676_pmic.h>
@@ -35,6 +37,17 @@ void setup_iomux_uart(void)
 	SETUP_IOMUX_PADS(uart2_pads);
 }
 
+/* MMC */
+static iomux_v3_cfg_t const usdhc3_pads[] = {
+	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
 /* I2C1: GSC */
 static struct i2c_pads_info mx6q_i2c_pad_info0 = {
 	.scl = {
@@ -964,3 +977,25 @@ void setup_pmic(void)
 		}
 	}
 }
+
+#ifdef CONFIG_FSL_ESDHC
+static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
+
+int board_mmc_init(bd_t *bis)
+{
+	/* Only one USDHC controller on Ventana */
+	SETUP_IOMUX_PADS(usdhc3_pads);
+	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+	usdhc_cfg.max_bus_width = 4;
+
+	return fsl_esdhc_initialize(bis, &usdhc_cfg);
+}
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	/* Card Detect */
+	gpio_request(GP_SD3_CD, "sd_cd");
+	gpio_direction_input(GP_SD3_CD);
+	return !gpio_get_value(GP_SD3_CD);
+}
+#endif /* CONFIG_FSL_ESDHC */
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 5d871ce..ba648f5 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -52,17 +52,6 @@ struct ventana_board_info ventana_info;
 
 static int board_type;
 
-/* MMC */
-static iomux_v3_cfg_t const usdhc3_pads[] = {
-	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-
 /* ENET */
 static iomux_v3_cfg_t const enet_pads[] = {
 	IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
@@ -193,28 +182,6 @@ int board_ehci_power(int port, int on)
 }
 #endif /* CONFIG_USB_EHCI_MX6 */
 
-#ifdef CONFIG_FSL_ESDHC
-static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-	/* Card Detect */
-	gpio_request(GP_SD3_CD, "sd_cd");
-	gpio_direction_input(GP_SD3_CD);
-	return !gpio_get_value(GP_SD3_CD);
-}
-
-int board_mmc_init(bd_t *bis)
-{
-	/* Only one USDHC controller on Ventana */
-	SETUP_IOMUX_PADS(usdhc3_pads);
-	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg.max_bus_width = 4;
-
-	return fsl_esdhc_initialize(bis, &usdhc_cfg);
-}
-#endif /* CONFIG_FSL_ESDHC */
-
 #ifdef CONFIG_MXC_SPI
 iomux_v3_cfg_t const ecspi1_pads[] = {
 	/* SS1 */
-- 
2.7.4

[U-Boot] [PATCH 03/14] imx: ventana: move mmc_init to common

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c     | 35 +++++++++++++++++++++++++++++++++
>  board/gateworks/gw_ventana/gw_ventana.c | 33 -------------------------------
>  2 files changed, 35 insertions(+), 33 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index 4065c56..eb14cb7 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -6,10 +6,12 @@
>   * SPDX-License-Identifier: GPL-2.0+
>   */
>  
> +#include <asm/arch/clock.h>
>  #include <asm/arch/mx6-pins.h>
>  #include <asm/arch/sys_proto.h>
>  #include <asm/gpio.h>
>  #include <asm/imx-common/mxc_i2c.h>
> +#include <fsl_esdhc.h>
>  #include <hwconfig.h>
>  #include <power/pmic.h>
>  #include <power/ltc3676_pmic.h>
> @@ -35,6 +37,17 @@ void setup_iomux_uart(void)
>  	SETUP_IOMUX_PADS(uart2_pads);
>  }
>  
> +/* MMC */
> +static iomux_v3_cfg_t const usdhc3_pads[] = {
> +	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +};
> +
>  /* I2C1: GSC */
>  static struct i2c_pads_info mx6q_i2c_pad_info0 = {
>  	.scl = {
> @@ -964,3 +977,25 @@ void setup_pmic(void)
>  		}
>  	}
>  }
> +
> +#ifdef CONFIG_FSL_ESDHC
> +static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
> +
> +int board_mmc_init(bd_t *bis)
> +{
> +	/* Only one USDHC controller on Ventana */
> +	SETUP_IOMUX_PADS(usdhc3_pads);
> +	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +	usdhc_cfg.max_bus_width = 4;
> +
> +	return fsl_esdhc_initialize(bis, &usdhc_cfg);
> +}
> +
> +int board_mmc_getcd(struct mmc *mmc)
> +{
> +	/* Card Detect */
> +	gpio_request(GP_SD3_CD, "sd_cd");
> +	gpio_direction_input(GP_SD3_CD);
> +	return !gpio_get_value(GP_SD3_CD);
> +}
> +#endif /* CONFIG_FSL_ESDHC */
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 5d871ce..ba648f5 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -52,17 +52,6 @@ struct ventana_board_info ventana_info;
>  
>  static int board_type;
>  
> -/* MMC */
> -static iomux_v3_cfg_t const usdhc3_pads[] = {
> -	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -	IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> -};
> -
>  /* ENET */
>  static iomux_v3_cfg_t const enet_pads[] = {
>  	IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
> @@ -193,28 +182,6 @@ int board_ehci_power(int port, int on)
>  }
>  #endif /* CONFIG_USB_EHCI_MX6 */
>  
> -#ifdef CONFIG_FSL_ESDHC
> -static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
> -
> -int board_mmc_getcd(struct mmc *mmc)
> -{
> -	/* Card Detect */
> -	gpio_request(GP_SD3_CD, "sd_cd");
> -	gpio_direction_input(GP_SD3_CD);
> -	return !gpio_get_value(GP_SD3_CD);
> -}
> -
> -int board_mmc_init(bd_t *bis)
> -{
> -	/* Only one USDHC controller on Ventana */
> -	SETUP_IOMUX_PADS(usdhc3_pads);
> -	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> -	usdhc_cfg.max_bus_width = 4;
> -
> -	return fsl_esdhc_initialize(bis, &usdhc_cfg);
> -}
> -#endif /* CONFIG_FSL_ESDHC */
> -
>  #ifdef CONFIG_MXC_SPI
>  iomux_v3_cfg_t const ecspi1_pads[] = {
>  	/* SS1 */
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 04/14] imx: ventana: use mmc_root in boot scripts

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 31b3010..d51bcc9 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -296,14 +296,14 @@
 		"fi\0" \
 	\
 	"uimage=uImage\0" \
-	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
+	"mmc_root=mmcblk0p1\0" \
 	"mmc_boot=" \
 		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
 		"mmc dev ${disk} && mmc rescan && " \
 		"setenv dtype mmc; run loadscript; " \
 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
 			"setenv bootargs console=${console},${baudrate} " \
-				"root=/dev/mmcblk0p1 rootfstype=${fs} " \
+				"root=/dev/${mmc_root} rootfstype=${fs} " \
 				"rootwait rw ${video} ${extra}; " \
 			"if run loadfdt; then " \
 				"bootm ${loadaddr} - ${fdt_addr}; " \
-- 
2.7.4

[U-Boot] [PATCH 04/14] imx: ventana: use mmc_root in boot scripts

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  include/configs/gw_ventana.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
> index 31b3010..d51bcc9 100644
> --- a/include/configs/gw_ventana.h
> +++ b/include/configs/gw_ventana.h
> @@ -296,14 +296,14 @@
>  		"fi\0" \
>  	\
>  	"uimage=uImage\0" \
> -	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
> +	"mmc_root=mmcblk0p1\0" \
>  	"mmc_boot=" \
>  		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
>  		"mmc dev ${disk} && mmc rescan && " \
>  		"setenv dtype mmc; run loadscript; " \
>  		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
>  			"setenv bootargs console=${console},${baudrate} " \
> -				"root=/dev/mmcblk0p1 rootfstype=${fs} " \
> +				"root=/dev/${mmc_root} rootfstype=${fs} " \
>  				"rootwait rw ${video} ${extra}; " \
>  			"if run loadfdt; then " \
>  				"bootm ${loadaddr} - ${fdt_addr}; " \
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 05/14] imx: ventana: change name of rs232_en to indicate polarity

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index eb14cb7..49d6e52 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -738,7 +738,7 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 
 	/* RS232_EN# */
 	if (gpio_cfg[board].rs232_en) {
-		gpio_request(gpio_cfg[board].rs232_en, "rs232_en");
+		gpio_request(gpio_cfg[board].rs232_en, "rs232_en#");
 		gpio_direction_output(gpio_cfg[board].rs232_en, 0);
 	}
 
-- 
2.7.4

[U-Boot] [PATCH 05/14] imx: ventana: change name of rs232_en to indicate polarity

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index eb14cb7..49d6e52 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -738,7 +738,7 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  
>  	/* RS232_EN# */
>  	if (gpio_cfg[board].rs232_en) {
> -		gpio_request(gpio_cfg[board].rs232_en, "rs232_en");
> +		gpio_request(gpio_cfg[board].rs232_en, "rs232_en#");
>  		gpio_direction_output(gpio_cfg[board].rs232_en, 0);
>  	}
>  
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 06/14] imx: ventana: fix hwconfig

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/gw_ventana.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index ba648f5..22a3c8e 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -739,7 +739,7 @@ int misc_init_r(void)
 
 	/* Set a non-initialized hwconfig based on board configuration */
 	if (!strcmp(getenv("hwconfig"), "_UNKNOWN_")) {
-		sprintf(buf, "hwconfig=");
+		buf[0] = 0;
 		if (gpio_cfg[board_type].rs232_en)
 			strcat(buf, "rs232;");
 		for (i = 0; i < gpio_cfg[board_type].dio_num; i++) {
-- 
2.7.4

[U-Boot] [PATCH 06/14] imx: ventana: fix hwconfig

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/gw_ventana.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index ba648f5..22a3c8e 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -739,7 +739,7 @@ int misc_init_r(void)
>  
>  	/* Set a non-initialized hwconfig based on board configuration */
>  	if (!strcmp(getenv("hwconfig"), "_UNKNOWN_")) {
> -		sprintf(buf, "hwconfig=");
> +		buf[0] = 0;
>  		if (gpio_cfg[board_type].rs232_en)
>  			strcat(buf, "rs232;");
>  		for (i = 0; i < gpio_cfg[board_type].dio_num; i++) {
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 07/14] imx: ventana: make OTG VBUS power enable board specific

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c     | 16 ++++++++++++----
 board/gateworks/gw_ventana/common.h     |  2 +-
 board/gateworks/gw_ventana/gw_ventana.c |  8 +++++---
 3 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 49d6e52..a33c112 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -586,6 +586,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs485en = IMX_GPIO_NR(3, 24),
 		.dioi2c_en = IMX_GPIO_NR(4,  5),
 		.pcie_sson = IMX_GPIO_NR(1, 20),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 
 	/* GW51xx */
@@ -604,6 +605,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.gps_shdn = IMX_GPIO_NR(1, 2),
 		.vidin_en = IMX_GPIO_NR(5, 20),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 
 	/* GW52xx */
@@ -626,6 +628,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 
 	/* GW53xx */
@@ -647,6 +650,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 
 	/* GW54xx */
@@ -670,6 +674,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(5, 17),
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 
 	/* GW551x */
@@ -715,6 +720,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.pcie_rst = IMX_GPIO_NR(1, 0),
 		.vidin_en = IMX_GPIO_NR(5, 20),
 		.wdis = IMX_GPIO_NR(7, 12),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 };
 
@@ -725,10 +731,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 	/* iomux common to all Ventana boards */
 	SETUP_IOMUX_PADS(gw_gpio_pads);
 
-	/* OTG power off */
-	gpio_request(GP_USB_OTG_PWR, "usbotg_pwr");
-	gpio_direction_output(GP_USB_OTG_PWR, 0);
-
 	if (board >= GW_UNKNOWN)
 		return;
 
@@ -818,6 +820,12 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_direction_output(gpio_cfg[board].wdis, 1);
 	}
 
+	/* OTG power off */
+	if (gpio_cfg[board].otgpwr_en) {
+		gpio_request(gpio_cfg[board].otgpwr_en, "usbotg_pwr");
+		gpio_direction_output(gpio_cfg[board].otgpwr_en, 0);
+	}
+
 	/* sense vselect pin to see if we support uhs-i */
 	gpio_request(GP_SD3_VSELECT, "sd3_vselect");
 	gpio_direction_input(GP_SD3_VSELECT);
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 3d7aff1..6939233 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -13,7 +13,6 @@
 
 /* GPIO's common to all baseboards */
 #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
-#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
 #define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
@@ -79,6 +78,7 @@ struct ventana {
 	int wdis;
 	int msata_en;
 	int rs232_en;
+	int otgpwr_en;
 	/* various features */
 	bool usd_vsel;
 };
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 22a3c8e..3f9d2f7 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -175,9 +175,11 @@ int board_ehci_hcd_init(int port)
 
 int board_ehci_power(int port, int on)
 {
-	if (port)
-		return 0;
-	gpio_set_value(GP_USB_OTG_PWR, on);
+	/* enable OTG VBUS */
+	if (!port && board_type < GW_UNKNOWN) {
+		if (gpio_cfg[board_type].otgpwr_en)
+			gpio_set_value(gpio_cfg[board_type].otgpwr_en, on);
+	}
 	return 0;
 }
 #endif /* CONFIG_USB_EHCI_MX6 */
-- 
2.7.4

[U-Boot] [PATCH 07/14] imx: ventana: make OTG VBUS power enable board specific

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c     | 16 ++++++++++++----
>  board/gateworks/gw_ventana/common.h     |  2 +-
>  board/gateworks/gw_ventana/gw_ventana.c |  8 +++++---
>  3 files changed, 18 insertions(+), 8 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index 49d6e52..a33c112 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -586,6 +586,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.rs485en = IMX_GPIO_NR(3, 24),
>  		.dioi2c_en = IMX_GPIO_NR(4,  5),
>  		.pcie_sson = IMX_GPIO_NR(1, 20),
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  
>  	/* GW51xx */
> @@ -604,6 +605,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.gps_shdn = IMX_GPIO_NR(1, 2),
>  		.vidin_en = IMX_GPIO_NR(5, 20),
>  		.wdis = IMX_GPIO_NR(7, 12),
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  
>  	/* GW52xx */
> @@ -626,6 +628,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.wdis = IMX_GPIO_NR(7, 12),
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  
>  	/* GW53xx */
> @@ -647,6 +650,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.wdis = IMX_GPIO_NR(7, 12),
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  
>  	/* GW54xx */
> @@ -670,6 +674,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.wdis = IMX_GPIO_NR(5, 17),
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  
>  	/* GW551x */
> @@ -715,6 +720,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.pcie_rst = IMX_GPIO_NR(1, 0),
>  		.vidin_en = IMX_GPIO_NR(5, 20),
>  		.wdis = IMX_GPIO_NR(7, 12),
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  };
>  
> @@ -725,10 +731,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  	/* iomux common to all Ventana boards */
>  	SETUP_IOMUX_PADS(gw_gpio_pads);
>  
> -	/* OTG power off */
> -	gpio_request(GP_USB_OTG_PWR, "usbotg_pwr");
> -	gpio_direction_output(GP_USB_OTG_PWR, 0);
> -
>  	if (board >= GW_UNKNOWN)
>  		return;
>  
> @@ -818,6 +820,12 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  		gpio_direction_output(gpio_cfg[board].wdis, 1);
>  	}
>  
> +	/* OTG power off */
> +	if (gpio_cfg[board].otgpwr_en) {
> +		gpio_request(gpio_cfg[board].otgpwr_en, "usbotg_pwr");
> +		gpio_direction_output(gpio_cfg[board].otgpwr_en, 0);
> +	}
> +
>  	/* sense vselect pin to see if we support uhs-i */
>  	gpio_request(GP_SD3_VSELECT, "sd3_vselect");
>  	gpio_direction_input(GP_SD3_VSELECT);
> diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
> index 3d7aff1..6939233 100644
> --- a/board/gateworks/gw_ventana/common.h
> +++ b/board/gateworks/gw_ventana/common.h
> @@ -13,7 +13,6 @@
>  
>  /* GPIO's common to all baseboards */
>  #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
> -#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
>  #define GP_SD3_CD	IMX_GPIO_NR(7, 0)
>  #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
>  #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
> @@ -79,6 +78,7 @@ struct ventana {
>  	int wdis;
>  	int msata_en;
>  	int rs232_en;
> +	int otgpwr_en;
>  	/* various features */
>  	bool usd_vsel;
>  };
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 22a3c8e..3f9d2f7 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -175,9 +175,11 @@ int board_ehci_hcd_init(int port)
>  
>  int board_ehci_power(int port, int on)
>  {
> -	if (port)
> -		return 0;
> -	gpio_set_value(GP_USB_OTG_PWR, on);
> +	/* enable OTG VBUS */
> +	if (!port && board_type < GW_UNKNOWN) {
> +		if (gpio_cfg[board_type].otgpwr_en)
> +			gpio_set_value(gpio_cfg[board_type].otgpwr_en, on);
> +	}
>  	return 0;
>  }
>  #endif /* CONFIG_USB_EHCI_MX6 */
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 08/14] imx: ventana: make SD3_VSELECT board specific

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c | 30 +++++++++++++++++-------------
 board/gateworks/gw_ventana/common.h |  2 +-
 2 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index a33c112..3dc5f88 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -143,12 +143,6 @@ void setup_ventana_i2c(void)
  * Baseboard specific GPIO
  */
 
-/* common to add baseboards */
-static iomux_v3_cfg_t const gw_gpio_pads[] = {
-	/* SD3_VSELECT */
-	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
-};
-
 /* prototype */
 static iomux_v3_cfg_t const gwproto_gpio_pads[] = {
 	/* RS232_EN# */
@@ -196,6 +190,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
+	/* SD3_VSELECT */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 	/* RS232_EN# */
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
 	/* MSATA_EN */
@@ -229,6 +225,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
+	/* SD3_VSELECT */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 	/* RS232_EN# */
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
 	/* MSATA_EN */
@@ -262,6 +260,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
+	/* SD3_VSELECT */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 	/* RS232_EN# */
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
 	/* MSATA_EN */
@@ -338,11 +338,12 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
+	/* SD3_VSELECT */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 	/* PANLEDG# */
 	IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
 	/* PANLEDR# */
 	IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
-
 	/* VID_PWR */
 	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
 	/* PCI_RST# */
@@ -629,6 +630,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.vsel_pin = IMX_GPIO_NR(6, 14),
 	},
 
 	/* GW53xx */
@@ -651,6 +653,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.vsel_pin = IMX_GPIO_NR(6, 14),
 	},
 
 	/* GW54xx */
@@ -675,6 +678,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.msata_en = GP_MSATA_SEL,
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.vsel_pin = IMX_GPIO_NR(6, 14),
 	},
 
 	/* GW551x */
@@ -721,6 +725,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.vidin_en = IMX_GPIO_NR(5, 20),
 		.wdis = IMX_GPIO_NR(7, 12),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.vsel_pin = IMX_GPIO_NR(6, 14),
 	},
 };
 
@@ -728,9 +733,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 {
 	int i;
 
-	/* iomux common to all Ventana boards */
-	SETUP_IOMUX_PADS(gw_gpio_pads);
-
 	if (board >= GW_UNKNOWN)
 		return;
 
@@ -827,9 +829,11 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 	}
 
 	/* sense vselect pin to see if we support uhs-i */
-	gpio_request(GP_SD3_VSELECT, "sd3_vselect");
-	gpio_direction_input(GP_SD3_VSELECT);
-	gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT);
+	if (gpio_cfg[board].vsel_pin) {
+		gpio_request(gpio_cfg[board].vsel_pin, "sd3_vselect");
+		gpio_direction_input(gpio_cfg[board].vsel_pin);
+		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
+	}
 }
 
 /* setup GPIO pinmux and default configuration per baseboard and env */
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 6939233..18909a0 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -16,7 +16,6 @@
 #define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
-#define GP_SD3_VSELECT	IMX_GPIO_NR(6, 14)
 
 #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
 	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
@@ -79,6 +78,7 @@ struct ventana {
 	int msata_en;
 	int rs232_en;
 	int otgpwr_en;
+	int vsel_pin;
 	/* various features */
 	bool usd_vsel;
 };
-- 
2.7.4

[U-Boot] [PATCH 08/14] imx: ventana: make SD3_VSELECT board specific

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c | 30 +++++++++++++++++-------------
>  board/gateworks/gw_ventana/common.h |  2 +-
>  2 files changed, 18 insertions(+), 14 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index a33c112..3dc5f88 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -143,12 +143,6 @@ void setup_ventana_i2c(void)
>   * Baseboard specific GPIO
>   */
>  
> -/* common to add baseboards */
> -static iomux_v3_cfg_t const gw_gpio_pads[] = {
> -	/* SD3_VSELECT */
> -	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
> -};
> -
>  /* prototype */
>  static iomux_v3_cfg_t const gwproto_gpio_pads[] = {
>  	/* RS232_EN# */
> @@ -196,6 +190,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
>  };
>  
>  static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
> +	/* SD3_VSELECT */
> +	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
>  	/* RS232_EN# */
>  	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
>  	/* MSATA_EN */
> @@ -229,6 +225,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
>  };
>  
>  static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
> +	/* SD3_VSELECT */
> +	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
>  	/* RS232_EN# */
>  	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
>  	/* MSATA_EN */
> @@ -262,6 +260,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
>  };
>  
>  static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
> +	/* SD3_VSELECT */
> +	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
>  	/* RS232_EN# */
>  	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
>  	/* MSATA_EN */
> @@ -338,11 +338,12 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
>  };
>  
>  static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
> +	/* SD3_VSELECT */
> +	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
>  	/* PANLEDG# */
>  	IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
>  	/* PANLEDR# */
>  	IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
> -
>  	/* VID_PWR */
>  	IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
>  	/* PCI_RST# */
> @@ -629,6 +630,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
> +		.vsel_pin = IMX_GPIO_NR(6, 14),
>  	},
>  
>  	/* GW53xx */
> @@ -651,6 +653,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
> +		.vsel_pin = IMX_GPIO_NR(6, 14),
>  	},
>  
>  	/* GW54xx */
> @@ -675,6 +678,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.msata_en = GP_MSATA_SEL,
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
> +		.vsel_pin = IMX_GPIO_NR(6, 14),
>  	},
>  
>  	/* GW551x */
> @@ -721,6 +725,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.vidin_en = IMX_GPIO_NR(5, 20),
>  		.wdis = IMX_GPIO_NR(7, 12),
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
> +		.vsel_pin = IMX_GPIO_NR(6, 14),
>  	},
>  };
>  
> @@ -728,9 +733,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  {
>  	int i;
>  
> -	/* iomux common to all Ventana boards */
> -	SETUP_IOMUX_PADS(gw_gpio_pads);
> -
>  	if (board >= GW_UNKNOWN)
>  		return;
>  
> @@ -827,9 +829,11 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  	}
>  
>  	/* sense vselect pin to see if we support uhs-i */
> -	gpio_request(GP_SD3_VSELECT, "sd3_vselect");
> -	gpio_direction_input(GP_SD3_VSELECT);
> -	gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT);
> +	if (gpio_cfg[board].vsel_pin) {
> +		gpio_request(gpio_cfg[board].vsel_pin, "sd3_vselect");
> +		gpio_direction_input(gpio_cfg[board].vsel_pin);
> +		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
> +	}
>  }
>  
>  /* setup GPIO pinmux and default configuration per baseboard and env */
> diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
> index 6939233..18909a0 100644
> --- a/board/gateworks/gw_ventana/common.h
> +++ b/board/gateworks/gw_ventana/common.h
> @@ -16,7 +16,6 @@
>  #define GP_SD3_CD	IMX_GPIO_NR(7, 0)
>  #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
>  #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
> -#define GP_SD3_VSELECT	IMX_GPIO_NR(6, 14)
>  
>  #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
>  	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
> @@ -79,6 +78,7 @@ struct ventana {
>  	int msata_en;
>  	int rs232_en;
>  	int otgpwr_en;
> +	int vsel_pin;
>  	/* various features */
>  	bool usd_vsel;
>  };
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 09/14] imx: ventana: add EMMC configuration

[Tim Harvey]

Prepare for boards with EMMC instead of NAND flash

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/README | 17 +++++++----
 configs/gwventana_defconfig       | 64 ---------------------------------------
 configs/gwventana_emmc_defconfig  | 63 ++++++++++++++++++++++++++++++++++++++
 configs/gwventana_nand_defconfig  | 64 +++++++++++++++++++++++++++++++++++++++
 include/configs/gw_ventana.h      |  8 +++--
 5 files changed, 143 insertions(+), 73 deletions(-)
 delete mode 100644 configs/gwventana_defconfig
 create mode 100644 configs/gwventana_emmc_defconfig
 create mode 100644 configs/gwventana_nand_defconfig

diff --git a/board/gateworks/gw_ventana/README b/board/gateworks/gw_ventana/README
index f3f8998..57c64a1 100644
--- a/board/gateworks/gw_ventana/README
+++ b/board/gateworks/gw_ventana/README
@@ -30,7 +30,12 @@ will build the following artifacts from U-Boot source:
 
 To build U-Boot for the Gateworks Ventana product family:
 
- make gwventana_config
+For NAND FLASH based boards:
+ make gwventana_nand_config
+ make
+
+For EMMC FLASH based boards:
+ make gwventana_emmc_config
  make
 
 
@@ -99,11 +104,11 @@ This information is taken from:
 
 More details about the i.MX6 BOOT ROM can be found in the IMX6 reference manual.
 
-3.1. boot from micro-SD
------------------------
+3.1. boot from MMC (eMMC/microSD)
+---------------------------------
 
 When the IMX6 eFUSE settings have been factory programmed to boot from
-micro-SD the SPL will be loaded from offset 0x400 (1KB). Once the SPL is
+MMC the SPL will be loaded from offset 0x400 (1KB). Once the SPL is
 booted, it will load and execute U-Boot (u-boot.img) from offset 69KB
 on the micro-SD (defined by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR).
 
@@ -111,11 +116,11 @@ While it is technically possible to enable the SPL to be able to load
 U-Boot from a file on a FAT/EXT filesystem on the micro-SD, we chose to
 use raw micro-SD access to keep the code-size and boot time of the SPL down.
 
-For these reasons a micro-SD that will be used as an IMX6 primary boot
+For these reasons an MMC device that will be used as an IMX6 primary boot
 device must be carefully partitioned and prepared.
 
 The following shell commands are executed on a Linux host (adjust DEV to the
-block storage device of your micro-SD):
+block storage device of your MMC, ie /dev/mmcblk0):
 
  DEV=/dev/sdc
  # zero out 1MB of device
diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig
deleted file mode 100644
index 6cc5897..0000000
--- a/configs/gwventana_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX6=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_GW_VENTANA=y
-CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_NAND_SUPPORT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_VIDEO=y
-CONFIG_SPL_STACK_R_ADDR=0x18000000
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
-CONFIG_BOOTDELAY=3
-# CONFIG_SYS_STDIO_DEREGISTER is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SPL=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_DMA_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="Ventana > "
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_CMD_UBI=y
-CONFIG_DM=y
-CONFIG_NETDEVICES=y
-CONFIG_E1000=y
-CONFIG_PCI=y
-CONFIG_DM_SERIAL=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_USB_GADGET=y
-CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_G_DNL_MANUFACTURER="Gateworks"
-CONFIG_G_DNL_VENDOR_NUM=0x0525
-CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
-# CONFIG_VIDEO_SW_CURSOR is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
new file mode 100644
index 0000000..96d76e4
--- /dev/null
+++ b/configs/gwventana_emmc_defconfig
@@ -0,0 +1,63 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
new file mode 100644
index 0000000..6cc5897
--- /dev/null
+++ b/configs/gwventana_nand_defconfig
@@ -0,0 +1,64 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index d51bcc9..1606f20 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -68,7 +68,7 @@
   #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
 #endif
 
-#else
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
 /* Enable NAND support */
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_NAND_TRIMFFS
@@ -227,9 +227,11 @@
 
 /* Persistent Environment Config */
 #ifdef CONFIG_SPI_FLASH
-#define CONFIG_ENV_IS_IN_SPI_FLASH
+  #define CONFIG_ENV_IS_IN_SPI_FLASH
+#elif defined(CONFIG_SPL_NAND_SUPPORT)
+  #define CONFIG_ENV_IS_IN_NAND
 #else
-#define CONFIG_ENV_IS_IN_NAND
+  #define CONFIG_ENV_IS_IN_MMC
 #endif
 #if defined(CONFIG_ENV_IS_IN_MMC)
   #define CONFIG_SYS_MMC_ENV_DEV         0
-- 
2.7.4

[U-Boot] [PATCH 10/14] drivers: net: add MV88E6xx to Kconfig

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 drivers/net/Kconfig | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 078d5a8..a24bb06 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -141,6 +141,24 @@ config MACB
 	  GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
 	  Say Y to include support for the MACB/GEM chip.
 
+config MV88E61XX_SWITCH
+	bool "Marvell MV88E61xx Gigabit switch support"
+	help
+	  This driver supports the mv88e6176 and similar switches.
+
+if MV88E61XX_SWITCH
+
+config MV88E61XX_CPU_PORT
+	int "CPU Port"
+
+config MV88E61XX_PHY_PORTS
+	hex "Bitmask of PHY Ports"
+
+config MV88E61XX_FIXED_PORTS
+	hex "Bitmask of PHYless serdes Ports"
+
+endif # MV88E61XX_SWITCH
+
 config PCH_GBE
 	bool "Intel Platform Controller Hub EG20T GMAC driver"
 	depends on DM_ETH && DM_PCI
-- 
2.7.4

[U-Boot] [PATCH 10/14] drivers: net: add MV88E6xx to Kconfig

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  drivers/net/Kconfig | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index 078d5a8..a24bb06 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -141,6 +141,24 @@ config MACB
>  	  GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
>  	  Say Y to include support for the MACB/GEM chip.
>  
> +config MV88E61XX_SWITCH
> +	bool "Marvell MV88E61xx Gigabit switch support"
> +	help
> +	  This driver supports the mv88e6176 and similar switches.
> +
> +if MV88E61XX_SWITCH
> +
> +config MV88E61XX_CPU_PORT
> +	int "CPU Port"
> +
> +config MV88E61XX_PHY_PORTS
> +	hex "Bitmask of PHY Ports"
> +
> +config MV88E61XX_FIXED_PORTS
> +	hex "Bitmask of PHYless serdes Ports"
> +
> +endif # MV88E61XX_SWITCH
> +
>  config PCH_GBE
>  	bool "Intel Platform Controller Hub EG20T GMAC driver"
>  	depends on DM_ETH && DM_PCI
> 


I do not understand this patch: the switch is already added into
drivers/net/phy/Kconfig, where it should be, and it should not be in
drivers/net/Kconfig where you want to put it. So I am expecting you add
if MV88E61XX_SWITCH into drivers/net/phy/Kconfig and not here.

Added Joe as network maintainer.

Regards,
Stefano

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 10/14] drivers: net: add MV88E6xx to Kconfig

[Tim Harvey]

On Fri, Mar 17, 2017 at 3:59 AM, Stefano Babic <sbabic@denx.de> wrote:
> On 13/03/2017 16:51, Tim Harvey wrote:
>> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>> ---
>>  drivers/net/Kconfig | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
>> index 078d5a8..a24bb06 100644
>> --- a/drivers/net/Kconfig
>> +++ b/drivers/net/Kconfig
>> @@ -141,6 +141,24 @@ config MACB
>>         GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
>>         Say Y to include support for the MACB/GEM chip.
>>
>> +config MV88E61XX_SWITCH
>> +     bool "Marvell MV88E61xx Gigabit switch support"
>> +     help
>> +       This driver supports the mv88e6176 and similar switches.
>> +
>> +if MV88E61XX_SWITCH
>> +
>> +config MV88E61XX_CPU_PORT
>> +     int "CPU Port"
>> +
>> +config MV88E61XX_PHY_PORTS
>> +     hex "Bitmask of PHY Ports"
>> +
>> +config MV88E61XX_FIXED_PORTS
>> +     hex "Bitmask of PHYless serdes Ports"
>> +
>> +endif # MV88E61XX_SWITCH
>> +
>>  config PCH_GBE
>>       bool "Intel Platform Controller Hub EG20T GMAC driver"
>>       depends on DM_ETH && DM_PCI
>>
>
>
> I do not understand this patch: the switch is already added into
> drivers/net/phy/Kconfig, where it should be, and it should not be in
> drivers/net/Kconfig where you want to put it. So I am expecting you add
> if MV88E61XX_SWITCH into drivers/net/phy/Kconfig and not here.
>
> Added Joe as network maintainer.
>

Stefano,

Your right - I must have typo'd my grep when I was looking for it in Kconfig.

drop this patch please, and I will submit a v2 of 'imx: ventana: add
GW5904 support' that adds the switch properly. Let me know if you
would rather I resubmit the series.

Thanks,

Tim

[U-Boot] [PATCH 10/14] drivers: net: add MV88E6xx to Kconfig

[Stefano Babic]

On 17/03/2017 14:13, Tim Harvey wrote:
> On Fri, Mar 17, 2017 at 3:59 AM, Stefano Babic <sbabic@denx.de> wrote:
>> On 13/03/2017 16:51, Tim Harvey wrote:
>>> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
>>> ---
>>>  drivers/net/Kconfig | 18 ++++++++++++++++++
>>>  1 file changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
>>> index 078d5a8..a24bb06 100644
>>> --- a/drivers/net/Kconfig
>>> +++ b/drivers/net/Kconfig
>>> @@ -141,6 +141,24 @@ config MACB
>>>         GEM (Gigabit Ethernet MAC) found in some ARM SoC devices.
>>>         Say Y to include support for the MACB/GEM chip.
>>>
>>> +config MV88E61XX_SWITCH
>>> +     bool "Marvell MV88E61xx Gigabit switch support"
>>> +     help
>>> +       This driver supports the mv88e6176 and similar switches.
>>> +
>>> +if MV88E61XX_SWITCH
>>> +
>>> +config MV88E61XX_CPU_PORT
>>> +     int "CPU Port"
>>> +
>>> +config MV88E61XX_PHY_PORTS
>>> +     hex "Bitmask of PHY Ports"
>>> +
>>> +config MV88E61XX_FIXED_PORTS
>>> +     hex "Bitmask of PHYless serdes Ports"
>>> +
>>> +endif # MV88E61XX_SWITCH
>>> +
>>>  config PCH_GBE
>>>       bool "Intel Platform Controller Hub EG20T GMAC driver"
>>>       depends on DM_ETH && DM_PCI
>>>
>>
>>
>> I do not understand this patch: the switch is already added into
>> drivers/net/phy/Kconfig, where it should be, and it should not be in
>> drivers/net/Kconfig where you want to put it. So I am expecting you add
>> if MV88E61XX_SWITCH into drivers/net/phy/Kconfig and not here.
>>
>> Added Joe as network maintainer.
>>
> 
> Stefano,
> 
> Your right - I must have typo'd my grep when I was looking for it in Kconfig.
> 
> drop this patch please, and I will submit a v2 of 'imx: ventana: add
> GW5904 support' that adds the switch properly. Let me know if you
> would rather I resubmit the series.

You can submit just the V2.

Stefano


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 10/14] drivers: net: phy: add MV88E6xx options to Kconfig

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: moved options to drivers/net/phy where MV88E6xx config already lived

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 drivers/net/phy/Kconfig | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 1d514e9..6ee8bc3 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -15,6 +15,19 @@ if PHYLIB
 config MV88E61XX_SWITCH
 	bool "Marvel MV88E61xx Ethernet switch PHY support."
 
+if MV88E61XX_SWITCH
+
+config MV88E61XX_CPU_PORT
+	int "CPU Port"
+
+config MV88E61XX_PHY_PORTS
+	hex "Bitmask of PHY Ports"
+
+config MV88E61XX_FIXED_PORTS
+	hex "Bitmask of PHYless serdes Ports"
+
+endif # MV88E61XX_SWITCH
+
 config PHYLIB_10G
 	bool "Generic 10G PHY support"
 
-- 
2.7.4

[U-Boot] [PATCH v2 10/14] drivers: net: phy: add MV88E6xx options to Kconfig

[Stefano Babic]

Hi Tim,

On 17/03/2017 15:29, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> v2: moved options to drivers/net/phy where MV88E6xx config already lived
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  drivers/net/phy/Kconfig | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> index 1d514e9..6ee8bc3 100644
> --- a/drivers/net/phy/Kconfig
> +++ b/drivers/net/phy/Kconfig
> @@ -15,6 +15,19 @@ if PHYLIB
>  config MV88E61XX_SWITCH
>  	bool "Marvel MV88E61xx Ethernet switch PHY support."
>  
> +if MV88E61XX_SWITCH
> +
> +config MV88E61XX_CPU_PORT
> +	int "CPU Port"
> +
> +config MV88E61XX_PHY_PORTS
> +	hex "Bitmask of PHY Ports"
> +
> +config MV88E61XX_FIXED_PORTS
> +	hex "Bitmask of PHYless serdes Ports"
> +
> +endif # MV88E61XX_SWITCH
> +
>  config PHYLIB_10G
>  	bool "Generic 10G PHY support"
>  
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Tim, I have already applied 1-9 to u-boot-imx- Last patches depend on
this one, so I let them in stand-by.

Regards,
Stefano

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 10/14] drivers: net: phy: add MV88E6xx options to Kconfig

[Joe Hershberger]

On Fri, Mar 17, 2017 at 9:29 AM, Tim Harvey <tharvey@gateworks.com> wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
> v2: moved options to drivers/net/phy where MV88E6xx config already lived
>
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

[U-Boot] [PATCH v2 11/14] imx: ventana: add GW5904 support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2:
- remove unnecessary error print on registering esdhc
- register mmc_cd gpio once
- move PHYLIB to defconfigs

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 224 ++++++++++++++++++++++++++--
 board/gateworks/gw_ventana/common.h         |   2 +-
 board/gateworks/gw_ventana/eeprom.c         |   9 +-
 board/gateworks/gw_ventana/gw_ventana.c     |  35 ++++-
 board/gateworks/gw_ventana/gw_ventana_spl.c |  14 ++
 board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
 configs/gwventana_emmc_defconfig            |   1 +
 configs/gwventana_gw5904_defconfig          |  68 +++++++++
 configs/gwventana_nand_defconfig            |   1 +
 include/configs/gw_ventana.h                |   1 -
 10 files changed, 340 insertions(+), 16 deletions(-)
 create mode 100644 configs/gwventana_gw5904_defconfig

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 3dc5f88..d609894 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -38,6 +38,19 @@ void setup_iomux_uart(void)
 }
 
 /* MMC */
+static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
+	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -352,6 +365,41 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
+	/* USB_HUBRST# */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* UART_RS485 */
+	IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 | DIO_PAD_CFG),
+	/* UART_HALF */
+	IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | DIO_PAD_CFG),
+	/* SKT1_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 | DIO_PAD_CFG),
+	/* SKT1_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 | DIO_PAD_CFG),
+	/* SKT2_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 | DIO_PAD_CFG),
+	/* SKT2_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* M2_OFF# */
+	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
+	/* M2_WDIS# */
+	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
+	/* M2_RST# */
+	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
+};
+
 /* Digital I/O */
 struct dio_cfg gw51xx_dio[] = {
 	{
@@ -566,6 +614,81 @@ struct dio_cfg gw553x_dio[] = {
 	},
 };
 
+struct dio_cfg gw5904_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
+		IMX_GPIO_NR(2, 0),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
+		IMX_GPIO_NR(2, 1),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
+		IMX_GPIO_NR(2, 2),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
+		IMX_GPIO_NR(2, 3),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
+		IMX_GPIO_NR(2, 4),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
+		IMX_GPIO_NR(2, 5),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
+		IMX_GPIO_NR(2, 6),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
+		IMX_GPIO_NR(2, 7),
+		{ 0, 0 },
+		0
+	},
+};
+
 /*
  * Board Specific GPIO
  */
@@ -588,6 +711,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.dioi2c_en = IMX_GPIO_NR(4,  5),
 		.pcie_sson = IMX_GPIO_NR(1, 20),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW51xx */
@@ -631,6 +755,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW53xx */
@@ -654,6 +779,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW54xx */
@@ -679,6 +805,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW551x */
@@ -726,6 +853,24 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
+	},
+
+	/* GW5904 */
+	{
+		.gpio_pads = gw5904_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
+		.dio_cfg = gw5904_dio,
+		.dio_num = ARRAY_SIZE(gw5904_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 };
 
@@ -834,6 +979,30 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_direction_input(gpio_cfg[board].vsel_pin);
 		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
 	}
+
+	/* microSD CD */
+	if (gpio_cfg[board].mmc_cd) {
+		gpio_request(gpio_cfg[board].mmc_cd, "sd_cd");
+		gpio_direction_input(gpio_cfg[board].mmc_cd);
+	}
+
+	/* Anything else board specific */
+	switch(board) {
+	case GW5904:
+		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
+		gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
+		gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
+		gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
+		gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
+		gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
+		gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
+		gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
+		gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
+		break;
+	}
 }
 
 /* setup GPIO pinmux and default configuration per baseboard and env */
@@ -995,19 +1164,56 @@ static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
 
 int board_mmc_init(bd_t *bis)
 {
-	/* Only one USDHC controller on Ventana */
-	SETUP_IOMUX_PADS(usdhc3_pads);
-	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg.max_bus_width = 4;
-
-	return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	struct ventana_board_info ventana_info;
+	int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int ret;
+
+	switch (board_type) {
+	case GW52xx:
+	case GW53xx:
+	case GW54xx:
+	case GW553x:
+		/* usdhc3: 4bit microSD */
+		SETUP_IOMUX_PADS(usdhc3_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	case GW5904:
+		/* usdhc3: 8bit eMMC */
+		SETUP_IOMUX_PADS(gw5904_emmc_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 8;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	default:
+		/* doesn't have MMC */
+		return -1;
+	}
 }
 
 int board_mmc_getcd(struct mmc *mmc)
 {
+	struct ventana_board_info ventana_info;
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int gpio = gpio_cfg[board].mmc_cd;
+
 	/* Card Detect */
-	gpio_request(GP_SD3_CD, "sd_cd");
-	gpio_direction_input(GP_SD3_CD);
-	return !gpio_get_value(GP_SD3_CD);
+	switch (board) {
+	case GW5904:
+		/* emmc is always present */
+		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
+			return 1;
+		break;
+	}
+
+	if (gpio) {
+		debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
+		return !gpio_get_value(gpio);
+	}
+
+	return -1;
 }
+
 #endif /* CONFIG_FSL_ESDHC */
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 18909a0..3eb4c59 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -13,7 +13,6 @@
 
 /* GPIO's common to all baseboards */
 #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
-#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
 
@@ -79,6 +78,7 @@ struct ventana {
 	int rs232_en;
 	int otgpwr_en;
 	int vsel_pin;
+	int mmc_cd;
 	/* various features */
 	bool usd_vsel;
 };
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 1382e5d..9a1033a 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -64,6 +64,7 @@ read_eeprom(int bus, struct ventana_board_info *info)
 	if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
 		baseboard = '0';
 
+	type = GW_UNKNOWN;
 	switch (baseboard) {
 	case '0': /* original GW5400-A prototype */
 		type = GW54proto;
@@ -91,10 +92,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW553x;
 			break;
 		}
-		/* fall through */
-	default:
-		printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
-		type = GW_UNKNOWN;
+		break;
+	case '9':
+		if (info->model[4] == '0' && info->model[5] == '4')
+			type = GW5904;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 3f9d2f7..0768799 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -132,8 +132,9 @@ static void setup_iomux_enet(int gpio)
 	/* toggle PHY_RST# */
 	gpio_request(gpio, "phy_rst#");
 	gpio_direction_output(gpio, 0);
-	mdelay(2);
+	mdelay(10);
 	gpio_set_value(gpio, 1);
+	mdelay(100);
 }
 
 #ifdef CONFIG_USB_EHCI_MX6
@@ -232,6 +233,38 @@ int board_phy_config(struct phy_device *phydev)
 	return 0;
 }
 
+#ifdef CONFIG_MV88E61XX_SWITCH
+int mv88e61xx_hw_reset(struct phy_device *phydev)
+{
+	struct mii_dev *bus = phydev->bus;
+
+	/* GPIO[0] output, CLK125 */
+	debug("enabling RGMII_REFCLK\n");
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe);
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7);
+
+	/* RGMII delay - Physical Control register bit[15:14] */
+	debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
+	/* forced 1000mbps full-duplex link */
+	bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
+	phydev->autoneg = AUTONEG_DISABLE;
+	phydev->speed = SPEED_1000;
+	phydev->duplex = DUPLEX_FULL;
+
+	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (9=10Link) */
+	bus->write(bus, 0x10, 0, 0x16, 0x8089);
+	bus->write(bus, 0x11, 0, 0x16, 0x8089);
+	bus->write(bus, 0x12, 0, 0x16, 0x8089);
+	bus->write(bus, 0x13, 0, 0x16, 0x8089);
+
+	return 0;
+}
+#endif // CONFIG_MV88E61XX_SWITCH
+
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FEC_MXC
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 8cc2a57..136b5fc 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -608,6 +608,20 @@ void board_init_f(ulong dummy)
 	memset(__bss_start, 0, __bss_end - __bss_start);
 }
 
+void board_boot_order(u32 *spl_boot_list)
+{
+	spl_boot_list[0] = spl_boot_device();
+	switch (spl_boot_list[0]) {
+	case BOOT_DEVICE_NAND:
+		spl_boot_list[1] = BOOT_DEVICE_MMC1;
+		spl_boot_list[2] = BOOT_DEVICE_UART;
+		break;
+	case BOOT_DEVICE_MMC1:
+		spl_boot_list[1] = BOOT_DEVICE_UART;
+		break;
+	}
+}
+
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
 /* its our chance to print info about boot device */
 void spl_board_init(void)
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index 9ffad58..bacaf5a 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -112,6 +112,7 @@ enum {
 	GW551x,
 	GW552x,
 	GW553x,
+	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 96d76e4..2788219 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
new file mode 100644
index 0000000..7369d23
--- /dev/null
+++ b/configs/gwventana_gw5904_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_PHYLIB=y
+CONFIG_MV88E61XX_SWITCH=y
+CONFIG_MV88E61XX_CPU_PORT=5
+CONFIG_MV88E61XX_PHY_PORTS=0xf
+CONFIG_MV88E61XX_FIXED_PORTS=0x0
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 6cc5897..e1e5200 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -46,6 +46,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_UBI=y
 CONFIG_DM=y
+CONFIG_PHYLIB=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_PCI=y
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 1606f20..881f870 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -152,7 +152,6 @@
 #define IMX_FEC_BASE             ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE      RGMII
 #define CONFIG_FEC_MXC_PHYADDR   0
-#define CONFIG_PHYLIB
 #define CONFIG_ARP_TIMEOUT       200UL
 
 /* USB Configs */
-- 
2.7.4

[U-Boot] [PATCH v2 12/14] imx: ventana: add GW560x support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2:
- remove unnecessary error print on registering esdhc

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 177 ++++++++++++++++++++++++----
 board/gateworks/gw_ventana/eeprom.c         |   4 +
 board/gateworks/gw_ventana/gsc.c            |   4 +
 board/gateworks/gw_ventana/gw_ventana.c     |   4 +-
 board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
 include/configs/gw_ventana.h                |   1 -
 6 files changed, 163 insertions(+), 28 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index d609894..017494f 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -51,6 +51,20 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
+/* 8-bit eMMC on SD2/NAND */
+static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
+	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -365,6 +379,39 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
+	/* RS232_EN# */
+	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+	/* CAN_STBY */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* USB_HUBRST# */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* VID_EN */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT10__GPIO4_IO31 | DIO_PAD_CFG),
+	/* RS485_EN */
+	IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* USBH2_PEN (OTG) */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* 12V0_PWR_EN */
+	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
+};
+
 static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	/* USB_HUBRST# */
 	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
@@ -614,6 +661,33 @@ struct dio_cfg gw553x_dio[] = {
 	},
 };
 
+struct dio_cfg gw560x_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+};
+
 struct dio_cfg gw5904_dio[] = {
 	{
 		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
@@ -856,6 +930,27 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
+	/* GW560x */
+	{
+		.gpio_pads = gw560x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw560x_gpio_pads)/2,
+		.dio_cfg = gw560x_dio,
+		.dio_num = ARRAY_SIZE(gw560x_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(4, 31),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.rs232_en = GP_RS232_EN,
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.wdis = IMX_GPIO_NR(7, 12),
+		.otgpwr_en = IMX_GPIO_NR(4, 15),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
+	},
+
 	/* GW5904 */
 	{
 		.gpio_pads = gw5904_gpio_pads,
@@ -988,6 +1083,10 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 
 	/* Anything else board specific */
 	switch(board) {
+	case GW560x:
+		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
+		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
+		break;
 	case GW5904:
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
@@ -1095,6 +1194,8 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 void setup_pmic(void)
 {
 	struct pmic *p;
+	struct ventana_board_info ventana_info;
+	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 	u32 reg;
 
 	i2c_set_bus_num(CONFIG_I2C_PMIC);
@@ -1127,23 +1228,27 @@ void setup_pmic(void)
 		debug("probed LTC3676 at 0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
 		power_ltc3676_init(CONFIG_I2C_PMIC);
 		p = pmic_get("LTC3676_PMIC");
-		if (p && !pmic_probe(p)) {
-			puts("PMIC:  LTC3676\n");
-			/*
-			 * set board-specific scalar for max CPU frequency
-			 * per CPU based on the LDO enabled Operating Ranges
-			 * defined in the respective IMX6DQ and IMX6SDL
-			 * datasheets. The voltage resulting from the R1/R2
-			 * feedback inputs on Ventana is 1308mV. Note that this
-			 * is a bit shy of the Vmin of 1350mV in the datasheet
-			 * for LDO enabled mode but is as high as we can go.
-			 *
-			 * We will rely on an OS kernel driver to properly
-			 * regulate these per CPU operating point and use LDO
-			 * bypass mode when using the higher frequency
-			 * operating points to compensate as LDO bypass mode
-			 * allows the rails be 125mV lower.
-			 */
+		if (!p || pmic_probe(p))
+			return;
+		puts("PMIC:  LTC3676\n");
+		/*
+		 * set board-specific scalar for max CPU frequency
+		 * per CPU based on the LDO enabled Operating Ranges
+		 * defined in the respective IMX6DQ and IMX6SDL
+		 * datasheets. The voltage resulting from the R1/R2
+		 * feedback inputs on Ventana is 1308mV. Note that this
+		 * is a bit shy of the Vmin of 1350mV in the datasheet
+		 * for LDO enabled mode but is as high as we can go.
+		 */
+		switch (board) {
+		case GW560x:
+			/* mask PGOOD during SW3 transition */
+			pmic_reg_write(p, LTC3676_DVB3B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW3 (VDD_ARM) */
+			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
+			break;
+		default:
 			/* mask PGOOD during SW1 transition */
 			pmic_reg_write(p, LTC3676_DVB1B,
 				       0x1f | LTC3676_PGOOD_MASK);
@@ -1160,7 +1265,7 @@ void setup_pmic(void)
 }
 
 #ifdef CONFIG_FSL_ESDHC
-static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
+static struct fsl_esdhc_cfg usdhc_cfg[2];
 
 int board_mmc_init(bd_t *bis)
 {
@@ -1175,17 +1280,32 @@ int board_mmc_init(bd_t *bis)
 	case GW553x:
 		/* usdhc3: 4bit microSD */
 		SETUP_IOMUX_PADS(usdhc3_pads);
-		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
-		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-		usdhc_cfg.max_bus_width = 4;
-		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+	case GW560x:
+		/* usdhc2: 8-bit eMMC */
+		SETUP_IOMUX_PADS(gw560x_emmc_sd2_pads);
+		usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+		if (ret)
+			return ret;
+		/* usdhc3: 4-bit microSD */
+		SETUP_IOMUX_PADS(usdhc3_pads);
+		usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[1].max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
 	case GW5904:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
-		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
-		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-		usdhc_cfg.max_bus_width = 8;
-		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
 	default:
 		/* doesn't have MMC */
 		return -1;
@@ -1201,6 +1321,11 @@ int board_mmc_getcd(struct mmc *mmc)
 
 	/* Card Detect */
 	switch (board) {
+	case GW560x:
+		/* emmc is always present */
+		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
+			return 1;
+		break;
 	case GW5904:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 9a1033a..cfd96b9 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -93,6 +93,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			break;
 		}
 		break;
+	case '6':
+		if (info->model[4] == '0')
+			type = GW560x;
+		break;
 	case '9':
 		if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 613a275..68b1ddb 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -137,6 +137,10 @@ int gsc_info(int verbose)
 		break;
 	case '5': /* GW55xx */
 		break;
+	case '6': /* GW560x */
+		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3);
+		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
+		break;
 	}
 	return 0;
 }
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 0768799..5f25d8d 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -694,6 +694,7 @@ int checkboard(void)
 static const struct boot_mode board_boot_modes[] = {
 	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
 	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
+	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
 	{ NULL, 0 },
 };
 #endif
@@ -745,7 +746,8 @@ int misc_init_r(void)
 			setenv("fdt_file1", fdt);
 			if (board_type != GW551x &&
 			    board_type != GW552x &&
-			    board_type != GW553x)
+			    board_type != GW553x &&
+			    board_type != GW560x)
 				str[4] = 'x';
 			str[5] = 'x';
 			str[6] = 0;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index bacaf5a..b6daf9b 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -112,6 +112,7 @@ enum {
 	GW551x,
 	GW552x,
 	GW553x,
+	GW560x,
 	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 881f870..bdd0b73 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -100,7 +100,6 @@
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
-#define CONFIG_SYS_FSL_USDHC_NUM       1
 
 /* Filesystem support */
 #define CONFIG_CMD_UBIFS
-- 
2.7.4

[U-Boot] [PATCH 11/14] imx: ventana: add GW5904 support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 222 ++++++++++++++++++++++++++--
 board/gateworks/gw_ventana/common.h         |   2 +-
 board/gateworks/gw_ventana/eeprom.c         |   9 +-
 board/gateworks/gw_ventana/gw_ventana.c     |  35 ++++-
 board/gateworks/gw_ventana/gw_ventana_spl.c |  14 ++
 board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
 configs/gwventana_gw5904_defconfig          |  68 +++++++++
 7 files changed, 336 insertions(+), 15 deletions(-)
 create mode 100644 configs/gwventana_gw5904_defconfig

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 3dc5f88..f7e93e2 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -38,6 +38,19 @@ void setup_iomux_uart(void)
 }
 
 /* MMC */
+static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
+	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -352,6 +365,41 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
+	/* USB_HUBRST# */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* UART_RS485 */
+	IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 | DIO_PAD_CFG),
+	/* UART_HALF */
+	IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | DIO_PAD_CFG),
+	/* SKT1_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 | DIO_PAD_CFG),
+	/* SKT1_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 | DIO_PAD_CFG),
+	/* SKT2_WDIS# */
+	IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 | DIO_PAD_CFG),
+	/* SKT2_RST# */
+	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+	/* M2_OFF# */
+	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
+	/* M2_WDIS# */
+	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
+	/* M2_RST# */
+	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
+};
+
 /* Digital I/O */
 struct dio_cfg gw51xx_dio[] = {
 	{
@@ -566,6 +614,81 @@ struct dio_cfg gw553x_dio[] = {
 	},
 };
 
+struct dio_cfg gw5904_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
+		IMX_GPIO_NR(2, 0),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
+		IMX_GPIO_NR(2, 1),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
+		IMX_GPIO_NR(2, 2),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
+		IMX_GPIO_NR(2, 3),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
+		IMX_GPIO_NR(2, 4),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
+		IMX_GPIO_NR(2, 5),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
+		IMX_GPIO_NR(2, 6),
+		{ 0, 0 },
+		0
+	},
+	{
+		{IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
+		IMX_GPIO_NR(2, 7),
+		{ 0, 0 },
+		0
+	},
+};
+
 /*
  * Board Specific GPIO
  */
@@ -588,6 +711,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.dioi2c_en = IMX_GPIO_NR(4,  5),
 		.pcie_sson = IMX_GPIO_NR(1, 20),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW51xx */
@@ -631,6 +755,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW53xx */
@@ -654,6 +779,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW54xx */
@@ -679,6 +805,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.rs232_en = GP_RS232_EN,
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
 	/* GW551x */
@@ -726,6 +853,24 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.wdis = IMX_GPIO_NR(7, 12),
 		.otgpwr_en = IMX_GPIO_NR(3, 22),
 		.vsel_pin = IMX_GPIO_NR(6, 14),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
+	},
+
+	/* GW5904 */
+	{
+		.gpio_pads = gw5904_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
+		.dio_cfg = gw5904_dio,
+		.dio_num = ARRAY_SIZE(gw5904_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(1, 0),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.otgpwr_en = IMX_GPIO_NR(3, 22),
 	},
 };
 
@@ -834,6 +979,24 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_direction_input(gpio_cfg[board].vsel_pin);
 		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
 	}
+
+	/* Anything else board specific */
+	switch(board) {
+	case GW5904:
+		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
+		gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
+		gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
+		gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
+		gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
+		gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
+		gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
+		gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
+		gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
+		gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
+		break;
+	}
 }
 
 /* setup GPIO pinmux and default configuration per baseboard and env */
@@ -995,19 +1158,60 @@ static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
 
 int board_mmc_init(bd_t *bis)
 {
-	/* Only one USDHC controller on Ventana */
-	SETUP_IOMUX_PADS(usdhc3_pads);
-	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-	usdhc_cfg.max_bus_width = 4;
-
-	return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	struct ventana_board_info ventana_info;
+	int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int ret;
+
+	switch (board_type) {
+	case GW52xx:
+	case GW53xx:
+	case GW54xx:
+	case GW553x:
+		SETUP_IOMUX_PADS(usdhc3_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+	case GW5904:
+		/* usdhc3: 8bit eMMC */
+		SETUP_IOMUX_PADS(gw5904_emmc_pads);
+		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg.max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg);
+		if (ret)
+			printf("failed registering emmc usdhc3\n");
+		return 0;
+	default:
+		/* doesn't have MMC */
+		return -1;
+	}
 }
 
 int board_mmc_getcd(struct mmc *mmc)
 {
+	struct ventana_board_info ventana_info;
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
+	int gpio = gpio_cfg[board].mmc_cd;
+
 	/* Card Detect */
-	gpio_request(GP_SD3_CD, "sd_cd");
-	gpio_direction_input(GP_SD3_CD);
-	return !gpio_get_value(GP_SD3_CD);
+	switch (board) {
+	case GW5904:
+		/* emmc is always present */
+		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
+			return 1;
+		break;
+	}
+
+	if (gpio) {
+		gpio_request(gpio, "sd_cd");
+		gpio_direction_input(gpio);
+		debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
+		return !gpio_get_value(gpio);
+	}
+
+	return -1;
 }
+
 #endif /* CONFIG_FSL_ESDHC */
diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 18909a0..3eb4c59 100644
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -13,7 +13,6 @@
 
 /* GPIO's common to all baseboards */
 #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
-#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
 
@@ -79,6 +78,7 @@ struct ventana {
 	int rs232_en;
 	int otgpwr_en;
 	int vsel_pin;
+	int mmc_cd;
 	/* various features */
 	bool usd_vsel;
 };
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 1382e5d..9a1033a 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -64,6 +64,7 @@ read_eeprom(int bus, struct ventana_board_info *info)
 	if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
 		baseboard = '0';
 
+	type = GW_UNKNOWN;
 	switch (baseboard) {
 	case '0': /* original GW5400-A prototype */
 		type = GW54proto;
@@ -91,10 +92,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW553x;
 			break;
 		}
-		/* fall through */
-	default:
-		printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
-		type = GW_UNKNOWN;
+		break;
+	case '9':
+		if (info->model[4] == '0' && info->model[5] == '4')
+			type = GW5904;
 		break;
 	}
 	return type;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 3f9d2f7..0768799 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -132,8 +132,9 @@ static void setup_iomux_enet(int gpio)
 	/* toggle PHY_RST# */
 	gpio_request(gpio, "phy_rst#");
 	gpio_direction_output(gpio, 0);
-	mdelay(2);
+	mdelay(10);
 	gpio_set_value(gpio, 1);
+	mdelay(100);
 }
 
 #ifdef CONFIG_USB_EHCI_MX6
@@ -232,6 +233,38 @@ int board_phy_config(struct phy_device *phydev)
 	return 0;
 }
 
+#ifdef CONFIG_MV88E61XX_SWITCH
+int mv88e61xx_hw_reset(struct phy_device *phydev)
+{
+	struct mii_dev *bus = phydev->bus;
+
+	/* GPIO[0] output, CLK125 */
+	debug("enabling RGMII_REFCLK\n");
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe);
+	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
+		   0x1a /*MV_SCRATCH_MISC*/,
+		   (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7);
+
+	/* RGMII delay - Physical Control register bit[15:14] */
+	debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
+	/* forced 1000mbps full-duplex link */
+	bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
+	phydev->autoneg = AUTONEG_DISABLE;
+	phydev->speed = SPEED_1000;
+	phydev->duplex = DUPLEX_FULL;
+
+	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (9=10Link) */
+	bus->write(bus, 0x10, 0, 0x16, 0x8089);
+	bus->write(bus, 0x11, 0, 0x16, 0x8089);
+	bus->write(bus, 0x12, 0, 0x16, 0x8089);
+	bus->write(bus, 0x13, 0, 0x16, 0x8089);
+
+	return 0;
+}
+#endif // CONFIG_MV88E61XX_SWITCH
+
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FEC_MXC
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 8cc2a57..136b5fc 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -608,6 +608,20 @@ void board_init_f(ulong dummy)
 	memset(__bss_start, 0, __bss_end - __bss_start);
 }
 
+void board_boot_order(u32 *spl_boot_list)
+{
+	spl_boot_list[0] = spl_boot_device();
+	switch (spl_boot_list[0]) {
+	case BOOT_DEVICE_NAND:
+		spl_boot_list[1] = BOOT_DEVICE_MMC1;
+		spl_boot_list[2] = BOOT_DEVICE_UART;
+		break;
+	case BOOT_DEVICE_MMC1:
+		spl_boot_list[1] = BOOT_DEVICE_UART;
+		break;
+	}
+}
+
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
 /* its our chance to print info about boot device */
 void spl_board_init(void)
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index 9ffad58..bacaf5a 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -112,6 +112,7 @@ enum {
 	GW551x,
 	GW552x,
 	GW553x,
+	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
 };
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
new file mode 100644
index 0000000..2a95763
--- /dev/null
+++ b/configs/gwventana_gw5904_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_GW_VENTANA=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_VIDEO=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
+# CONFIG_SYS_STDIO_DEREGISTER is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Ventana > "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_DM=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_PCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Gateworks"
+CONFIG_G_DNL_VENDOR_NUM=0x0525
+CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+# CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
+CONFIG_MV88E61XX_SWITCH=y
+CONFIG_MV88E61XX_CPU_PORT=5
+CONFIG_MV88E61XX_PHY_PORTS=0xf
+CONFIG_MV88E61XX_FIXED_PORTS=0x0
+
-- 
2.7.4

[U-Boot] [PATCH 11/14] imx: ventana: add GW5904 support

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c         | 222 ++++++++++++++++++++++++++--
>  board/gateworks/gw_ventana/common.h         |   2 +-
>  board/gateworks/gw_ventana/eeprom.c         |   9 +-
>  board/gateworks/gw_ventana/gw_ventana.c     |  35 ++++-
>  board/gateworks/gw_ventana/gw_ventana_spl.c |  14 ++
>  board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
>  configs/gwventana_gw5904_defconfig          |  68 +++++++++
>  7 files changed, 336 insertions(+), 15 deletions(-)
>  create mode 100644 configs/gwventana_gw5904_defconfig
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index 3dc5f88..f7e93e2 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -38,6 +38,19 @@ void setup_iomux_uart(void)
>  }
>  
>  /* MMC */
> +static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
> +	IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +};
>  static iomux_v3_cfg_t const usdhc3_pads[] = {
>  	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> @@ -352,6 +365,41 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
>  	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
>  };
>  
> +static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
> +	/* USB_HUBRST# */
> +	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
> +	/* PANLEDG# */
> +	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
> +	/* PANLEDR# */
> +	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
> +	/* MX6_LOCLED# */
> +	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
> +	/* IOEXP_PWREN# */
> +	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
> +	/* IOEXP_IRQ# */
> +	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
> +	/* DIOI2C_DIS# */
> +	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
> +	/* UART_RS485 */
> +	IOMUX_PADS(PAD_DISP0_DAT2__GPIO4_IO23 | DIO_PAD_CFG),
> +	/* UART_HALF */
> +	IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | DIO_PAD_CFG),
> +	/* SKT1_WDIS# */
> +	IOMUX_PADS(PAD_DISP0_DAT17__GPIO5_IO11 | DIO_PAD_CFG),
> +	/* SKT1_RST# */
> +	IOMUX_PADS(PAD_DISP0_DAT18__GPIO5_IO12 | DIO_PAD_CFG),
> +	/* SKT2_WDIS# */
> +	IOMUX_PADS(PAD_DISP0_DAT19__GPIO5_IO13 | DIO_PAD_CFG),
> +	/* SKT2_RST# */
> +	IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
> +	/* M2_OFF# */
> +	IOMUX_PADS(PAD_SD2_DAT0__GPIO1_IO15 | DIO_PAD_CFG),
> +	/* M2_WDIS# */
> +	IOMUX_PADS(PAD_SD2_DAT1__GPIO1_IO14 | DIO_PAD_CFG),
> +	/* M2_RST# */
> +	IOMUX_PADS(PAD_SD2_DAT2__GPIO1_IO13 | DIO_PAD_CFG),
> +};
> +
>  /* Digital I/O */
>  struct dio_cfg gw51xx_dio[] = {
>  	{
> @@ -566,6 +614,81 @@ struct dio_cfg gw553x_dio[] = {
>  	},
>  };
>  
> +struct dio_cfg gw5904_dio[] = {
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
> +		IMX_GPIO_NR(1, 16),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
> +		IMX_GPIO_NR(1, 19),
> +		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
> +		2
> +	},
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
> +		IMX_GPIO_NR(1, 17),
> +		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
> +		3
> +	},
> +	{
> +		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
> +		IMX_GPIO_NR(1, 20),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00) },
> +		IMX_GPIO_NR(2, 0),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01) },
> +		IMX_GPIO_NR(2, 1),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02) },
> +		IMX_GPIO_NR(2, 2),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03) },
> +		IMX_GPIO_NR(2, 3),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04) },
> +		IMX_GPIO_NR(2, 4),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05) },
> +		IMX_GPIO_NR(2, 5),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06) },
> +		IMX_GPIO_NR(2, 6),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{IOMUX_PADS(PAD_NANDF_D7__GPIO2_IO07) },
> +		IMX_GPIO_NR(2, 7),
> +		{ 0, 0 },
> +		0
> +	},
> +};
> +
>  /*
>   * Board Specific GPIO
>   */
> @@ -588,6 +711,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.dioi2c_en = IMX_GPIO_NR(4,  5),
>  		.pcie_sson = IMX_GPIO_NR(1, 20),
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
>  	/* GW51xx */
> @@ -631,6 +755,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  		.vsel_pin = IMX_GPIO_NR(6, 14),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
>  	/* GW53xx */
> @@ -654,6 +779,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  		.vsel_pin = IMX_GPIO_NR(6, 14),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
>  	/* GW54xx */
> @@ -679,6 +805,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.rs232_en = GP_RS232_EN,
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  		.vsel_pin = IMX_GPIO_NR(6, 14),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
>  	/* GW551x */
> @@ -726,6 +853,24 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.wdis = IMX_GPIO_NR(7, 12),
>  		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  		.vsel_pin = IMX_GPIO_NR(6, 14),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
> +	},
> +
> +	/* GW5904 */
> +	{
> +		.gpio_pads = gw5904_gpio_pads,
> +		.num_pads = ARRAY_SIZE(gw5904_gpio_pads)/2,
> +		.dio_cfg = gw5904_dio,
> +		.dio_num = ARRAY_SIZE(gw5904_dio),
> +		.leds = {
> +			IMX_GPIO_NR(4, 6),
> +			IMX_GPIO_NR(4, 7),
> +			IMX_GPIO_NR(4, 15),
> +		},
> +		.pcie_rst = IMX_GPIO_NR(1, 0),
> +		.mezz_pwren = IMX_GPIO_NR(2, 19),
> +		.mezz_irq = IMX_GPIO_NR(2, 18),
> +		.otgpwr_en = IMX_GPIO_NR(3, 22),
>  	},
>  };
>  
> @@ -834,6 +979,24 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  		gpio_direction_input(gpio_cfg[board].vsel_pin);
>  		gpio_cfg[board].usd_vsel = !gpio_get_value(gpio_cfg[board].vsel_pin);
>  	}
> +
> +	/* Anything else board specific */
> +	switch(board) {
> +	case GW5904:
> +		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
> +		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
> +		gpio_request(IMX_GPIO_NR(5, 12), "skt1_rst#");
> +		gpio_direction_output(IMX_GPIO_NR(5, 12), 1);
> +		gpio_request(IMX_GPIO_NR(5, 13), "skt2_wdis#");
> +		gpio_direction_output(IMX_GPIO_NR(5, 13), 1);
> +		gpio_request(IMX_GPIO_NR(1, 15), "m2_off#");
> +		gpio_direction_output(IMX_GPIO_NR(1, 15), 1);
> +		gpio_request(IMX_GPIO_NR(1, 14), "m2_wdis#");
> +		gpio_direction_output(IMX_GPIO_NR(1, 14), 1);
> +		gpio_request(IMX_GPIO_NR(1, 13), "m2_rst#");
> +		gpio_direction_output(IMX_GPIO_NR(1, 13), 1);
> +		break;
> +	}
>  }
>  
>  /* setup GPIO pinmux and default configuration per baseboard and env */
> @@ -995,19 +1158,60 @@ static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
>  
>  int board_mmc_init(bd_t *bis)
>  {
> -	/* Only one USDHC controller on Ventana */
> -	SETUP_IOMUX_PADS(usdhc3_pads);
> -	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> -	usdhc_cfg.max_bus_width = 4;
> -
> -	return fsl_esdhc_initialize(bis, &usdhc_cfg);
> +	struct ventana_board_info ventana_info;
> +	int board_type = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
> +	int ret;
> +
> +	switch (board_type) {
> +	case GW52xx:
> +	case GW53xx:
> +	case GW54xx:
> +	case GW553x:
> +		SETUP_IOMUX_PADS(usdhc3_pads);
> +		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg.max_bus_width = 4;
> +		return fsl_esdhc_initialize(bis, &usdhc_cfg);
> +	case GW5904:
> +		/* usdhc3: 8bit eMMC */
> +		SETUP_IOMUX_PADS(gw5904_emmc_pads);
> +		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg.max_bus_width = 8;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg);
> +		if (ret)
> +			printf("failed registering emmc usdhc3\n");

Why do you add here a printf and in the previous case not ? The printf()
does not help a lot, the error is already forwarded to the caller.

> +		return 0;
> +	default:
> +		/* doesn't have MMC */
> +		return -1;
> +	}
>  }
>  
>  int board_mmc_getcd(struct mmc *mmc)
>  {
> +	struct ventana_board_info ventana_info;
> +	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
> +	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
> +	int gpio = gpio_cfg[board].mmc_cd;
> +
>  	/* Card Detect */
> -	gpio_request(GP_SD3_CD, "sd_cd");
> -	gpio_direction_input(GP_SD3_CD);
> -	return !gpio_get_value(GP_SD3_CD);
> +	switch (board) {
> +	case GW5904:
> +		/* emmc is always present */
> +		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
> +			return 1;
> +		break;
> +	}
> +
> +	if (gpio) {
> +		gpio_request(gpio, "sd_cd");
> +		gpio_direction_input(gpio);
> +		debug("%s: gpio%d=%d\n", __func__, gpio, gpio_get_value(gpio));
> +		return !gpio_get_value(gpio);

Even if in u-boot is harmless (and the issue is already present in
gw_ventana), a second gpio_request() could be in future raise an error
if gpio_free() was not called. Currently, I agree, there is no error.

> +	}
> +
> +	return -1;
>  }
> +
>  #endif /* CONFIG_FSL_ESDHC */
> diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
> index 18909a0..3eb4c59 100644
> --- a/board/gateworks/gw_ventana/common.h
> +++ b/board/gateworks/gw_ventana/common.h
> @@ -13,7 +13,6 @@
>  
>  /* GPIO's common to all baseboards */
>  #define GP_PHY_RST	IMX_GPIO_NR(1, 30)
> -#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
>  #define GP_RS232_EN	IMX_GPIO_NR(2, 11)
>  #define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
>  
> @@ -79,6 +78,7 @@ struct ventana {
>  	int rs232_en;
>  	int otgpwr_en;
>  	int vsel_pin;
> +	int mmc_cd;
>  	/* various features */
>  	bool usd_vsel;
>  };
> diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
> index 1382e5d..9a1033a 100644
> --- a/board/gateworks/gw_ventana/eeprom.c
> +++ b/board/gateworks/gw_ventana/eeprom.c
> @@ -64,6 +64,7 @@ read_eeprom(int bus, struct ventana_board_info *info)
>  	if (strncasecmp((const char *)info->model, "GW5400-A", 8) == 0)
>  		baseboard = '0';
>  
> +	type = GW_UNKNOWN;
>  	switch (baseboard) {
>  	case '0': /* original GW5400-A prototype */
>  		type = GW54proto;
> @@ -91,10 +92,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
>  			type = GW553x;
>  			break;
>  		}
> -		/* fall through */
> -	default:
> -		printf("EEPROM: Unknown model in EEPROM: %s\n", info->model);
> -		type = GW_UNKNOWN;
> +		break;
> +	case '9':
> +		if (info->model[4] == '0' && info->model[5] == '4')
> +			type = GW5904;
>  		break;
>  	}
>  	return type;
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 3f9d2f7..0768799 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -132,8 +132,9 @@ static void setup_iomux_enet(int gpio)
>  	/* toggle PHY_RST# */
>  	gpio_request(gpio, "phy_rst#");
>  	gpio_direction_output(gpio, 0);
> -	mdelay(2);
> +	mdelay(10);
>  	gpio_set_value(gpio, 1);
> +	mdelay(100);
>  }
>  
>  #ifdef CONFIG_USB_EHCI_MX6
> @@ -232,6 +233,38 @@ int board_phy_config(struct phy_device *phydev)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_MV88E61XX_SWITCH
> +int mv88e61xx_hw_reset(struct phy_device *phydev)
> +{
> +	struct mii_dev *bus = phydev->bus;
> +
> +	/* GPIO[0] output, CLK125 */
> +	debug("enabling RGMII_REFCLK\n");
> +	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
> +		   0x1a /*MV_SCRATCH_MISC*/,
> +		   (1 << 15) | (0x62 /*MV_GPIO_DIR*/ << 8) | 0xfe);
> +	bus->write(bus, 0x1c /*MV_GLOBAL2*/, 0,
> +		   0x1a /*MV_SCRATCH_MISC*/,
> +		   (1 << 15) | (0x68 /*MV_GPIO01_CNTL*/ << 8) | 7);
> +
> +	/* RGMII delay - Physical Control register bit[15:14] */
> +	debug("setting port%d RGMII rx/tx delay\n", CONFIG_MV88E61XX_CPU_PORT);
> +	/* forced 1000mbps full-duplex link */
> +	bus->write(bus, 0x10 + CONFIG_MV88E61XX_CPU_PORT, 0, 1, 0xc0fe);
> +	phydev->autoneg = AUTONEG_DISABLE;
> +	phydev->speed = SPEED_1000;
> +	phydev->duplex = DUPLEX_FULL;
> +
> +	/* LED configuration: 7:4-green (8=Activity)  3:0 amber (9=10Link) */
> +	bus->write(bus, 0x10, 0, 0x16, 0x8089);
> +	bus->write(bus, 0x11, 0, 0x16, 0x8089);
> +	bus->write(bus, 0x12, 0, 0x16, 0x8089);
> +	bus->write(bus, 0x13, 0, 0x16, 0x8089);
> +
> +	return 0;
> +}
> +#endif // CONFIG_MV88E61XX_SWITCH
> +
>  int board_eth_init(bd_t *bis)
>  {
>  #ifdef CONFIG_FEC_MXC
> diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
> index 8cc2a57..136b5fc 100644
> --- a/board/gateworks/gw_ventana/gw_ventana_spl.c
> +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
> @@ -608,6 +608,20 @@ void board_init_f(ulong dummy)
>  	memset(__bss_start, 0, __bss_end - __bss_start);
>  }
>  
> +void board_boot_order(u32 *spl_boot_list)
> +{
> +	spl_boot_list[0] = spl_boot_device();
> +	switch (spl_boot_list[0]) {
> +	case BOOT_DEVICE_NAND:
> +		spl_boot_list[1] = BOOT_DEVICE_MMC1;
> +		spl_boot_list[2] = BOOT_DEVICE_UART;
> +		break;
> +	case BOOT_DEVICE_MMC1:
> +		spl_boot_list[1] = BOOT_DEVICE_UART;
> +		break;
> +	}
> +}
> +
>  /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
>  /* its our chance to print info about boot device */
>  void spl_board_init(void)
> diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
> index 9ffad58..bacaf5a 100644
> --- a/board/gateworks/gw_ventana/ventana_eeprom.h
> +++ b/board/gateworks/gw_ventana/ventana_eeprom.h
> @@ -112,6 +112,7 @@ enum {
>  	GW551x,
>  	GW552x,
>  	GW553x,
> +	GW5904,
>  	GW_UNKNOWN,
>  	GW_BADCRC,
>  };
> diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
> new file mode 100644
> index 0000000..2a95763
> --- /dev/null
> +++ b/configs/gwventana_gw5904_defconfig
> @@ -0,0 +1,68 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_MX6=y
> +CONFIG_SPL_GPIO_SUPPORT=y
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_TARGET_GW_VENTANA=y
> +CONFIG_SPL_I2C_SUPPORT=y
> +CONFIG_SPL_MMC_SUPPORT=y
> +CONFIG_SPL_POWER_SUPPORT=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> +CONFIG_SPL_WATCHDOG_SUPPORT=y
> +CONFIG_VIDEO=y
> +CONFIG_SPL_STACK_R_ADDR=0x18000000
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_OF_BOARD_SETUP=y
> +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
> +CONFIG_BOOTDELAY=3
> +# CONFIG_SYS_STDIO_DEREGISTER is not set
> +# CONFIG_DISPLAY_BOARDINFO is not set
> +CONFIG_BOARD_EARLY_INIT_F=y
> +CONFIG_SPL=y
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_DMA_SUPPORT=y
> +CONFIG_SPL_OS_BOOT=y
> +CONFIG_HUSH_PARSER=y
> +CONFIG_SYS_PROMPT="Ventana > "
> +CONFIG_CMD_BOOTZ=y
> +# CONFIG_CMD_IMLS is not set
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_DHCP=y
> +CONFIG_CMD_MII=y
> +CONFIG_CMD_PING=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_EXT2=y
> +CONFIG_CMD_EXT4=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> +CONFIG_CMD_UBI=y
> +CONFIG_DM=y
> +CONFIG_NETDEVICES=y
> +CONFIG_E1000=y
> +CONFIG_PCI=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_USB=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_KEYBOARD=y
> +CONFIG_USB_GADGET=y
> +CONFIG_CI_UDC=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> +CONFIG_G_DNL_MANUFACTURER="Gateworks"
> +CONFIG_G_DNL_VENDOR_NUM=0x0525
> +CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
> +# CONFIG_VIDEO_SW_CURSOR is not set
> +CONFIG_OF_LIBFDT=y
> +CONFIG_FDT_FIXUP_PARTITIONS=y
> +CONFIG_MV88E61XX_SWITCH=y
> +CONFIG_MV88E61XX_CPU_PORT=5
> +CONFIG_MV88E61XX_PHY_PORTS=0xf
> +CONFIG_MV88E61XX_FIXED_PORTS=0x0
> +
> 

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 12/14] imx: ventana: add GW560x support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 181 ++++++++++++++++++++++++----
 board/gateworks/gw_ventana/eeprom.c         |   4 +
 board/gateworks/gw_ventana/gsc.c            |   4 +
 board/gateworks/gw_ventana/gw_ventana.c     |   4 +-
 board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
 include/configs/gw_ventana.h                |   1 -
 6 files changed, 167 insertions(+), 28 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index f7e93e2..69dc8fc 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -51,6 +51,20 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
+/* 8-bit eMMC on SD2/NAND */
+static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
+	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
 static iomux_v3_cfg_t const usdhc3_pads[] = {
 	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -365,6 +379,39 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
 	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
+	/* RS232_EN# */
+	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+	/* CAN_STBY */
+	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
+	/* USB_HUBRST# */
+	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
+	/* PANLEDG# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* PANLEDR# */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* IOEXP_PWREN# */
+	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
+	/* IOEXP_IRQ# */
+	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+	/* DIOI2C_DIS# */
+	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
+	/* VID_EN */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* PCI_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT10__GPIO4_IO31 | DIO_PAD_CFG),
+	/* RS485_EN */
+	IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
+	/* PCIESKT_WDIS# */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* USBH2_PEN (OTG) */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* 12V0_PWR_EN */
+	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
+};
+
 static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	/* USB_HUBRST# */
 	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
@@ -614,6 +661,33 @@ struct dio_cfg gw553x_dio[] = {
 	},
 };
 
+struct dio_cfg gw560x_dio[] = {
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+		IMX_GPIO_NR(1, 16),
+		{ 0, 0 },
+		0
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+		IMX_GPIO_NR(1, 19),
+		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+		2
+	},
+	{
+		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+		IMX_GPIO_NR(1, 17),
+		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+		3
+	},
+	{
+		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
+		IMX_GPIO_NR(1, 20),
+		{ 0, 0 },
+		0
+	},
+};
+
 struct dio_cfg gw5904_dio[] = {
 	{
 		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
@@ -856,6 +930,27 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
+	/* GW560x */
+	{
+		.gpio_pads = gw560x_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw560x_gpio_pads)/2,
+		.dio_cfg = gw560x_dio,
+		.dio_num = ARRAY_SIZE(gw560x_dio),
+		.leds = {
+			IMX_GPIO_NR(4, 6),
+			IMX_GPIO_NR(4, 7),
+			IMX_GPIO_NR(4, 15),
+		},
+		.pcie_rst = IMX_GPIO_NR(4, 31),
+		.mezz_pwren = IMX_GPIO_NR(2, 19),
+		.mezz_irq = IMX_GPIO_NR(2, 18),
+		.rs232_en = GP_RS232_EN,
+		.vidin_en = IMX_GPIO_NR(3, 31),
+		.wdis = IMX_GPIO_NR(7, 12),
+		.otgpwr_en = IMX_GPIO_NR(4, 15),
+		.mmc_cd = IMX_GPIO_NR(7, 0),
+	},
+
 	/* GW5904 */
 	{
 		.gpio_pads = gw5904_gpio_pads,
@@ -982,6 +1077,10 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 
 	/* Anything else board specific */
 	switch(board) {
+	case GW560x:
+		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
+		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
+		break;
 	case GW5904:
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
@@ -1089,6 +1188,8 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
 void setup_pmic(void)
 {
 	struct pmic *p;
+	struct ventana_board_info ventana_info;
+	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
 	u32 reg;
 
 	i2c_set_bus_num(CONFIG_I2C_PMIC);
@@ -1121,23 +1222,27 @@ void setup_pmic(void)
 		debug("probed LTC3676 at 0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
 		power_ltc3676_init(CONFIG_I2C_PMIC);
 		p = pmic_get("LTC3676_PMIC");
-		if (p && !pmic_probe(p)) {
-			puts("PMIC:  LTC3676\n");
-			/*
-			 * set board-specific scalar for max CPU frequency
-			 * per CPU based on the LDO enabled Operating Ranges
-			 * defined in the respective IMX6DQ and IMX6SDL
-			 * datasheets. The voltage resulting from the R1/R2
-			 * feedback inputs on Ventana is 1308mV. Note that this
-			 * is a bit shy of the Vmin of 1350mV in the datasheet
-			 * for LDO enabled mode but is as high as we can go.
-			 *
-			 * We will rely on an OS kernel driver to properly
-			 * regulate these per CPU operating point and use LDO
-			 * bypass mode when using the higher frequency
-			 * operating points to compensate as LDO bypass mode
-			 * allows the rails be 125mV lower.
-			 */
+		if (!p || pmic_probe(p))
+			return;
+		puts("PMIC:  LTC3676\n");
+		/*
+		 * set board-specific scalar for max CPU frequency
+		 * per CPU based on the LDO enabled Operating Ranges
+		 * defined in the respective IMX6DQ and IMX6SDL
+		 * datasheets. The voltage resulting from the R1/R2
+		 * feedback inputs on Ventana is 1308mV. Note that this
+		 * is a bit shy of the Vmin of 1350mV in the datasheet
+		 * for LDO enabled mode but is as high as we can go.
+		 */
+		switch (board) {
+		case GW560x:
+			/* mask PGOOD during SW3 transition */
+			pmic_reg_write(p, LTC3676_DVB3B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW3 (VDD_ARM) */
+			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
+			break;
+		default:
 			/* mask PGOOD during SW1 transition */
 			pmic_reg_write(p, LTC3676_DVB1B,
 				       0x1f | LTC3676_PGOOD_MASK);
@@ -1154,7 +1259,7 @@ void setup_pmic(void)
 }
 
 #ifdef CONFIG_FSL_ESDHC
-static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
+static struct fsl_esdhc_cfg usdhc_cfg[2];
 
 int board_mmc_init(bd_t *bis)
 {
@@ -1168,17 +1273,36 @@ int board_mmc_init(bd_t *bis)
 	case GW54xx:
 	case GW553x:
 		SETUP_IOMUX_PADS(usdhc3_pads);
-		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
-		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-		usdhc_cfg.max_bus_width = 4;
-		return fsl_esdhc_initialize(bis, &usdhc_cfg);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+	/* GW560x has 0:SD2 (emmc) and 1:SD3 (microSD) */
+	case GW560x:
+		/* usdhc2: 8-bit eMMC */
+		SETUP_IOMUX_PADS(gw560x_emmc_sd2_pads);
+		usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+		if (ret)
+			printf("failed registering emmc usdhc2\n");
+		/* usdhc3: 4-bit microSD */
+		SETUP_IOMUX_PADS(usdhc3_pads);
+		usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[1].max_bus_width = 4;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
+		if (ret)
+			printf("failed registering microSD usdhc2\n");
+		return 0;
 	case GW5904:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
-		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
-		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-		usdhc_cfg.max_bus_width = 8;
-		ret = fsl_esdhc_initialize(bis, &usdhc_cfg);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
 		if (ret)
 			printf("failed registering emmc usdhc3\n");
 		return 0;
@@ -1197,6 +1321,11 @@ int board_mmc_getcd(struct mmc *mmc)
 
 	/* Card Detect */
 	switch (board) {
+	case GW560x:
+		/* emmc is always present */
+		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
+			return 1;
+		break;
 	case GW5904:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 9a1033a..cfd96b9 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -93,6 +93,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			break;
 		}
 		break;
+	case '6':
+		if (info->model[4] == '0')
+			type = GW560x;
+		break;
 	case '9':
 		if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 613a275..68b1ddb 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -137,6 +137,10 @@ int gsc_info(int verbose)
 		break;
 	case '5': /* GW55xx */
 		break;
+	case '6': /* GW560x */
+		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3);
+		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
+		break;
 	}
 	return 0;
 }
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 0768799..5f25d8d 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -694,6 +694,7 @@ int checkboard(void)
 static const struct boot_mode board_boot_modes[] = {
 	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
 	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
+	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
 	{ NULL, 0 },
 };
 #endif
@@ -745,7 +746,8 @@ int misc_init_r(void)
 			setenv("fdt_file1", fdt);
 			if (board_type != GW551x &&
 			    board_type != GW552x &&
-			    board_type != GW553x)
+			    board_type != GW553x &&
+			    board_type != GW560x)
 				str[4] = 'x';
 			str[5] = 'x';
 			str[6] = 0;
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index bacaf5a..b6daf9b 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -112,6 +112,7 @@ enum {
 	GW551x,
 	GW552x,
 	GW553x,
+	GW560x,
 	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 1606f20..9c08fe3 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -100,7 +100,6 @@
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
-#define CONFIG_SYS_FSL_USDHC_NUM       1
 
 /* Filesystem support */
 #define CONFIG_CMD_UBIFS
-- 
2.7.4

[U-Boot] [PATCH 12/14] imx: ventana: add GW560x support

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c         | 181 ++++++++++++++++++++++++----
>  board/gateworks/gw_ventana/eeprom.c         |   4 +
>  board/gateworks/gw_ventana/gsc.c            |   4 +
>  board/gateworks/gw_ventana/gw_ventana.c     |   4 +-
>  board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
>  include/configs/gw_ventana.h                |   1 -
>  6 files changed, 167 insertions(+), 28 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index f7e93e2..69dc8fc 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -51,6 +51,20 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
>  	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  };
> +/* 8-bit eMMC on SD2/NAND */
> +static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
> +	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +};
> +
>  static iomux_v3_cfg_t const usdhc3_pads[] = {
>  	IOMUX_PADS(PAD_SD3_CLK__SD3_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> @@ -365,6 +379,39 @@ static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
>  	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
>  };
>  
> +static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
> +	/* RS232_EN# */
> +	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
> +	/* CAN_STBY */
> +	IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
> +	/* USB_HUBRST# */
> +	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
> +	/* PANLEDG# */
> +	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
> +	/* PANLEDR# */
> +	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
> +	/* MX6_LOCLED# */
> +	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
> +	/* IOEXP_PWREN# */
> +	IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG),
> +	/* IOEXP_IRQ# */
> +	IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
> +	/* DIOI2C_DIS# */
> +	IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG),
> +	/* VID_EN */
> +	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
> +	/* PCI_RST# */
> +	IOMUX_PADS(PAD_DISP0_DAT10__GPIO4_IO31 | DIO_PAD_CFG),
> +	/* RS485_EN */
> +	IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | DIO_PAD_CFG),
> +	/* PCIESKT_WDIS# */
> +	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
> +	/* USBH2_PEN (OTG) */
> +	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
> +	/* 12V0_PWR_EN */
> +	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
> +};
> +
>  static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
>  	/* USB_HUBRST# */
>  	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
> @@ -614,6 +661,33 @@ struct dio_cfg gw553x_dio[] = {
>  	},
>  };
>  
> +struct dio_cfg gw560x_dio[] = {
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
> +		IMX_GPIO_NR(1, 16),
> +		{ 0, 0 },
> +		0
> +	},
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
> +		IMX_GPIO_NR(1, 19),
> +		{ IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
> +		2
> +	},
> +	{
> +		{ IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
> +		IMX_GPIO_NR(1, 17),
> +		{ IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
> +		3
> +	},
> +	{
> +		{IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) },
> +		IMX_GPIO_NR(1, 20),
> +		{ 0, 0 },
> +		0
> +	},
> +};
> +
>  struct dio_cfg gw5904_dio[] = {
>  	{
>  		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
> @@ -856,6 +930,27 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
> +	/* GW560x */
> +	{
> +		.gpio_pads = gw560x_gpio_pads,
> +		.num_pads = ARRAY_SIZE(gw560x_gpio_pads)/2,
> +		.dio_cfg = gw560x_dio,
> +		.dio_num = ARRAY_SIZE(gw560x_dio),
> +		.leds = {
> +			IMX_GPIO_NR(4, 6),
> +			IMX_GPIO_NR(4, 7),
> +			IMX_GPIO_NR(4, 15),
> +		},
> +		.pcie_rst = IMX_GPIO_NR(4, 31),
> +		.mezz_pwren = IMX_GPIO_NR(2, 19),
> +		.mezz_irq = IMX_GPIO_NR(2, 18),
> +		.rs232_en = GP_RS232_EN,
> +		.vidin_en = IMX_GPIO_NR(3, 31),
> +		.wdis = IMX_GPIO_NR(7, 12),
> +		.otgpwr_en = IMX_GPIO_NR(4, 15),
> +		.mmc_cd = IMX_GPIO_NR(7, 0),
> +	},
> +
>  	/* GW5904 */
>  	{
>  		.gpio_pads = gw5904_gpio_pads,
> @@ -982,6 +1077,10 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  
>  	/* Anything else board specific */
>  	switch(board) {
> +	case GW560x:
> +		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
> +		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
> +		break;
>  	case GW5904:
>  		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
>  		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
> @@ -1089,6 +1188,8 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
>  void setup_pmic(void)
>  {
>  	struct pmic *p;
> +	struct ventana_board_info ventana_info;
> +	int board = read_eeprom(CONFIG_I2C_GSC, &ventana_info);
>  	u32 reg;
>  
>  	i2c_set_bus_num(CONFIG_I2C_PMIC);
> @@ -1121,23 +1222,27 @@ void setup_pmic(void)
>  		debug("probed LTC3676 at 0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR);
>  		power_ltc3676_init(CONFIG_I2C_PMIC);
>  		p = pmic_get("LTC3676_PMIC");
> -		if (p && !pmic_probe(p)) {
> -			puts("PMIC:  LTC3676\n");
> -			/*
> -			 * set board-specific scalar for max CPU frequency
> -			 * per CPU based on the LDO enabled Operating Ranges
> -			 * defined in the respective IMX6DQ and IMX6SDL
> -			 * datasheets. The voltage resulting from the R1/R2
> -			 * feedback inputs on Ventana is 1308mV. Note that this
> -			 * is a bit shy of the Vmin of 1350mV in the datasheet
> -			 * for LDO enabled mode but is as high as we can go.
> -			 *
> -			 * We will rely on an OS kernel driver to properly
> -			 * regulate these per CPU operating point and use LDO
> -			 * bypass mode when using the higher frequency
> -			 * operating points to compensate as LDO bypass mode
> -			 * allows the rails be 125mV lower.
> -			 */
> +		if (!p || pmic_probe(p))
> +			return;
> +		puts("PMIC:  LTC3676\n");
> +		/*
> +		 * set board-specific scalar for max CPU frequency
> +		 * per CPU based on the LDO enabled Operating Ranges
> +		 * defined in the respective IMX6DQ and IMX6SDL
> +		 * datasheets. The voltage resulting from the R1/R2
> +		 * feedback inputs on Ventana is 1308mV. Note that this
> +		 * is a bit shy of the Vmin of 1350mV in the datasheet
> +		 * for LDO enabled mode but is as high as we can go.
> +		 */
> +		switch (board) {
> +		case GW560x:
> +			/* mask PGOOD during SW3 transition */
> +			pmic_reg_write(p, LTC3676_DVB3B,
> +				       0x1f | LTC3676_PGOOD_MASK);
> +			/* set SW3 (VDD_ARM) */
> +			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
> +			break;
> +		default:
>  			/* mask PGOOD during SW1 transition */
>  			pmic_reg_write(p, LTC3676_DVB1B,
>  				       0x1f | LTC3676_PGOOD_MASK);
> @@ -1154,7 +1259,7 @@ void setup_pmic(void)
>  }
>  
>  #ifdef CONFIG_FSL_ESDHC
> -static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
> +static struct fsl_esdhc_cfg usdhc_cfg[2];
>  
>  int board_mmc_init(bd_t *bis)
>  {
> @@ -1168,17 +1273,36 @@ int board_mmc_init(bd_t *bis)
>  	case GW54xx:
>  	case GW553x:
>  		SETUP_IOMUX_PADS(usdhc3_pads);
> -		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
> -		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> -		usdhc_cfg.max_bus_width = 4;
> -		return fsl_esdhc_initialize(bis, &usdhc_cfg);
> +		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg[0].max_bus_width = 4;
> +		return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
> +	/* GW560x has 0:SD2 (emmc) and 1:SD3 (microSD) */
> +	case GW560x:
> +		/* usdhc2: 8-bit eMMC */
> +		SETUP_IOMUX_PADS(gw560x_emmc_sd2_pads);
> +		usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
> +		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
> +		usdhc_cfg[0].max_bus_width = 8;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
> +		if (ret)
> +			printf("failed registering emmc usdhc2\n");
> +		/* usdhc3: 4-bit microSD */
> +		SETUP_IOMUX_PADS(usdhc3_pads);
> +		usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg[1].max_bus_width = 4;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
> +		if (ret)
> +			printf("failed registering microSD usdhc2\n");
> +		return 0;
>  	case GW5904:
>  		/* usdhc3: 8bit eMMC */
>  		SETUP_IOMUX_PADS(gw5904_emmc_pads);
> -		usdhc_cfg.esdhc_base = USDHC3_BASE_ADDR;
> -		usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> -		usdhc_cfg.max_bus_width = 8;
> -		ret = fsl_esdhc_initialize(bis, &usdhc_cfg);
> +		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg[0].max_bus_width = 8;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
>  		if (ret)
>  			printf("failed registering emmc usdhc3\n");
>  		return 0;
> @@ -1197,6 +1321,11 @@ int board_mmc_getcd(struct mmc *mmc)
>  
>  	/* Card Detect */
>  	switch (board) {
> +	case GW560x:
> +		/* emmc is always present */
> +		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
> +			return 1;
> +		break;
>  	case GW5904:
>  		/* emmc is always present */
>  		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
> diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
> index 9a1033a..cfd96b9 100644
> --- a/board/gateworks/gw_ventana/eeprom.c
> +++ b/board/gateworks/gw_ventana/eeprom.c
> @@ -93,6 +93,10 @@ read_eeprom(int bus, struct ventana_board_info *info)
>  			break;
>  		}
>  		break;
> +	case '6':
> +		if (info->model[4] == '0')
> +			type = GW560x;
> +		break;
>  	case '9':
>  		if (info->model[4] == '0' && info->model[5] == '4')
>  			type = GW5904;
> diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
> index 613a275..68b1ddb 100644
> --- a/board/gateworks/gw_ventana/gsc.c
> +++ b/board/gateworks/gw_ventana/gsc.c
> @@ -137,6 +137,10 @@ int gsc_info(int verbose)
>  		break;
>  	case '5': /* GW55xx */
>  		break;
> +	case '6': /* GW560x */
> +		read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3);
> +		read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
> +		break;
>  	}
>  	return 0;
>  }
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 0768799..5f25d8d 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -694,6 +694,7 @@ int checkboard(void)
>  static const struct boot_mode board_boot_modes[] = {
>  	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
>  	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
> +	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
>  	{ NULL, 0 },
>  };
>  #endif
> @@ -745,7 +746,8 @@ int misc_init_r(void)
>  			setenv("fdt_file1", fdt);
>  			if (board_type != GW551x &&
>  			    board_type != GW552x &&
> -			    board_type != GW553x)
> +			    board_type != GW553x &&
> +			    board_type != GW560x)
>  				str[4] = 'x';
>  			str[5] = 'x';
>  			str[6] = 0;
> diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
> index bacaf5a..b6daf9b 100644
> --- a/board/gateworks/gw_ventana/ventana_eeprom.h
> +++ b/board/gateworks/gw_ventana/ventana_eeprom.h
> @@ -112,6 +112,7 @@ enum {
>  	GW551x,
>  	GW552x,
>  	GW553x,
> +	GW560x,
>  	GW5904,
>  	GW_UNKNOWN,
>  	GW_BADCRC,
> diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
> index 1606f20..9c08fe3 100644
> --- a/include/configs/gw_ventana.h
> +++ b/include/configs/gw_ventana.h
> @@ -100,7 +100,6 @@
>  
>  /* MMC Configs */
>  #define CONFIG_SYS_FSL_ESDHC_ADDR      0
> -#define CONFIG_SYS_FSL_USDHC_NUM       1
>  
>  /* Filesystem support */
>  #define CONFIG_CMD_UBIFS
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH 13/14] imx: ventana: add GW5903 support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 103 ++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |   2 +
 board/gateworks/gw_ventana/gw_ventana.c     |  13 ++++
 board/gateworks/gw_ventana/gw_ventana_spl.c |  42 ++++++++++--
 board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
 5 files changed, 157 insertions(+), 4 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 69dc8fc..188f7f5 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -51,6 +51,17 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
+/* 4-bit microSD on SD2 */
+static iomux_v3_cfg_t const gw5904_mmc_pads[] = {
+	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	/* CD */
+	IOMUX_PADS(PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
 /* 8-bit eMMC on SD2/NAND */
 static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
 	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -412,6 +423,39 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
 	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
+	/* BKLT_12VEN */
+	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+	/* EMMY_PDN# */
+	IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | DIO_PAD_CFG),
+	/* EMMY_CFG1# */
+	IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | DIO_PAD_CFG),
+	/* EMMY_CFG1# */
+	IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | DIO_PAD_CFG),
+	/* USBH1_PEN (EHCI) */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* USBH2_PEN (OTG) */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* USBDPC_PEN */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* TOUCH_RST */
+	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
+	/* AUDIO_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+	/* UART1_TEN# */
+	IOMUX_PADS(PAD_CSI0_DAT12__GPIO5_IO30 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+	/* LVDS_BKLEN # */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* RGMII_PDWN# */
+	IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | DIO_PAD_CFG),
+	/* TOUCH_IRQ# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* TOUCH_RST# */
+	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
+};
+
 static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	/* USB_HUBRST# */
 	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
@@ -688,6 +732,9 @@ struct dio_cfg gw560x_dio[] = {
 	},
 };
 
+struct dio_cfg gw5903_dio[] = {
+};
+
 struct dio_cfg gw5904_dio[] = {
 	{
 		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
@@ -951,6 +998,19 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
+	/* GW5903 */
+	{
+		.gpio_pads = gw5903_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5903_gpio_pads)/2,
+		.dio_cfg = gw5903_dio,
+		.dio_num = ARRAY_SIZE(gw5903_dio),
+		.leds = {
+			IMX_GPIO_NR(6, 14),
+		},
+		.otgpwr_en = IMX_GPIO_NR(4, 15),
+		.mmc_cd = IMX_GPIO_NR(6, 11),
+	},
+
 	/* GW5904 */
 	{
 		.gpio_pads = gw5904_gpio_pads,
@@ -1081,6 +1141,22 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
 		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
 		break;
+	case GW5903:
+		gpio_request(IMX_GPIO_NR(3, 31) , "usbh1-ehci_pwr");
+		gpio_direction_output(IMX_GPIO_NR(3, 31), 1);
+		gpio_request(IMX_GPIO_NR(4, 15) , "usbh2-otg_pwr");
+		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
+		gpio_request(IMX_GPIO_NR(4, 7) , "usbdpc_pwr");
+		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
+		gpio_request(IMX_GPIO_NR(1, 25) , "rgmii_en");
+		gpio_direction_output(IMX_GPIO_NR(1, 25), 1);
+		gpio_request(IMX_GPIO_NR(4, 6) , "touch_irq#");
+		gpio_direction_input(IMX_GPIO_NR(4, 6));
+		gpio_request(IMX_GPIO_NR(4, 8) , "touch_rst");
+		gpio_direction_output(IMX_GPIO_NR(4, 8), 1);
+		gpio_request(IMX_GPIO_NR(1, 7) , "bklt_12ven");
+		gpio_direction_output(IMX_GPIO_NR(1, 7), 1);
+		break;
 	case GW5904:
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
@@ -1242,6 +1318,13 @@ void setup_pmic(void)
 			/* set SW3 (VDD_ARM) */
 			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
 			break;
+		case GW5903:
+			/* mask PGOOD during SW4 transition */
+			pmic_reg_write(p, LTC3676_DVB4B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW4 (VDD_SOC) */
+			pmic_reg_write(p, LTC3676_DVB4A, 0x1f);
+			break;
 		default:
 			/* mask PGOOD during SW1 transition */
 			pmic_reg_write(p, LTC3676_DVB1B,
@@ -1296,6 +1379,25 @@ int board_mmc_init(bd_t *bis)
 		if (ret)
 			printf("failed registering microSD usdhc2\n");
 		return 0;
+	/* GW5903 has 0:SD3 (emmc) and 0:SD2 (microSD) */
+	case GW5903:
+		/* usdhc3: 8-bit eMMC */
+		SETUP_IOMUX_PADS(gw5904_emmc_pads);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+		if (ret)
+			printf("failed registering emmc usdhc3\n");
+		/* usdhc2: 4-bit microSD */
+		SETUP_IOMUX_PADS(gw5904_mmc_pads);
+		usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
+		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+		usdhc_cfg[1].max_bus_width = 4;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
+		if (ret)
+			printf("failed registering microSD usdhc2\n");
+		return 0;
 	case GW5904:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
@@ -1326,6 +1428,7 @@ int board_mmc_getcd(struct mmc *mmc)
 		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
 			return 1;
 		break;
+	case GW5903:
 	case GW5904:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index cfd96b9..2c07a84 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -98,6 +98,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW560x;
 		break;
 	case '9':
+		if (info->model[4] == '0' && info->model[5] == '3')
+			type = GW5903;
 		if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
 		break;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 5f25d8d..dc8cd88 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -227,6 +227,18 @@ int board_phy_config(struct phy_device *phydev)
 		phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
 	}
 
+	/* TI DP83867 */
+	else if (phydev->phy_id == 0x2000a231) {
+		/* configure register 0x170 for ref CLKOUT */
+		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x001f);
+		phy_write(phydev, MDIO_DEVAD_NONE, 14, 0x0170);
+		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x401f);
+		val = phy_read(phydev, MDIO_DEVAD_NONE, 14);
+		val &= ~0x1f00;
+		val |= 0x0b00; /* chD tx clock*/
+		phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
+	}
+
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
 
@@ -695,6 +707,7 @@ static const struct boot_mode board_boot_modes[] = {
 	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
 	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
 	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
+	{ "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/GW5904 */
 	{ NULL, 0 },
 };
 #endif
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 136b5fc..6060b44 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -374,6 +374,25 @@ static struct mx6_mmdc_calibration mx6sdl_256x64_mmdc_calib = {
 	.p1_mpwrdlctl = 0x383A3930,
 };
 
+static struct mx6_mmdc_calibration mx6sdl_256x64x2_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x001F003F,
+	.p0_mpwldectrl1 = 0x001F001F,
+	.p1_mpwldectrl0 = 0x001F004E,
+	.p1_mpwldectrl1 = 0x0059001F,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0   = 0x42220225,
+	.p0_mpdgctrl1   = 0x0213021F,
+	.p1_mpdgctrl0   = 0x022C0242,
+	.p1_mpdgctrl1   = 0x022C0244,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl   = 0x474A4C4A,
+	.p1_mprddlctl   = 0x48494C45,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl   = 0x3F3F3F36,
+	.p1_mpwrdlctl   = 0x3F36363F,
+};
+
 static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
 	/* write leveling calibration determine */
 	.p0_mpwldectrl0 = 0x002A0025,
@@ -510,10 +529,25 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 			calib = &mx6sdl_256x64_mmdc_calib;
 		debug("4gB density\n");
 	} else if (width == 64 && size_mb == 4096) {
-		mem = &mt41k512m16ha_125;
-		if (is_cpu_type(MXC_CPU_MX6Q))
-			calib = &mx6dq_512x64_mmdc_calib;
-		debug("8gB density\n");
+		switch(board_model) {
+		case GW5903:
+			/* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */
+			mem = &mt41k256m16ha_125;
+			debug("4gB density\n");
+			if (!is_cpu_type(MXC_CPU_MX6Q)) {
+				calib = &mx6sdl_256x64x2_mmdc_calib;
+				sysinfo.ncs = 2;
+				sysinfo.cs_density = 18; /* CS0_END=71 */
+				sysinfo.cs1_mirror = 1; /* mirror enabled */
+			}
+			break;
+		default:
+			mem = &mt41k512m16ha_125;
+			if (is_cpu_type(MXC_CPU_MX6Q))
+				calib = &mx6dq_512x64_mmdc_calib;
+			debug("8gB density\n");
+			break;
+		}
 	}
 
 	if (!(mem && calib)) {
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index b6daf9b..8a42d67 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -113,6 +113,7 @@ enum {
 	GW552x,
 	GW553x,
 	GW560x,
+	GW5903,
 	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
-- 
2.7.4

[U-Boot] [PATCH 13/14] imx: ventana: add GW5903 support

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c         | 103 ++++++++++++++++++++++++++++
>  board/gateworks/gw_ventana/eeprom.c         |   2 +
>  board/gateworks/gw_ventana/gw_ventana.c     |  13 ++++
>  board/gateworks/gw_ventana/gw_ventana_spl.c |  42 ++++++++++--
>  board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
>  5 files changed, 157 insertions(+), 4 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
> index 69dc8fc..188f7f5 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -51,6 +51,17 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
>  	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  };
> +/* 4-bit microSD on SD2 */
> +static iomux_v3_cfg_t const gw5904_mmc_pads[] = {
> +	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +	/* CD */
> +	IOMUX_PADS(PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +};
>  /* 8-bit eMMC on SD2/NAND */
>  static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
>  	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> @@ -412,6 +423,39 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
>  	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
>  };
>  
> +static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
> +	/* BKLT_12VEN */
> +	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
> +	/* EMMY_PDN# */
> +	IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | DIO_PAD_CFG),
> +	/* EMMY_CFG1# */
> +	IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | DIO_PAD_CFG),
> +	/* EMMY_CFG1# */
> +	IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | DIO_PAD_CFG),
> +	/* USBH1_PEN (EHCI) */
> +	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
> +	/* USBH2_PEN (OTG) */
> +	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
> +	/* USBDPC_PEN */
> +	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
> +	/* TOUCH_RST */
> +	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
> +	/* AUDIO_RST# */
> +	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
> +	/* UART1_TEN# */
> +	IOMUX_PADS(PAD_CSI0_DAT12__GPIO5_IO30 | DIO_PAD_CFG),
> +	/* MX6_LOCLED# */
> +	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
> +	/* LVDS_BKLEN # */
> +	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
> +	/* RGMII_PDWN# */
> +	IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | DIO_PAD_CFG),
> +	/* TOUCH_IRQ# */
> +	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
> +	/* TOUCH_RST# */
> +	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
> +};
> +
>  static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
>  	/* USB_HUBRST# */
>  	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
> @@ -688,6 +732,9 @@ struct dio_cfg gw560x_dio[] = {
>  	},
>  };
>  
> +struct dio_cfg gw5903_dio[] = {
> +};
> +
>  struct dio_cfg gw5904_dio[] = {
>  	{
>  		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
> @@ -951,6 +998,19 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>  		.mmc_cd = IMX_GPIO_NR(7, 0),
>  	},
>  
> +	/* GW5903 */
> +	{
> +		.gpio_pads = gw5903_gpio_pads,
> +		.num_pads = ARRAY_SIZE(gw5903_gpio_pads)/2,
> +		.dio_cfg = gw5903_dio,
> +		.dio_num = ARRAY_SIZE(gw5903_dio),
> +		.leds = {
> +			IMX_GPIO_NR(6, 14),
> +		},
> +		.otgpwr_en = IMX_GPIO_NR(4, 15),
> +		.mmc_cd = IMX_GPIO_NR(6, 11),
> +	},
> +
>  	/* GW5904 */
>  	{
>  		.gpio_pads = gw5904_gpio_pads,
> @@ -1081,6 +1141,22 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
>  		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
>  		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
>  		break;
> +	case GW5903:
> +		gpio_request(IMX_GPIO_NR(3, 31) , "usbh1-ehci_pwr");
> +		gpio_direction_output(IMX_GPIO_NR(3, 31), 1);
> +		gpio_request(IMX_GPIO_NR(4, 15) , "usbh2-otg_pwr");
> +		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
> +		gpio_request(IMX_GPIO_NR(4, 7) , "usbdpc_pwr");
> +		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
> +		gpio_request(IMX_GPIO_NR(1, 25) , "rgmii_en");
> +		gpio_direction_output(IMX_GPIO_NR(1, 25), 1);
> +		gpio_request(IMX_GPIO_NR(4, 6) , "touch_irq#");
> +		gpio_direction_input(IMX_GPIO_NR(4, 6));
> +		gpio_request(IMX_GPIO_NR(4, 8) , "touch_rst");
> +		gpio_direction_output(IMX_GPIO_NR(4, 8), 1);
> +		gpio_request(IMX_GPIO_NR(1, 7) , "bklt_12ven");
> +		gpio_direction_output(IMX_GPIO_NR(1, 7), 1);
> +		break;
>  	case GW5904:
>  		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
>  		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
> @@ -1242,6 +1318,13 @@ void setup_pmic(void)
>  			/* set SW3 (VDD_ARM) */
>  			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
>  			break;
> +		case GW5903:
> +			/* mask PGOOD during SW4 transition */
> +			pmic_reg_write(p, LTC3676_DVB4B,
> +				       0x1f | LTC3676_PGOOD_MASK);
> +			/* set SW4 (VDD_SOC) */
> +			pmic_reg_write(p, LTC3676_DVB4A, 0x1f);
> +			break;
>  		default:
>  			/* mask PGOOD during SW1 transition */
>  			pmic_reg_write(p, LTC3676_DVB1B,
> @@ -1296,6 +1379,25 @@ int board_mmc_init(bd_t *bis)
>  		if (ret)
>  			printf("failed registering microSD usdhc2\n");
>  		return 0;
> +	/* GW5903 has 0:SD3 (emmc) and 0:SD2 (microSD) */
> +	case GW5903:
> +		/* usdhc3: 8-bit eMMC */
> +		SETUP_IOMUX_PADS(gw5904_emmc_pads);
> +		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
> +		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +		usdhc_cfg[0].max_bus_width = 8;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
> +		if (ret)
> +			printf("failed registering emmc usdhc3\n");
> +		/* usdhc2: 4-bit microSD */
> +		SETUP_IOMUX_PADS(gw5904_mmc_pads);
> +		usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
> +		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
> +		usdhc_cfg[1].max_bus_width = 4;
> +		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
> +		if (ret)
> +			printf("failed registering microSD usdhc2\n");
> +		return 0;
>  	case GW5904:
>  		/* usdhc3: 8bit eMMC */
>  		SETUP_IOMUX_PADS(gw5904_emmc_pads);
> @@ -1326,6 +1428,7 @@ int board_mmc_getcd(struct mmc *mmc)
>  		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
>  			return 1;
>  		break;
> +	case GW5903:
>  	case GW5904:
>  		/* emmc is always present */
>  		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
> diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
> index cfd96b9..2c07a84 100644
> --- a/board/gateworks/gw_ventana/eeprom.c
> +++ b/board/gateworks/gw_ventana/eeprom.c
> @@ -98,6 +98,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
>  			type = GW560x;
>  		break;
>  	case '9':
> +		if (info->model[4] == '0' && info->model[5] == '3')
> +			type = GW5903;
>  		if (info->model[4] == '0' && info->model[5] == '4')
>  			type = GW5904;
>  		break;
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
> index 5f25d8d..dc8cd88 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -227,6 +227,18 @@ int board_phy_config(struct phy_device *phydev)
>  		phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
>  	}
>  
> +	/* TI DP83867 */
> +	else if (phydev->phy_id == 0x2000a231) {
> +		/* configure register 0x170 for ref CLKOUT */
> +		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x001f);
> +		phy_write(phydev, MDIO_DEVAD_NONE, 14, 0x0170);
> +		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x401f);
> +		val = phy_read(phydev, MDIO_DEVAD_NONE, 14);
> +		val &= ~0x1f00;
> +		val |= 0x0b00; /* chD tx clock*/
> +		phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
> +	}
> +
>  	if (phydev->drv->config)
>  		phydev->drv->config(phydev);
>  
> @@ -695,6 +707,7 @@ static const struct boot_mode board_boot_modes[] = {
>  	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
>  	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
>  	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
> +	{ "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/GW5904 */
>  	{ NULL, 0 },
>  };
>  #endif
> diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
> index 136b5fc..6060b44 100644
> --- a/board/gateworks/gw_ventana/gw_ventana_spl.c
> +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
> @@ -374,6 +374,25 @@ static struct mx6_mmdc_calibration mx6sdl_256x64_mmdc_calib = {
>  	.p1_mpwrdlctl = 0x383A3930,
>  };
>  
> +static struct mx6_mmdc_calibration mx6sdl_256x64x2_mmdc_calib = {
> +	/* write leveling calibration determine */
> +	.p0_mpwldectrl0 = 0x001F003F,
> +	.p0_mpwldectrl1 = 0x001F001F,
> +	.p1_mpwldectrl0 = 0x001F004E,
> +	.p1_mpwldectrl1 = 0x0059001F,
> +	/* Read DQS Gating calibration */
> +	.p0_mpdgctrl0   = 0x42220225,
> +	.p0_mpdgctrl1   = 0x0213021F,
> +	.p1_mpdgctrl0   = 0x022C0242,
> +	.p1_mpdgctrl1   = 0x022C0244,
> +	/* Read Calibration: DQS delay relative to DQ read access */
> +	.p0_mprddlctl   = 0x474A4C4A,
> +	.p1_mprddlctl   = 0x48494C45,
> +	/* Write Calibration: DQ/DM delay relative to DQS write access */
> +	.p0_mpwrdlctl   = 0x3F3F3F36,
> +	.p1_mpwrdlctl   = 0x3F36363F,
> +};
> +
>  static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
>  	/* write leveling calibration determine */
>  	.p0_mpwldectrl0 = 0x002A0025,
> @@ -510,10 +529,25 @@ static void spl_dram_init(int width, int size_mb, int board_model)
>  			calib = &mx6sdl_256x64_mmdc_calib;
>  		debug("4gB density\n");
>  	} else if (width == 64 && size_mb == 4096) {
> -		mem = &mt41k512m16ha_125;
> -		if (is_cpu_type(MXC_CPU_MX6Q))
> -			calib = &mx6dq_512x64_mmdc_calib;
> -		debug("8gB density\n");
> +		switch(board_model) {
> +		case GW5903:
> +			/* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */
> +			mem = &mt41k256m16ha_125;
> +			debug("4gB density\n");
> +			if (!is_cpu_type(MXC_CPU_MX6Q)) {
> +				calib = &mx6sdl_256x64x2_mmdc_calib;
> +				sysinfo.ncs = 2;
> +				sysinfo.cs_density = 18; /* CS0_END=71 */
> +				sysinfo.cs1_mirror = 1; /* mirror enabled */
> +			}
> +			break;
> +		default:
> +			mem = &mt41k512m16ha_125;
> +			if (is_cpu_type(MXC_CPU_MX6Q))
> +				calib = &mx6dq_512x64_mmdc_calib;
> +			debug("8gB density\n");
> +			break;
> +		}
>  	}
>  
>  	if (!(mem && calib)) {
> diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
> index b6daf9b..8a42d67 100644
> --- a/board/gateworks/gw_ventana/ventana_eeprom.h
> +++ b/board/gateworks/gw_ventana/ventana_eeprom.h
> @@ -113,6 +113,7 @@ enum {
>  	GW552x,
>  	GW553x,
>  	GW560x,
> +	GW5903,
>  	GW5904,
>  	GW_UNKNOWN,
>  	GW_BADCRC,
> 
Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v2 13/14] imx: ventana: add GW5903 support

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2:
- remove unecessary/inconsistent print on error registering esdhc

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/common.c         | 99 +++++++++++++++++++++++++++++
 board/gateworks/gw_ventana/eeprom.c         |  2 +
 board/gateworks/gw_ventana/gw_ventana.c     | 13 ++++
 board/gateworks/gw_ventana/gw_ventana_spl.c | 42 ++++++++++--
 board/gateworks/gw_ventana/ventana_eeprom.h |  1 +
 5 files changed, 153 insertions(+), 4 deletions(-)

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 017494f..ec04060 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -51,6 +51,17 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
 	IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 	IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
+/* 4-bit microSD on SD2 */
+static iomux_v3_cfg_t const gw5904_mmc_pads[] = {
+	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+	/* CD */
+	IOMUX_PADS(PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
 /* 8-bit eMMC on SD2/NAND */
 static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
 	IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
@@ -412,6 +423,39 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
 	IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
+	/* BKLT_12VEN */
+	IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
+	/* EMMY_PDN# */
+	IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | DIO_PAD_CFG),
+	/* EMMY_CFG1# */
+	IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | DIO_PAD_CFG),
+	/* EMMY_CFG1# */
+	IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | DIO_PAD_CFG),
+	/* USBH1_PEN (EHCI) */
+	IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
+	/* USBH2_PEN (OTG) */
+	IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
+	/* USBDPC_PEN */
+	IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
+	/* TOUCH_RST */
+	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
+	/* AUDIO_RST# */
+	IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
+	/* UART1_TEN# */
+	IOMUX_PADS(PAD_CSI0_DAT12__GPIO5_IO30 | DIO_PAD_CFG),
+	/* MX6_LOCLED# */
+	IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
+	/* LVDS_BKLEN # */
+	IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+	/* RGMII_PDWN# */
+	IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | DIO_PAD_CFG),
+	/* TOUCH_IRQ# */
+	IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
+	/* TOUCH_RST# */
+	IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
+};
+
 static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
 	/* USB_HUBRST# */
 	IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
@@ -688,6 +732,9 @@ struct dio_cfg gw560x_dio[] = {
 	},
 };
 
+struct dio_cfg gw5903_dio[] = {
+};
+
 struct dio_cfg gw5904_dio[] = {
 	{
 		{ IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
@@ -951,6 +998,19 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
 		.mmc_cd = IMX_GPIO_NR(7, 0),
 	},
 
+	/* GW5903 */
+	{
+		.gpio_pads = gw5903_gpio_pads,
+		.num_pads = ARRAY_SIZE(gw5903_gpio_pads)/2,
+		.dio_cfg = gw5903_dio,
+		.dio_num = ARRAY_SIZE(gw5903_dio),
+		.leds = {
+			IMX_GPIO_NR(6, 14),
+		},
+		.otgpwr_en = IMX_GPIO_NR(4, 15),
+		.mmc_cd = IMX_GPIO_NR(6, 11),
+	},
+
 	/* GW5904 */
 	{
 		.gpio_pads = gw5904_gpio_pads,
@@ -1087,6 +1147,22 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
 		gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
 		gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
 		break;
+	case GW5903:
+		gpio_request(IMX_GPIO_NR(3, 31) , "usbh1-ehci_pwr");
+		gpio_direction_output(IMX_GPIO_NR(3, 31), 1);
+		gpio_request(IMX_GPIO_NR(4, 15) , "usbh2-otg_pwr");
+		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
+		gpio_request(IMX_GPIO_NR(4, 7) , "usbdpc_pwr");
+		gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
+		gpio_request(IMX_GPIO_NR(1, 25) , "rgmii_en");
+		gpio_direction_output(IMX_GPIO_NR(1, 25), 1);
+		gpio_request(IMX_GPIO_NR(4, 6) , "touch_irq#");
+		gpio_direction_input(IMX_GPIO_NR(4, 6));
+		gpio_request(IMX_GPIO_NR(4, 8) , "touch_rst");
+		gpio_direction_output(IMX_GPIO_NR(4, 8), 1);
+		gpio_request(IMX_GPIO_NR(1, 7) , "bklt_12ven");
+		gpio_direction_output(IMX_GPIO_NR(1, 7), 1);
+		break;
 	case GW5904:
 		gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
 		gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
@@ -1248,6 +1324,13 @@ void setup_pmic(void)
 			/* set SW3 (VDD_ARM) */
 			pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
 			break;
+		case GW5903:
+			/* mask PGOOD during SW4 transition */
+			pmic_reg_write(p, LTC3676_DVB4B,
+				       0x1f | LTC3676_PGOOD_MASK);
+			/* set SW4 (VDD_SOC) */
+			pmic_reg_write(p, LTC3676_DVB4A, 0x1f);
+			break;
 		default:
 			/* mask PGOOD during SW1 transition */
 			pmic_reg_write(p, LTC3676_DVB1B,
@@ -1299,6 +1382,21 @@ int board_mmc_init(bd_t *bis)
 		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 		usdhc_cfg[1].max_bus_width = 4;
 		return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
+	case GW5903:
+		/* usdhc3: 8-bit eMMC */
+		SETUP_IOMUX_PADS(gw5904_emmc_pads);
+		usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+		usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+		usdhc_cfg[0].max_bus_width = 8;
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+		if (ret)
+			return ret;
+		/* usdhc2: 4-bit microSD */
+		SETUP_IOMUX_PADS(gw5904_mmc_pads);
+		usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
+		usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+		usdhc_cfg[1].max_bus_width = 4;
+		return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
 	case GW5904:
 		/* usdhc3: 8bit eMMC */
 		SETUP_IOMUX_PADS(gw5904_emmc_pads);
@@ -1326,6 +1424,7 @@ int board_mmc_getcd(struct mmc *mmc)
 		if (cfg->esdhc_base == USDHC2_BASE_ADDR)
 			return 1;
 		break;
+	case GW5903:
 	case GW5904:
 		/* emmc is always present */
 		if (cfg->esdhc_base == USDHC3_BASE_ADDR)
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index cfd96b9..2c07a84 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -98,6 +98,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
 			type = GW560x;
 		break;
 	case '9':
+		if (info->model[4] == '0' && info->model[5] == '3')
+			type = GW5903;
 		if (info->model[4] == '0' && info->model[5] == '4')
 			type = GW5904;
 		break;
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 5f25d8d..dc8cd88 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -227,6 +227,18 @@ int board_phy_config(struct phy_device *phydev)
 		phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
 	}
 
+	/* TI DP83867 */
+	else if (phydev->phy_id == 0x2000a231) {
+		/* configure register 0x170 for ref CLKOUT */
+		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x001f);
+		phy_write(phydev, MDIO_DEVAD_NONE, 14, 0x0170);
+		phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x401f);
+		val = phy_read(phydev, MDIO_DEVAD_NONE, 14);
+		val &= ~0x1f00;
+		val |= 0x0b00; /* chD tx clock*/
+		phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
+	}
+
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
 
@@ -695,6 +707,7 @@ static const struct boot_mode board_boot_modes[] = {
 	/* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
 	{ "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
 	{ "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
+	{ "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/GW5904 */
 	{ NULL, 0 },
 };
 #endif
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 136b5fc..6060b44 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -374,6 +374,25 @@ static struct mx6_mmdc_calibration mx6sdl_256x64_mmdc_calib = {
 	.p1_mpwrdlctl = 0x383A3930,
 };
 
+static struct mx6_mmdc_calibration mx6sdl_256x64x2_mmdc_calib = {
+	/* write leveling calibration determine */
+	.p0_mpwldectrl0 = 0x001F003F,
+	.p0_mpwldectrl1 = 0x001F001F,
+	.p1_mpwldectrl0 = 0x001F004E,
+	.p1_mpwldectrl1 = 0x0059001F,
+	/* Read DQS Gating calibration */
+	.p0_mpdgctrl0   = 0x42220225,
+	.p0_mpdgctrl1   = 0x0213021F,
+	.p1_mpdgctrl0   = 0x022C0242,
+	.p1_mpdgctrl1   = 0x022C0244,
+	/* Read Calibration: DQS delay relative to DQ read access */
+	.p0_mprddlctl   = 0x474A4C4A,
+	.p1_mprddlctl   = 0x48494C45,
+	/* Write Calibration: DQ/DM delay relative to DQS write access */
+	.p0_mpwrdlctl   = 0x3F3F3F36,
+	.p1_mpwrdlctl   = 0x3F36363F,
+};
+
 static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
 	/* write leveling calibration determine */
 	.p0_mpwldectrl0 = 0x002A0025,
@@ -510,10 +529,25 @@ static void spl_dram_init(int width, int size_mb, int board_model)
 			calib = &mx6sdl_256x64_mmdc_calib;
 		debug("4gB density\n");
 	} else if (width == 64 && size_mb == 4096) {
-		mem = &mt41k512m16ha_125;
-		if (is_cpu_type(MXC_CPU_MX6Q))
-			calib = &mx6dq_512x64_mmdc_calib;
-		debug("8gB density\n");
+		switch(board_model) {
+		case GW5903:
+			/* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */
+			mem = &mt41k256m16ha_125;
+			debug("4gB density\n");
+			if (!is_cpu_type(MXC_CPU_MX6Q)) {
+				calib = &mx6sdl_256x64x2_mmdc_calib;
+				sysinfo.ncs = 2;
+				sysinfo.cs_density = 18; /* CS0_END=71 */
+				sysinfo.cs1_mirror = 1; /* mirror enabled */
+			}
+			break;
+		default:
+			mem = &mt41k512m16ha_125;
+			if (is_cpu_type(MXC_CPU_MX6Q))
+				calib = &mx6dq_512x64_mmdc_calib;
+			debug("8gB density\n");
+			break;
+		}
 	}
 
 	if (!(mem && calib)) {
diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index b6daf9b..8a42d67 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -113,6 +113,7 @@ enum {
 	GW552x,
 	GW553x,
 	GW560x,
+	GW5903,
 	GW5904,
 	GW_UNKNOWN,
 	GW_BADCRC,
-- 
2.7.4

[U-Boot] [PATCH 14/14] imx: ventana: config: add EMMC boot options

[Tim Harvey]

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 include/configs/gw_ventana.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 9c08fe3..057089b 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -101,6 +101,10 @@
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
+/* eMMC Configs */
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_SUPPORT_EMMC_RPMB
+
 /* Filesystem support */
 #define CONFIG_CMD_UBIFS
 
-- 
2.7.4

[U-Boot] [PATCH 00/14] Gateworks Ventana add support for new boards

[Stefano Babic]

On 13/03/2017 16:51, Tim Harvey wrote:
> This is a series of minor cleanups and addition of some new boards in the
> Gateworks Ventana product family.
> 
> Tim Harvey (14):
>   imx: ventana: add additional DRAM configurations
>   imx: ventana: config: add gzwrite support
>   imx: ventana: move mmc_init to common
>   imx: ventana: use mmc_root in boot scripts
>   imx: ventana: change name of rs232_en to indicate polarity
>   imx: ventana: fix hwconfig
>   imx: ventana: make OTG VBUS power enable board specific
>   imx: ventana: make SD3_VSELECT board specific
>   imx: ventana: add EMMC configuration
>   drivers: net: add MV88E6xx to Kconfig
>   imx: ventana: add GW5904 support
>   imx: ventana: add GW560x support
>   imx: ventana: add GW5903 support
>   imx: ventana: config: add EMMC boot options
> 
>  board/gateworks/gw_ventana/README           |  17 +-
>  board/gateworks/gw_ventana/common.c         | 553 ++++++++++++++++++++++++++--
>  board/gateworks/gw_ventana/common.h         |   6 +-
>  board/gateworks/gw_ventana/eeprom.c         |  15 +-
>  board/gateworks/gw_ventana/gsc.c            |   4 +
>  board/gateworks/gw_ventana/gw_ventana.c     |  95 +++--
>  board/gateworks/gw_ventana/gw_ventana_spl.c |  93 +++++
>  board/gateworks/gw_ventana/ventana_eeprom.h |   3 +
>  configs/gwventana_defconfig                 |  64 ----
>  configs/gwventana_emmc_defconfig            |  63 ++++
>  configs/gwventana_gw5904_defconfig          |  68 ++++
>  configs/gwventana_nand_defconfig            |  64 ++++
>  drivers/net/Kconfig                         |  18 +
>  include/configs/gw_ventana.h                |  18 +-
>  14 files changed, 924 insertions(+), 157 deletions(-)
>  delete mode 100644 configs/gwventana_defconfig
>  create mode 100644 configs/gwventana_emmc_defconfig
>  create mode 100644 configs/gwventana_gw5904_defconfig
>  create mode 100644 configs/gwventana_nand_defconfig
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic


-- 
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