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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH 3/4] drm/i915: cpu-map based dumb buffers
Date: Fri, 15 Nov 2019 14:26:17 +0000	[thread overview]
Message-ID: <157382797763.11997.9993566909517942835@skylake-alporthouse-com> (raw)
In-Reply-To: <157382605675.11997.15122826569608431814@skylake-alporthouse-com>

Quoting Chris Wilson (2019-11-15 13:54:16)
> Quoting Abdiel Janulgue (2019-11-15 11:45:48)
> > Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall-
> > back to GTT mmaps when hw doesn't support PAT
> > 
> > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > ---
> >  drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++
> >  drivers/gpu/drm/i915/gem/i915_gem_mman.h |  2 ++
> >  drivers/gpu/drm/i915/i915_drv.c          |  1 +
> >  3 files changed, 21 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index d2ed8a463672..c1756e4f46b9 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file,
> >         return ret;
> >  }
> >  
> > +int
> > +i915_gem_mmap_dumb(struct drm_file *file,
> > +                 struct drm_device *dev,
> > +                 u32 handle,
> > +                 u64 *offset)
> > +{
> > +       enum i915_mmap_type mmap_type;
> > +
> > +       if (boot_cpu_has(X86_FEATURE_PAT))
> > +               mmap_type = I915_MMAP_TYPE_WC;
> > +       else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> > +               return -ENODEV;
> > +       else
> > +               mmap_type = I915_MMAP_TYPE_GTT;
> > +
> > +       return __assign_gem_object_mmap_data(file, handle, mmap_type, offset);
> 
> Looks ok. Just a few nagging doubts about potential existing misuse by
> userspace, such as are very using tiling on their dumb buffer, are they
> passing in a non-dumb handle?

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>

Userspace review pending.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915: cpu-map based dumb buffers
Date: Fri, 15 Nov 2019 14:26:17 +0000	[thread overview]
Message-ID: <157382797763.11997.9993566909517942835@skylake-alporthouse-com> (raw)
Message-ID: <20191115142617.0v-_RHnclLfKgpLHWFDQZlmi9jPPVpkPaN5cz7vfTyc@z> (raw)
In-Reply-To: <157382605675.11997.15122826569608431814@skylake-alporthouse-com>

Quoting Chris Wilson (2019-11-15 13:54:16)
> Quoting Abdiel Janulgue (2019-11-15 11:45:48)
> > Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall-
> > back to GTT mmaps when hw doesn't support PAT
> > 
> > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > ---
> >  drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++++++++++++++
> >  drivers/gpu/drm/i915/gem/i915_gem_mman.h |  2 ++
> >  drivers/gpu/drm/i915/i915_drv.c          |  1 +
> >  3 files changed, 21 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index d2ed8a463672..c1756e4f46b9 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -540,6 +540,24 @@ __assign_gem_object_mmap_data(struct drm_file *file,
> >         return ret;
> >  }
> >  
> > +int
> > +i915_gem_mmap_dumb(struct drm_file *file,
> > +                 struct drm_device *dev,
> > +                 u32 handle,
> > +                 u64 *offset)
> > +{
> > +       enum i915_mmap_type mmap_type;
> > +
> > +       if (boot_cpu_has(X86_FEATURE_PAT))
> > +               mmap_type = I915_MMAP_TYPE_WC;
> > +       else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
> > +               return -ENODEV;
> > +       else
> > +               mmap_type = I915_MMAP_TYPE_GTT;
> > +
> > +       return __assign_gem_object_mmap_data(file, handle, mmap_type, offset);
> 
> Looks ok. Just a few nagging doubts about potential existing misuse by
> userspace, such as are very using tiling on their dumb buffer, are they
> passing in a non-dumb handle?

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>

Userspace review pending.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-11-15 14:26 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-15 11:45 [PATCH 1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Abdiel Janulgue
2019-11-15 11:45 ` [Intel-gfx] " Abdiel Janulgue
2019-11-15 11:45 ` [PATCH 2/4] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET Abdiel Janulgue
2019-11-15 11:45   ` [Intel-gfx] " Abdiel Janulgue
2019-11-15 13:51   ` Chris Wilson
2019-11-15 13:51     ` [Intel-gfx] " Chris Wilson
2019-11-15 14:31   ` Chris Wilson
2019-11-15 14:31     ` [Intel-gfx] " Chris Wilson
2019-11-15 11:45 ` [PATCH 3/4] drm/i915: cpu-map based dumb buffers Abdiel Janulgue
2019-11-15 11:45   ` [Intel-gfx] " Abdiel Janulgue
2019-11-15 13:54   ` Chris Wilson
2019-11-15 13:54     ` [Intel-gfx] " Chris Wilson
2019-11-15 14:26     ` Chris Wilson [this message]
2019-11-15 14:26       ` Chris Wilson
2019-11-15 11:45 ` [PATCH 4/4] drm/i915: Add cpu fault handler for mmap_offset Abdiel Janulgue
2019-11-15 11:45   ` [Intel-gfx] " Abdiel Janulgue
2019-11-15 13:58   ` Chris Wilson
2019-11-15 13:58     ` [Intel-gfx] " Chris Wilson
2019-11-15 13:56 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Patchwork
2019-11-15 13:56   ` [Intel-gfx] " Patchwork
2019-11-15 13:57 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-15 13:57   ` [Intel-gfx] " Patchwork
2019-11-15 14:17 ` [PATCH 1/4] " Chris Wilson
2019-11-15 14:17   ` [Intel-gfx] " Chris Wilson
2019-11-15 14:23 ` ✗ Fi.CI.BAT: failure for series starting with [1/4] " Patchwork
2019-11-15 14:23   ` [Intel-gfx] " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-11-19 11:37 [PATCH 1/4] " Abdiel Janulgue
2019-11-19 11:37 ` [PATCH 3/4] drm/i915: cpu-map based dumb buffers Abdiel Janulgue
2019-11-14 19:09 [PATCH 1/4] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Abdiel Janulgue
2019-11-14 19:09 ` [PATCH 3/4] drm/i915: cpu-map based dumb buffers Abdiel Janulgue

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