From: <stefanc@marvell.com> To: <netdev@vger.kernel.org> Cc: <thomas.petazzoni@bootlin.com>, <davem@davemloft.net>, <nadavh@marvell.com>, <ymarkman@marvell.com>, <linux-kernel@vger.kernel.org>, <stefanc@marvell.com>, <kuba@kernel.org>, <linux@armlinux.org.uk>, <mw@semihalf.com>, <andrew@lunn.ch>, <rmk+kernel@armlinux.org.uk>, <atenart@kernel.org>, <devicetree@vger.kernel.org>, <robh+dt@kernel.org>, <sebastian.hesselbarth@gmail.com>, <gregory.clement@bootlin.com>, <linux-arm-kernel@lists.infradead.org> Subject: [PATCH v13 net-next 13/15] net: mvpp2: add PPv23 RX FIFO flow control Date: Thu, 11 Feb 2021 12:49:00 +0200 [thread overview] Message-ID: <1613040542-16500-14-git-send-email-stefanc@marvell.com> (raw) In-Reply-To: <1613040542-16500-1-git-send-email-stefanc@marvell.com> From: Stefan Chulski <stefanc@marvell.com> New FIFO flow control feature was added in PPv23. PPv2 FIFO polled by HW and trigger pause frame if FIFO fill level is below threshold. FIFO HW flow control enabled with CM3 RXQ&BM flow control with ethtool. Current FIFO thresholds is: 9KB for port with maximum speed 10Gb/s port 4KB for port with maximum speed 5Gb/s port 2KB for port with maximum speed 1Gb/s port Signed-off-by: Stefan Chulski <stefanc@marvell.com> Acked-by: Marcin Wojtas <mw@semihalf.com> --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 15 ++++++ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 53 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index 9b525b60..b61a1ba 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -770,6 +770,18 @@ #define MVPP2_TX_FIFO_THRESHOLD(kb) \ ((kb) * 1024 - MVPP2_TX_FIFO_THRESHOLD_MIN) +/* RX FIFO threshold in 1KB granularity */ +#define MVPP23_PORT0_FIFO_TRSH (9 * 1024) +#define MVPP23_PORT1_FIFO_TRSH (4 * 1024) +#define MVPP23_PORT2_FIFO_TRSH (2 * 1024) + +/* RX Flow Control Registers */ +#define MVPP2_RX_FC_REG(port) (0x150 + 4 * (port)) +#define MVPP2_RX_FC_EN BIT(24) +#define MVPP2_RX_FC_TRSH_OFFS 16 +#define MVPP2_RX_FC_TRSH_MASK (0xFF << MVPP2_RX_FC_TRSH_OFFS) +#define MVPP2_RX_FC_TRSH_UNIT 256 + /* MSS Flow control */ #define MSS_FC_COM_REG 0 #define FLOW_CONTROL_ENABLE_BIT BIT(0) @@ -1498,6 +1510,8 @@ struct mvpp2_bm_pool { void mvpp2_dbgfs_cleanup(struct mvpp2 *priv); +void mvpp23_rx_fifo_fc_en(struct mvpp2 *priv, int port, bool en); + #ifdef CONFIG_MVPP2_PTP int mvpp22_tai_probe(struct device *dev, struct mvpp2 *priv); void mvpp22_tai_tstamp(struct mvpp2_tai *tai, u32 tstamp, @@ -1530,4 +1544,5 @@ static inline bool mvpp22_rx_hwtstamping(struct mvpp2_port *port) { return IS_ENABLED(CONFIG_MVPP2_PTP) && port->rx_hwtstamp; } + #endif diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 9226d2f..e646151 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -6529,6 +6529,8 @@ static void mvpp2_mac_link_up(struct phylink_config *config, mvpp2_bm_pool_update_fc(port, port->pool_long, tx_pause); mvpp2_bm_pool_update_fc(port, port->pool_short, tx_pause); } + if (port->priv->hw_version == MVPP23) + mvpp23_rx_fifo_fc_en(port->priv, port->id, tx_pause); } mvpp2_port_enable(port); @@ -6997,6 +6999,55 @@ static void mvpp22_rx_fifo_init(struct mvpp2 *priv) mvpp2_write(priv, MVPP2_RX_FIFO_INIT_REG, 0x1); } +/* Configure Rx FIFO Flow control thresholds */ +static void mvpp23_rx_fifo_fc_set_tresh(struct mvpp2 *priv) +{ + int port, val; + + /* Port 0: maximum speed -10Gb/s port + * required by spec RX FIFO threshold 9KB + * Port 1: maximum speed -5Gb/s port + * required by spec RX FIFO threshold 4KB + * Port 2: maximum speed -1Gb/s port + * required by spec RX FIFO threshold 2KB + */ + + /* Without loopback port */ + for (port = 0; port < (MVPP2_MAX_PORTS - 1); port++) { + if (port == 0) { + val = (MVPP23_PORT0_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } else if (port == 1) { + val = (MVPP23_PORT1_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } else { + val = (MVPP23_PORT2_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } + } +} + +/* Configure Rx FIFO Flow control thresholds */ +void mvpp23_rx_fifo_fc_en(struct mvpp2 *priv, int port, bool en) +{ + int val; + + val = mvpp2_read(priv, MVPP2_RX_FC_REG(port)); + + if (en) + val |= MVPP2_RX_FC_EN; + else + val &= ~MVPP2_RX_FC_EN; + + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); +} + static void mvpp22_tx_fifo_set_hw(struct mvpp2 *priv, int port, int size) { int threshold = MVPP2_TX_FIFO_THRESHOLD(size); @@ -7148,6 +7199,8 @@ static int mvpp2_init(struct platform_device *pdev, struct mvpp2 *priv) } else { mvpp22_rx_fifo_init(priv); mvpp22_tx_fifo_init(priv); + if (priv->hw_version == MVPP23) + mvpp23_rx_fifo_fc_set_tresh(priv); } if (priv->hw_version == MVPP21) -- 1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: <stefanc@marvell.com> To: <netdev@vger.kernel.org> Cc: andrew@lunn.ch, ymarkman@marvell.com, devicetree@vger.kernel.org, atenart@kernel.org, linux-kernel@vger.kernel.org, linux@armlinux.org.uk, nadavh@marvell.com, rmk+kernel@armlinux.org.uk, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, thomas.petazzoni@bootlin.com, kuba@kernel.org, stefanc@marvell.com, mw@semihalf.com, davem@davemloft.net, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com Subject: [PATCH v13 net-next 13/15] net: mvpp2: add PPv23 RX FIFO flow control Date: Thu, 11 Feb 2021 12:49:00 +0200 [thread overview] Message-ID: <1613040542-16500-14-git-send-email-stefanc@marvell.com> (raw) In-Reply-To: <1613040542-16500-1-git-send-email-stefanc@marvell.com> From: Stefan Chulski <stefanc@marvell.com> New FIFO flow control feature was added in PPv23. PPv2 FIFO polled by HW and trigger pause frame if FIFO fill level is below threshold. FIFO HW flow control enabled with CM3 RXQ&BM flow control with ethtool. Current FIFO thresholds is: 9KB for port with maximum speed 10Gb/s port 4KB for port with maximum speed 5Gb/s port 2KB for port with maximum speed 1Gb/s port Signed-off-by: Stefan Chulski <stefanc@marvell.com> Acked-by: Marcin Wojtas <mw@semihalf.com> --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 15 ++++++ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 53 ++++++++++++++++++++ 2 files changed, 68 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index 9b525b60..b61a1ba 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -770,6 +770,18 @@ #define MVPP2_TX_FIFO_THRESHOLD(kb) \ ((kb) * 1024 - MVPP2_TX_FIFO_THRESHOLD_MIN) +/* RX FIFO threshold in 1KB granularity */ +#define MVPP23_PORT0_FIFO_TRSH (9 * 1024) +#define MVPP23_PORT1_FIFO_TRSH (4 * 1024) +#define MVPP23_PORT2_FIFO_TRSH (2 * 1024) + +/* RX Flow Control Registers */ +#define MVPP2_RX_FC_REG(port) (0x150 + 4 * (port)) +#define MVPP2_RX_FC_EN BIT(24) +#define MVPP2_RX_FC_TRSH_OFFS 16 +#define MVPP2_RX_FC_TRSH_MASK (0xFF << MVPP2_RX_FC_TRSH_OFFS) +#define MVPP2_RX_FC_TRSH_UNIT 256 + /* MSS Flow control */ #define MSS_FC_COM_REG 0 #define FLOW_CONTROL_ENABLE_BIT BIT(0) @@ -1498,6 +1510,8 @@ struct mvpp2_bm_pool { void mvpp2_dbgfs_cleanup(struct mvpp2 *priv); +void mvpp23_rx_fifo_fc_en(struct mvpp2 *priv, int port, bool en); + #ifdef CONFIG_MVPP2_PTP int mvpp22_tai_probe(struct device *dev, struct mvpp2 *priv); void mvpp22_tai_tstamp(struct mvpp2_tai *tai, u32 tstamp, @@ -1530,4 +1544,5 @@ static inline bool mvpp22_rx_hwtstamping(struct mvpp2_port *port) { return IS_ENABLED(CONFIG_MVPP2_PTP) && port->rx_hwtstamp; } + #endif diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 9226d2f..e646151 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -6529,6 +6529,8 @@ static void mvpp2_mac_link_up(struct phylink_config *config, mvpp2_bm_pool_update_fc(port, port->pool_long, tx_pause); mvpp2_bm_pool_update_fc(port, port->pool_short, tx_pause); } + if (port->priv->hw_version == MVPP23) + mvpp23_rx_fifo_fc_en(port->priv, port->id, tx_pause); } mvpp2_port_enable(port); @@ -6997,6 +6999,55 @@ static void mvpp22_rx_fifo_init(struct mvpp2 *priv) mvpp2_write(priv, MVPP2_RX_FIFO_INIT_REG, 0x1); } +/* Configure Rx FIFO Flow control thresholds */ +static void mvpp23_rx_fifo_fc_set_tresh(struct mvpp2 *priv) +{ + int port, val; + + /* Port 0: maximum speed -10Gb/s port + * required by spec RX FIFO threshold 9KB + * Port 1: maximum speed -5Gb/s port + * required by spec RX FIFO threshold 4KB + * Port 2: maximum speed -1Gb/s port + * required by spec RX FIFO threshold 2KB + */ + + /* Without loopback port */ + for (port = 0; port < (MVPP2_MAX_PORTS - 1); port++) { + if (port == 0) { + val = (MVPP23_PORT0_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } else if (port == 1) { + val = (MVPP23_PORT1_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } else { + val = (MVPP23_PORT2_FIFO_TRSH / MVPP2_RX_FC_TRSH_UNIT) + << MVPP2_RX_FC_TRSH_OFFS; + val &= MVPP2_RX_FC_TRSH_MASK; + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); + } + } +} + +/* Configure Rx FIFO Flow control thresholds */ +void mvpp23_rx_fifo_fc_en(struct mvpp2 *priv, int port, bool en) +{ + int val; + + val = mvpp2_read(priv, MVPP2_RX_FC_REG(port)); + + if (en) + val |= MVPP2_RX_FC_EN; + else + val &= ~MVPP2_RX_FC_EN; + + mvpp2_write(priv, MVPP2_RX_FC_REG(port), val); +} + static void mvpp22_tx_fifo_set_hw(struct mvpp2 *priv, int port, int size) { int threshold = MVPP2_TX_FIFO_THRESHOLD(size); @@ -7148,6 +7199,8 @@ static int mvpp2_init(struct platform_device *pdev, struct mvpp2 *priv) } else { mvpp22_rx_fifo_init(priv); mvpp22_tx_fifo_init(priv); + if (priv->hw_version == MVPP23) + mvpp23_rx_fifo_fc_set_tresh(priv); } if (priv->hw_version == MVPP21) -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-02-11 11:19 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-02-11 10:48 [PATCH v13 net-next 00/15] net: mvpp2: Add TX Flow Control support stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 10:48 ` [PATCH v13 net-next 01/15] doc: marvell: add CM3 address space and PPv2.3 description stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 11:02 ` Russell King - ARM Linux admin 2021-02-11 11:02 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 02/15] dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 10:48 ` [PATCH v13 net-next 03/15] net: mvpp2: add CM3 SRAM memory map stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 11:05 ` Russell King - ARM Linux admin 2021-02-11 11:05 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 04/15] net: mvpp2: always compare hw-version vs MVPP21 stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 11:08 ` Russell King - ARM Linux admin 2021-02-11 11:08 ` Russell King - ARM Linux admin 2021-02-11 11:10 ` [EXT] " Stefan Chulski 2021-02-11 11:10 ` Stefan Chulski 2021-02-11 10:48 ` [PATCH v13 net-next 05/15] net: mvpp2: add PPv23 version definition stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 11:42 ` Russell King - ARM Linux admin 2021-02-11 11:42 ` Russell King - ARM Linux admin 2021-02-11 11:49 ` [EXT] " Stefan Chulski 2021-02-11 11:49 ` Stefan Chulski 2021-02-11 19:26 ` Marcin Wojtas 2021-02-11 19:26 ` Marcin Wojtas 2021-02-11 10:48 ` [PATCH v13 net-next 06/15] net: mvpp2: increase BM pool and RXQ size stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 11:09 ` Russell King - ARM Linux admin 2021-02-11 11:09 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 07/15] net: mvpp2: add FCA periodic timer configurations stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 12:47 ` Russell King - ARM Linux admin 2021-02-11 12:47 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 08/15] net: mvpp2: add FCA RXQ non occupied descriptor threshold stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 12:50 ` Russell King - ARM Linux admin 2021-02-11 12:50 ` Russell King - ARM Linux admin 2021-02-11 13:02 ` [EXT] " Stefan Chulski 2021-02-11 13:02 ` Stefan Chulski 2021-02-11 13:29 ` Russell King - ARM Linux admin 2021-02-11 13:29 ` Russell King - ARM Linux admin 2021-02-11 13:22 ` Stefan Chulski 2021-02-11 13:22 ` Stefan Chulski 2021-02-11 13:31 ` Russell King - ARM Linux admin 2021-02-11 13:31 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 09/15] net: mvpp2: enable global flow control stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 12:52 ` Russell King - ARM Linux admin 2021-02-11 12:52 ` Russell King - ARM Linux admin 2021-02-11 10:48 ` [PATCH v13 net-next 10/15] net: mvpp2: add RXQ flow control configurations stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 10:48 ` [PATCH v13 net-next 11/15] net: mvpp2: add ethtool flow control configuration support stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 10:48 ` [PATCH v13 net-next 12/15] net: mvpp2: add BM protection underrun feature support stefanc 2021-02-11 10:48 ` stefanc 2021-02-11 10:49 ` stefanc [this message] 2021-02-11 10:49 ` [PATCH v13 net-next 13/15] net: mvpp2: add PPv23 RX FIFO flow control stefanc 2021-02-11 12:56 ` Russell King - ARM Linux admin 2021-02-11 12:56 ` Russell King - ARM Linux admin 2021-02-11 13:06 ` [EXT] " Stefan Chulski 2021-02-11 13:06 ` Stefan Chulski 2021-02-11 10:49 ` [PATCH v13 net-next 14/15] net: mvpp2: set 802.3x GoP Flow Control mode stefanc 2021-02-11 10:49 ` stefanc 2021-02-11 12:57 ` Russell King - ARM Linux admin 2021-02-11 12:57 ` Russell King - ARM Linux admin 2021-02-11 10:49 ` [PATCH v13 net-next 15/15] net: mvpp2: add TX FC firmware check stefanc 2021-02-11 10:49 ` stefanc 2021-02-11 23:00 ` [PATCH v13 net-next 00/15] net: mvpp2: Add TX Flow Control support patchwork-bot+netdevbpf 2021-02-11 23:00 ` patchwork-bot+netdevbpf 2021-02-12 8:54 ` [EXT] " Stefan Chulski 2021-02-12 8:54 ` Stefan Chulski
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