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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Matt Roper" <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Prepare for Xe_HP compute engines
Date: Mon, 28 Feb 2022 22:48:17 -0000	[thread overview]
Message-ID: <164608849701.6632.10827525898657733134@emeril.freedesktop.org> (raw)
In-Reply-To: <20220228174245.1569581-1-matthew.d.roper@intel.com>

== Series Details ==

Series: i915: Prepare for Xe_HP compute engines
URL   : https://patchwork.freedesktop.org/series/100833/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
aeab2e429058 drm/i915/xehp: Define compute class and engine
794deed65cd5 drm/i915/xehp: CCS shares the render reset domain
83e3525cfb56 drm/i915/xehp: Add Compute CS IRQ handlers
c1e9139a6d18 drm/i915/xehp: compute engine pipe_control
-:97: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#97: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:231:
+#define   PIPE_CONTROL_AMFS_FLUSH			(1<<25) /* gen12+ */
                                  			  ^

-:102: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#102: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:236:
+#define   PIPE_CONTROL_GLOBAL_SNAPSHOT_RESET		(1<<19)
                                             		  ^

-:104: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#104: FILE: drivers/gpu/drm/i915/gt/intel_gpu_commands.h:238:
+#define   PIPE_CONTROL_PSD_SYNC				(1<<17) /* gen11+ */
                                				  ^

total: 0 errors, 0 warnings, 3 checks, 95 lines checked
25857870fcd9 drm/i915/xehp: CCS should use RCS setup functions
4644209c10d6 drm/i915: Move context descriptor fields to intel_lrc.h
a384c36be225 drm/i915/xehp: Define context scheduling attributes in lrc descriptor
4060c5ce8fe7 drm/i915/xehp/guc: enable compute engine inside GuC
8c2a3081039e drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE
dee0a41826f5 drm/i915/xehp: Don't support parallel submission on compute / render
-:44: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (16, 23)
#44: FILE: drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c:158:
+		if (class == COMPUTE_CLASS || class == RENDER_CLASS)
+		       continue;

-:45: WARNING:TABSTOP: Statements should start on a tabstop
#45: FILE: drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c:159:
+		       continue;

total: 0 errors, 2 warnings, 0 checks, 26 lines checked
e2d994ffd124 drm/i915/xehp: handle fused off CCS engines
-:46: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#46: FILE: drivers/gpu/drm/i915/gt/intel_engine_cs.c:607:
+		const unsigned long ccs_mask = intel_slicemask_from_dssmask(

total: 0 errors, 0 warnings, 1 checks, 80 lines checked
2ea92310ad16 drm/i915/xehp: Add compute workarounds
-:51: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#51: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:1224:
+			cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE, 0);

total: 0 errors, 1 warnings, 0 checks, 84 lines checked
1d7e9a4c4f20 drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds



  parent reply	other threads:[~2022-02-28 22:48 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-28 17:42 [PATCH v2 00/13] i915: Prepare for Xe_HP compute engines Matt Roper
2022-02-28 17:42 ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 01/13] drm/i915/xehp: Define compute class and engine Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 02/13] drm/i915/xehp: CCS shares the render reset domain Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 03/13] drm/i915/xehp: Add Compute CS IRQ handlers Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 04/13] drm/i915/xehp: compute engine pipe_control Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01  6:54   ` Lucas De Marchi
2022-03-01  6:54     ` [Intel-gfx] " Lucas De Marchi
2022-02-28 17:42 ` [PATCH v2 05/13] drm/i915/xehp: CCS should use RCS setup functions Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 06/13] drm/i915: Move context descriptor fields to intel_lrc.h Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-03-01  6:57   ` [Intel-gfx] " Lucas De Marchi
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 07/13] drm/i915/xehp: Define context scheduling attributes in lrc descriptor Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-02-28 17:42 ` [PATCH v2 08/13] drm/i915/xehp/guc: enable compute engine inside GuC Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 18:55   ` Ceraolo Spurio, Daniele
2022-03-01 18:55     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 09/13] drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 10/13] drm/i915/xehp: Don't support parallel submission on compute / render Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-03-01 19:04   ` Ceraolo Spurio, Daniele
2022-03-01 19:04     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 11/13] drm/i915/xehp: handle fused off CCS engines Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 22:54   ` Matt Roper
2022-03-01 22:54     ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 12/13] drm/i915/xehp: Add compute workarounds Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 19:31   ` Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 13/13] drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 22:48 ` Patchwork [this message]
2022-02-28 22:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for i915: Prepare for Xe_HP compute engines Patchwork
2022-02-28 23:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-01  9:38 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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