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From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: Matthew Brost <matthew.brost@intel.com>, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2 10/13] drm/i915/xehp: Don't support parallel submission on compute / render
Date: Tue, 1 Mar 2022 11:04:19 -0800	[thread overview]
Message-ID: <8b612a83-39f0-df28-bc39-d727c9b9c483@intel.com> (raw)
In-Reply-To: <20220228174245.1569581-11-matthew.d.roper@intel.com>



On 2/28/2022 9:42 AM, Matt Roper wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> A different emit breadcrumbs ring programming is required for compute /
> render and we don't have UMD user so just reject parallel submission for
> these engine classes.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Excluding the RCS is not really required given that there is only 1 
instance and therefore can't be used for parallel submission (which is 
why we didn't need this check before the compute engines were added), 
but I agree that for coherency and future-proofing it makes sense to 
explicitly exclude all the unsupported classes.

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

> ---
>   drivers/gpu/drm/i915/gem/i915_gem_context.c         | 10 ++++++++++
>   drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c |  4 ++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index bc6d59df064d..9ae294eb7fb4 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -670,6 +670,16 @@ set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base,
>   				goto out_err;
>   			}
>   
> +			/*
> +			 * We don't support breadcrumb handshake on these
> +			 * classes
> +			 */
> +			if (siblings[n]->class == RENDER_CLASS ||
> +			    siblings[n]->class == COMPUTE_CLASS) {
> +				err = -EINVAL;
> +				goto out_err;
> +			}
> +
>   			if (n) {
>   				if (prev_engine.engine_class !=
>   				    ci.engine_class) {
> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> index 1297ddbf7f88..f9218a37d170 100644
> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> @@ -154,6 +154,10 @@ static int intel_guc_multi_lrc_basic(void *arg)
>   	int ret;
>   
>   	for (class = 0; class < MAX_ENGINE_CLASS + 1; ++class) {
> +		/* We don't support breadcrumb handshake on these classes */
> +		if (class == COMPUTE_CLASS || class == RENDER_CLASS)
> +		       continue;
> +
>   		ret = __intel_guc_multi_lrc_basic(gt, class);
>   		if (ret)
>   			return ret;


WARNING: multiple messages have this Message-ID (diff)
From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 10/13] drm/i915/xehp: Don't support parallel submission on compute / render
Date: Tue, 1 Mar 2022 11:04:19 -0800	[thread overview]
Message-ID: <8b612a83-39f0-df28-bc39-d727c9b9c483@intel.com> (raw)
In-Reply-To: <20220228174245.1569581-11-matthew.d.roper@intel.com>



On 2/28/2022 9:42 AM, Matt Roper wrote:
> From: Matthew Brost <matthew.brost@intel.com>
>
> A different emit breadcrumbs ring programming is required for compute /
> render and we don't have UMD user so just reject parallel submission for
> these engine classes.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Excluding the RCS is not really required given that there is only 1 
instance and therefore can't be used for parallel submission (which is 
why we didn't need this check before the compute engines were added), 
but I agree that for coherency and future-proofing it makes sense to 
explicitly exclude all the unsupported classes.

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

> ---
>   drivers/gpu/drm/i915/gem/i915_gem_context.c         | 10 ++++++++++
>   drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c |  4 ++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index bc6d59df064d..9ae294eb7fb4 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -670,6 +670,16 @@ set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base,
>   				goto out_err;
>   			}
>   
> +			/*
> +			 * We don't support breadcrumb handshake on these
> +			 * classes
> +			 */
> +			if (siblings[n]->class == RENDER_CLASS ||
> +			    siblings[n]->class == COMPUTE_CLASS) {
> +				err = -EINVAL;
> +				goto out_err;
> +			}
> +
>   			if (n) {
>   				if (prev_engine.engine_class !=
>   				    ci.engine_class) {
> diff --git a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> index 1297ddbf7f88..f9218a37d170 100644
> --- a/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/selftest_guc_multi_lrc.c
> @@ -154,6 +154,10 @@ static int intel_guc_multi_lrc_basic(void *arg)
>   	int ret;
>   
>   	for (class = 0; class < MAX_ENGINE_CLASS + 1; ++class) {
> +		/* We don't support breadcrumb handshake on these classes */
> +		if (class == COMPUTE_CLASS || class == RENDER_CLASS)
> +		       continue;
> +
>   		ret = __intel_guc_multi_lrc_basic(gt, class);
>   		if (ret)
>   			return ret;


  reply	other threads:[~2022-03-01 19:04 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-28 17:42 [PATCH v2 00/13] i915: Prepare for Xe_HP compute engines Matt Roper
2022-02-28 17:42 ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 01/13] drm/i915/xehp: Define compute class and engine Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 02/13] drm/i915/xehp: CCS shares the render reset domain Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 03/13] drm/i915/xehp: Add Compute CS IRQ handlers Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 04/13] drm/i915/xehp: compute engine pipe_control Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01  6:54   ` Lucas De Marchi
2022-03-01  6:54     ` [Intel-gfx] " Lucas De Marchi
2022-02-28 17:42 ` [PATCH v2 05/13] drm/i915/xehp: CCS should use RCS setup functions Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 06/13] drm/i915: Move context descriptor fields to intel_lrc.h Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-03-01  6:57   ` [Intel-gfx] " Lucas De Marchi
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 07/13] drm/i915/xehp: Define context scheduling attributes in lrc descriptor Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-02-28 17:42 ` [PATCH v2 08/13] drm/i915/xehp/guc: enable compute engine inside GuC Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 18:55   ` Ceraolo Spurio, Daniele
2022-03-01 18:55     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 09/13] drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [Intel-gfx] [PATCH v2 10/13] drm/i915/xehp: Don't support parallel submission on compute / render Matt Roper
2022-02-28 17:42   ` Matt Roper
2022-03-01 19:04   ` Ceraolo Spurio, Daniele [this message]
2022-03-01 19:04     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 11/13] drm/i915/xehp: handle fused off CCS engines Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 22:54   ` Matt Roper
2022-03-01 22:54     ` [Intel-gfx] " Matt Roper
2022-02-28 17:42 ` [PATCH v2 12/13] drm/i915/xehp: Add compute workarounds Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-03-01 19:31   ` Ceraolo Spurio, Daniele
2022-02-28 17:42 ` [PATCH v2 13/13] drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds Matt Roper
2022-02-28 17:42   ` [Intel-gfx] " Matt Roper
2022-02-28 22:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Prepare for Xe_HP compute engines Patchwork
2022-02-28 22:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-28 23:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-01  9:38 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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