[PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.

Peng Fan (6):
  dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk
  dt-bindings: i2c: i2c-imx-lpi2c: add dmas property
  dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93
  arm64: dts: imx8-ss-dma: add IPG clock for i2c
  ARM: dts: imx7ulp: Add PER clock for lpi2c
  i2c: imx-lpi2c: handle IPG clock

 .../bindings/i2c/i2c-imx-lpi2c.yaml           | 20 +++++++--
 arch/arm/boot/dts/imx7ulp.dtsi                | 10 +++--
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++----
 drivers/i2c/busses/i2c-imx-lpi2c.c            | 41 ++++++++++++++-----
 4 files changed, 66 insertions(+), 25 deletions(-)

-- 
2.37.1

[PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.

Peng Fan (6):
  dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk
  dt-bindings: i2c: i2c-imx-lpi2c: add dmas property
  dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93
  arm64: dts: imx8-ss-dma: add IPG clock for i2c
  ARM: dts: imx7ulp: Add PER clock for lpi2c
  i2c: imx-lpi2c: handle IPG clock

 .../bindings/i2c/i2c-imx-lpi2c.yaml           | 20 +++++++--
 arch/arm/boot/dts/imx7ulp.dtsi                | 10 +++--
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++----
 drivers/i2c/busses/i2c-imx-lpi2c.c            | 41 ++++++++++++++-----
 4 files changed, 66 insertions(+), 25 deletions(-)

-- 
2.37.1


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[PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
both.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 529bea56d324..e42e35003eae 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -37,10 +37,12 @@ properties:
   clock-frequency: true
 
   clock-names:
-    maxItems: 1
+    items:
+      - const: per
+      - const: ipg
 
   clocks:
-    maxItems: 1
+    maxItems: 2
 
   power-domains:
     maxItems: 1
@@ -63,5 +65,6 @@ examples:
         reg = <0x40A50000 0x10000>;
         interrupt-parent = <&intc>;
         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-        clocks = <&clks IMX7ULP_CLK_LPI2C7>;
+        clocks = <&clks IMX7ULP_CLK_LPI2C7>,
+                 <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
     };
-- 
2.37.1

[PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
both.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 529bea56d324..e42e35003eae 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -37,10 +37,12 @@ properties:
   clock-frequency: true
 
   clock-names:
-    maxItems: 1
+    items:
+      - const: per
+      - const: ipg
 
   clocks:
-    maxItems: 1
+    maxItems: 2
 
   power-domains:
     maxItems: 1
@@ -63,5 +65,6 @@ examples:
         reg = <0x40A50000 0x10000>;
         interrupt-parent = <&intc>;
         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-        clocks = <&clks IMX7ULP_CLK_LPI2C7>;
+        clocks = <&clks IMX7ULP_CLK_LPI2C7>,
+                 <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
     };
-- 
2.37.1


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[PATCH 2/6] dt-bindings: i2c: i2c-imx-lpi2c: add dmas property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C has dma capability, so add dmas property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/i2c/i2c-imx-lpi2c.yaml         | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index e42e35003eae..08b81d57d7e1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -44,6 +44,16 @@ properties:
   clocks:
     maxItems: 2
 
+  dmas:
+    items:
+      - description: DMA controller phandle and request line for TX
+      - description: DMA controller phandle and request line for RX
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   power-domains:
     maxItems: 1
 
-- 
2.37.1

[PATCH 2/6] dt-bindings: i2c: i2c-imx-lpi2c: add dmas property

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX LPI2C has dma capability, so add dmas property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/i2c/i2c-imx-lpi2c.yaml         | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index e42e35003eae..08b81d57d7e1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -44,6 +44,16 @@ properties:
   clocks:
     maxItems: 2
 
+  dmas:
+    items:
+      - description: DMA controller phandle and request line for TX
+      - description: DMA controller phandle and request line for RX
+
+  dma-names:
+    items:
+      - const: tx
+      - const: rx
+
   power-domains:
     maxItems: 1
 
-- 
2.37.1


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[PATCH 3/6] dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 LPI2C compatible string.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 08b81d57d7e1..4656f5112b84 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -23,6 +23,7 @@ properties:
               - fsl,imx8dxl-lpi2c
               - fsl,imx8qm-lpi2c
               - fsl,imx8ulp-lpi2c
+              - fsl,imx93-lpi2c
           - const: fsl,imx7ulp-lpi2c
 
   reg:
-- 
2.37.1

[PATCH 3/6] dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 LPI2C compatible string.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
index 08b81d57d7e1..4656f5112b84 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml
@@ -23,6 +23,7 @@ properties:
               - fsl,imx8dxl-lpi2c
               - fsl,imx8qm-lpi2c
               - fsl,imx8ulp-lpi2c
+              - fsl,imx93-lpi2c
           - const: fsl,imx7ulp-lpi2c
 
   reg:
-- 
2.37.1


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[PATCH 4/6] arm64: dts: imx8-ss-dma: add IPG clock for i2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 960a802b8b6e..d7b4229bb4a2 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -111,8 +111,9 @@ uart3_lpcg: clock-controller@5a490000 {
 	i2c0: i2c@5a800000 {
 		reg = <0x5a800000 0x4000>;
 		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c0_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_0>;
@@ -122,8 +123,9 @@ i2c0: i2c@5a800000 {
 	i2c1: i2c@5a810000 {
 		reg = <0x5a810000 0x4000>;
 		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c1_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_1>;
@@ -133,8 +135,9 @@ i2c1: i2c@5a810000 {
 	i2c2: i2c@5a820000 {
 		reg = <0x5a820000 0x4000>;
 		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c2_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_2>;
@@ -144,8 +147,9 @@ i2c2: i2c@5a820000 {
 	i2c3: i2c@5a830000 {
 		reg = <0x5a830000 0x4000>;
 		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c3_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_3>;
-- 
2.37.1

[PATCH 4/6] arm64: dts: imx8-ss-dma: add IPG clock for i2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX8 LPI2C requires both PER and IPG clock, so add the missed IPG clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 20 +++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index 960a802b8b6e..d7b4229bb4a2 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -111,8 +111,9 @@ uart3_lpcg: clock-controller@5a490000 {
 	i2c0: i2c@5a800000 {
 		reg = <0x5a800000 0x4000>;
 		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c0_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_0>;
@@ -122,8 +123,9 @@ i2c0: i2c@5a800000 {
 	i2c1: i2c@5a810000 {
 		reg = <0x5a810000 0x4000>;
 		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c1_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_1>;
@@ -133,8 +135,9 @@ i2c1: i2c@5a810000 {
 	i2c2: i2c@5a820000 {
 		reg = <0x5a820000 0x4000>;
 		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c2_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_2>;
@@ -144,8 +147,9 @@ i2c2: i2c@5a820000 {
 	i2c3: i2c@5a830000 {
 		reg = <0x5a830000 0x4000>;
 		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>;
-		clock-names = "per";
+		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
+			 <&i2c3_lpcg IMX_LPCG_CLK_4>;
+		clock-names = "per", "ipg";
 		assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
 		assigned-clock-rates = <24000000>;
 		power-domains = <&pd IMX_SC_R_I2C_3>;
-- 
2.37.1


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[PATCH 5/6] ARM: dts: imx7ulp: Add PER clock for lpi2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The current IPG clk should be PER clk, and add a new clk as IPG clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index bcec98b96411..7f7d2d5122fb 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -328,8 +328,9 @@ lpi2c6: i2c@40a40000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a40000 0x10000>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
-			clock-names = "ipg";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
@@ -340,8 +341,9 @@ lpi2c7: i2c@40a50000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a50000 0x10000>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
-			clock-names = "ipg";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
-- 
2.37.1

[PATCH 5/6] ARM: dts: imx7ulp: Add PER clock for lpi2c

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The current IPG clk should be PER clk, and add a new clk as IPG clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index bcec98b96411..7f7d2d5122fb 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -328,8 +328,9 @@ lpi2c6: i2c@40a40000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a40000 0x10000>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
-			clock-names = "ipg";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
@@ -340,8 +341,9 @@ lpi2c7: i2c@40a50000 {
 			compatible = "fsl,imx7ulp-lpi2c";
 			reg = <0x40a50000 0x10000>;
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
-			clock-names = "ipg";
+			clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>,
+				 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
+			clock-names = "per", "ipg";
 			assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>;
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
 			assigned-clock-rates = <48000000>;
-- 
2.37.1


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[PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The LPI2C controller needs both PER and IPG clock to work, but current
driver only supports PER clock. This patch add IPG clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/i2c/busses/i2c-imx-lpi2c.c | 41 ++++++++++++++++++++++--------
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c
index 8b9ba055c418..f43ad1ae8627 100644
--- a/drivers/i2c/busses/i2c-imx-lpi2c.c
+++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
@@ -94,7 +94,8 @@ enum lpi2c_imx_pincfg {
 
 struct lpi2c_imx_struct {
 	struct i2c_adapter	adapter;
-	struct clk		*clk;
+	struct clk		*clk_per;
+	struct clk		*clk_ipg;
 	void __iomem		*base;
 	__u8			*rx_buf;
 	__u8			*tx_buf;
@@ -207,7 +208,7 @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
 
 	lpi2c_imx_set_mode(lpi2c_imx);
 
-	clk_rate = clk_get_rate(lpi2c_imx->clk);
+	clk_rate = clk_get_rate(lpi2c_imx->clk_per);
 	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
 		filt = 0;
 	else
@@ -561,10 +562,16 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	strlcpy(lpi2c_imx->adapter.name, pdev->name,
 		sizeof(lpi2c_imx->adapter.name));
 
-	lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
-	if (IS_ERR(lpi2c_imx->clk)) {
+	lpi2c_imx->clk_per = devm_clk_get(&pdev->dev, "per");
+	if (IS_ERR(lpi2c_imx->clk_per)) {
 		dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
-		return PTR_ERR(lpi2c_imx->clk);
+		return PTR_ERR(lpi2c_imx->clk_per);
+	}
+
+	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
+	if (IS_ERR(lpi2c_imx->clk_ipg)) {
+		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
+		return PTR_ERR(lpi2c_imx->clk_ipg);
 	}
 
 	ret = of_property_read_u32(pdev->dev.of_node,
@@ -582,9 +589,15 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
 	platform_set_drvdata(pdev, lpi2c_imx);
 
-	ret = clk_prepare_enable(lpi2c_imx->clk);
+	ret = clk_prepare_enable(lpi2c_imx->clk_per);
+	if (ret) {
+		dev_err(&pdev->dev, "per clk enable failed %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_prepare_enable(lpi2c_imx->clk_ipg);
 	if (ret) {
-		dev_err(&pdev->dev, "clk enable failed %d\n", ret);
+		dev_err(&pdev->dev, "ipg clk enable failed %d\n", ret);
 		return ret;
 	}
 
@@ -633,7 +646,8 @@ static int __maybe_unused lpi2c_runtime_suspend(struct device *dev)
 {
 	struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
 
-	clk_disable_unprepare(lpi2c_imx->clk);
+	clk_disable_unprepare(lpi2c_imx->clk_ipg);
+	clk_disable_unprepare(lpi2c_imx->clk_per);
 	pinctrl_pm_select_sleep_state(dev);
 
 	return 0;
@@ -645,12 +659,19 @@ static int __maybe_unused lpi2c_runtime_resume(struct device *dev)
 	int ret;
 
 	pinctrl_pm_select_default_state(dev);
-	ret = clk_prepare_enable(lpi2c_imx->clk);
+	ret = clk_prepare_enable(lpi2c_imx->clk_per);
 	if (ret) {
-		dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret);
+		dev_err(dev, "failed to enable I2C per clock, ret=%d\n", ret);
 		return ret;
 	}
 
+	ret = clk_prepare_enable(lpi2c_imx->clk_ipg);
+	if (ret) {
+		clk_disable_unprepare(lpi2c_imx->clk_per);
+		dev_err(dev, "failed to enable I2C ipg clock, ret=%d\n", ret);
+	}
+
+
 	return 0;
 }
 
-- 
2.37.1

[PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

The LPI2C controller needs both PER and IPG clock to work, but current
driver only supports PER clock. This patch add IPG clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/i2c/busses/i2c-imx-lpi2c.c | 41 ++++++++++++++++++++++--------
 1 file changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c
index 8b9ba055c418..f43ad1ae8627 100644
--- a/drivers/i2c/busses/i2c-imx-lpi2c.c
+++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
@@ -94,7 +94,8 @@ enum lpi2c_imx_pincfg {
 
 struct lpi2c_imx_struct {
 	struct i2c_adapter	adapter;
-	struct clk		*clk;
+	struct clk		*clk_per;
+	struct clk		*clk_ipg;
 	void __iomem		*base;
 	__u8			*rx_buf;
 	__u8			*tx_buf;
@@ -207,7 +208,7 @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
 
 	lpi2c_imx_set_mode(lpi2c_imx);
 
-	clk_rate = clk_get_rate(lpi2c_imx->clk);
+	clk_rate = clk_get_rate(lpi2c_imx->clk_per);
 	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
 		filt = 0;
 	else
@@ -561,10 +562,16 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	strlcpy(lpi2c_imx->adapter.name, pdev->name,
 		sizeof(lpi2c_imx->adapter.name));
 
-	lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
-	if (IS_ERR(lpi2c_imx->clk)) {
+	lpi2c_imx->clk_per = devm_clk_get(&pdev->dev, "per");
+	if (IS_ERR(lpi2c_imx->clk_per)) {
 		dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
-		return PTR_ERR(lpi2c_imx->clk);
+		return PTR_ERR(lpi2c_imx->clk_per);
+	}
+
+	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
+	if (IS_ERR(lpi2c_imx->clk_ipg)) {
+		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
+		return PTR_ERR(lpi2c_imx->clk_ipg);
 	}
 
 	ret = of_property_read_u32(pdev->dev.of_node,
@@ -582,9 +589,15 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
 	i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx);
 	platform_set_drvdata(pdev, lpi2c_imx);
 
-	ret = clk_prepare_enable(lpi2c_imx->clk);
+	ret = clk_prepare_enable(lpi2c_imx->clk_per);
+	if (ret) {
+		dev_err(&pdev->dev, "per clk enable failed %d\n", ret);
+		return ret;
+	}
+
+	ret = clk_prepare_enable(lpi2c_imx->clk_ipg);
 	if (ret) {
-		dev_err(&pdev->dev, "clk enable failed %d\n", ret);
+		dev_err(&pdev->dev, "ipg clk enable failed %d\n", ret);
 		return ret;
 	}
 
@@ -633,7 +646,8 @@ static int __maybe_unused lpi2c_runtime_suspend(struct device *dev)
 {
 	struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev);
 
-	clk_disable_unprepare(lpi2c_imx->clk);
+	clk_disable_unprepare(lpi2c_imx->clk_ipg);
+	clk_disable_unprepare(lpi2c_imx->clk_per);
 	pinctrl_pm_select_sleep_state(dev);
 
 	return 0;
@@ -645,12 +659,19 @@ static int __maybe_unused lpi2c_runtime_resume(struct device *dev)
 	int ret;
 
 	pinctrl_pm_select_default_state(dev);
-	ret = clk_prepare_enable(lpi2c_imx->clk);
+	ret = clk_prepare_enable(lpi2c_imx->clk_per);
 	if (ret) {
-		dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret);
+		dev_err(dev, "failed to enable I2C per clock, ret=%d\n", ret);
 		return ret;
 	}
 
+	ret = clk_prepare_enable(lpi2c_imx->clk_ipg);
+	if (ret) {
+		clk_disable_unprepare(lpi2c_imx->clk_per);
+		dev_err(dev, "failed to enable I2C ipg clock, ret=%d\n", ret);
+	}
+
+
 	return 0;
 }
 
-- 
2.37.1


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Re: [PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
> both.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
> both.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

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linux-arm-kernel@lists.infradead.org
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Re: [PATCH 2/6] dt-bindings: i2c: i2c-imx-lpi2c: add dmas property

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C has dma capability, so add dmas property
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 2/6] dt-bindings: i2c: i2c-imx-lpi2c: add dmas property

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C has dma capability, so add dmas property
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

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Re: [PATCH 3/6] dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add i.MX93 LPI2C compatible string.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 1 +


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

Re: [PATCH 3/6] dt-bindings: i2c: i2c-imx-lpi2c: add i.MX93

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add i.MX93 LPI2C compatible string.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 1 +


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof

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Re: [PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The LPI2C controller needs both PER and IPG clock to work, but current
> driver only supports PER clock. This patch add IPG clock.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/i2c/busses/i2c-imx-lpi2c.c | 41 ++++++++++++++++++++++--------
>  1 file changed, 31 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c
> index 8b9ba055c418..f43ad1ae8627 100644
> --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> @@ -94,7 +94,8 @@ enum lpi2c_imx_pincfg {
>  
>  struct lpi2c_imx_struct {
>  	struct i2c_adapter	adapter;
> -	struct clk		*clk;
> +	struct clk		*clk_per;
> +	struct clk		*clk_ipg;
>  	void __iomem		*base;
>  	__u8			*rx_buf;
>  	__u8			*tx_buf;
> @@ -207,7 +208,7 @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
>  
>  	lpi2c_imx_set_mode(lpi2c_imx);
>  
> -	clk_rate = clk_get_rate(lpi2c_imx->clk);
> +	clk_rate = clk_get_rate(lpi2c_imx->clk_per);
>  	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
>  		filt = 0;
>  	else
> @@ -561,10 +562,16 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
>  	strlcpy(lpi2c_imx->adapter.name, pdev->name,
>  		sizeof(lpi2c_imx->adapter.name));
>  
> -	lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
> -	if (IS_ERR(lpi2c_imx->clk)) {
> +	lpi2c_imx->clk_per = devm_clk_get(&pdev->dev, "per");
> +	if (IS_ERR(lpi2c_imx->clk_per)) {
>  		dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
> -		return PTR_ERR(lpi2c_imx->clk);
> +		return PTR_ERR(lpi2c_imx->clk_per);
> +	}
> +
> +	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
> +	if (IS_ERR(lpi2c_imx->clk_ipg)) {
> +		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
> +		return PTR_ERR(lpi2c_imx->clk_ipg);
>  	}

You just broke all DTS...

Best regards,
Krzysztof

Re: [PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The LPI2C controller needs both PER and IPG clock to work, but current
> driver only supports PER clock. This patch add IPG clock.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/i2c/busses/i2c-imx-lpi2c.c | 41 ++++++++++++++++++++++--------
>  1 file changed, 31 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-imx-lpi2c.c b/drivers/i2c/busses/i2c-imx-lpi2c.c
> index 8b9ba055c418..f43ad1ae8627 100644
> --- a/drivers/i2c/busses/i2c-imx-lpi2c.c
> +++ b/drivers/i2c/busses/i2c-imx-lpi2c.c
> @@ -94,7 +94,8 @@ enum lpi2c_imx_pincfg {
>  
>  struct lpi2c_imx_struct {
>  	struct i2c_adapter	adapter;
> -	struct clk		*clk;
> +	struct clk		*clk_per;
> +	struct clk		*clk_ipg;
>  	void __iomem		*base;
>  	__u8			*rx_buf;
>  	__u8			*tx_buf;
> @@ -207,7 +208,7 @@ static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx)
>  
>  	lpi2c_imx_set_mode(lpi2c_imx);
>  
> -	clk_rate = clk_get_rate(lpi2c_imx->clk);
> +	clk_rate = clk_get_rate(lpi2c_imx->clk_per);
>  	if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST)
>  		filt = 0;
>  	else
> @@ -561,10 +562,16 @@ static int lpi2c_imx_probe(struct platform_device *pdev)
>  	strlcpy(lpi2c_imx->adapter.name, pdev->name,
>  		sizeof(lpi2c_imx->adapter.name));
>  
> -	lpi2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
> -	if (IS_ERR(lpi2c_imx->clk)) {
> +	lpi2c_imx->clk_per = devm_clk_get(&pdev->dev, "per");
> +	if (IS_ERR(lpi2c_imx->clk_per)) {
>  		dev_err(&pdev->dev, "can't get I2C peripheral clock\n");
> -		return PTR_ERR(lpi2c_imx->clk);
> +		return PTR_ERR(lpi2c_imx->clk_per);
> +	}
> +
> +	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
> +	if (IS_ERR(lpi2c_imx->clk_ipg)) {
> +		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
> +		return PTR_ERR(lpi2c_imx->clk_ipg);
>  	}

You just broke all DTS...

Best regards,
Krzysztof

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Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.

This patchset breaks the ABI and is not bisectable. The justification is
very limited (one sentence), so not really enough.

Best regards,
Krzysztof

Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.

This patchset breaks the ABI and is not bisectable. The justification is
very limited (one sentence), so not really enough.

Best regards,
Krzysztof

_______________________________________________
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Re: [PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Rob Herring]

On Fri, 12 Aug 2022 12:34:19 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
> both.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


i2c@40a40000: clock-names:0: 'per' was expected
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: clock-names: ['ipg'] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: clocks: [[14, 2]] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb

i2c@40a40000: clocks: [[18, 2]] is too short
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clock-names:0: 'per' was expected
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clock-names: ['ipg'] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clocks: [[14, 3]] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb

i2c@40a50000: clocks: [[18, 3]] is too short
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@5a800000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a800000: clocks: [[15, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a800000: clocks: [[35, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a800000: clocks: [[37, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a800000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a800000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clocks: [[16, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a810000: clocks: [[36, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a810000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clocks: [[43, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a810000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clocks: [[17, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a820000: clocks: [[37, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a820000: clocks: [[43, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clocks: [[45, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a820000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clocks: [[18, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a830000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a830000: clocks: [[44, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clocks: [[46, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a830000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

Re: [PATCH 1/6] dt-bindings: i2c: i2c-imx-lpi2c: add ipg clk

[Rob Herring]

On Fri, 12 Aug 2022 12:34:19 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX LPI2C actually requires dual clock: per clock and ipg clock, so add
> both.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


i2c@40a40000: clock-names:0: 'per' was expected
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: clock-names: ['ipg'] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: clocks: [[14, 2]] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb

i2c@40a40000: clocks: [[18, 2]] is too short
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a40000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clock-names:0: 'per' was expected
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clock-names: ['ipg'] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: clocks: [[14, 3]] is too short
	arch/arm/boot/dts/imx7ulp-com.dtb

i2c@40a50000: clocks: [[18, 3]] is too short
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@40a50000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm/boot/dts/imx7ulp-com.dtb
	arch/arm/boot/dts/imx7ulp-evk.dtb

i2c@5a800000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a800000: clocks: [[15, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a800000: clocks: [[35, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a800000: clocks: [[37, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a800000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a800000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clocks: [[16, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a810000: clocks: [[36, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a810000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a810000: clocks: [[43, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a810000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clocks: [[17, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a820000: clocks: [[37, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a820000: clocks: [[43, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a820000: clocks: [[45, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a820000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clock-names: ['per'] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clocks: [[18, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb

i2c@5a830000: clocks: [[38, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb

i2c@5a830000: clocks: [[44, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb

i2c@5a830000: clocks: [[46, 0]] is too short
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb

i2c@5a830000: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
	arch/arm64/boot/dts/freescale/imx8qm-mek.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-colibri-eval-v3.dtb
	arch/arm64/boot/dts/freescale/imx8qxp-mek.dtb


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Re: [PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 13:13, Krzysztof Kozlowski wrote:
>> +
>> +	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
>> +	if (IS_ERR(lpi2c_imx->clk_ipg)) {
>> +		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
>> +		return PTR_ERR(lpi2c_imx->clk_ipg);
>>  	}
> 
> You just broke all DTS...

And Rob's bot agrees (through bindings):
https://lore.kernel.org/all/1660317233.465911.168987.nullmailer@robh.at.kernel.org/

Best regards,
Krzysztof

Re: [PATCH 6/6] i2c: imx-lpi2c: handle IPG clock

[Krzysztof Kozlowski]

On 12/08/2022 13:13, Krzysztof Kozlowski wrote:
>> +
>> +	lpi2c_imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
>> +	if (IS_ERR(lpi2c_imx->clk_ipg)) {
>> +		dev_err(&pdev->dev, "can't get I2C ipg clock\n");
>> +		return PTR_ERR(lpi2c_imx->clk_ipg);
>>  	}
> 
> You just broke all DTS...

And Rob's bot agrees (through bindings):
https://lore.kernel.org/all/1660317233.465911.168987.nullmailer@robh.at.kernel.org/

Best regards,
Krzysztof

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RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

Hi Krzysztof,

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> > This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> 
> This patchset breaks the ABI and is not bisectable. The justification is very
> limited (one sentence), so not really enough.

ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
clocks, PER and IPG. But current dt-bindings and dts, use one clock.

This patchset includes dts changes patch 4 and patch 5.
Patch 6 is to update driver use two clocks.

I think the patch order in this patchset would not break git bisect, it
just break ABI. But I not find good way how could not break ABI,
because only use one clock is wrong whether in dt-bindings or dtbs.

Should I use a fixes tag to dt-bindings, then break ABI is allowed?

Thanks,
Peng.

> 
> Best regards,
> Krzysztof

RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

Hi Krzysztof,

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> > This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> 
> This patchset breaks the ABI and is not bisectable. The justification is very
> limited (one sentence), so not really enough.

ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
clocks, PER and IPG. But current dt-bindings and dts, use one clock.

This patchset includes dts changes patch 4 and patch 5.
Patch 6 is to update driver use two clocks.

I think the patch order in this patchset would not break git bisect, it
just break ABI. But I not find good way how could not break ABI,
because only use one clock is wrong whether in dt-bindings or dtbs.

Should I use a fixes tag to dt-bindings, then break ABI is allowed?

Thanks,
Peng.

> 
> Best regards,
> Krzysztof
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Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 15/08/2022 03:52, Peng Fan wrote:
> Hi Krzysztof,
> 
>> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
>>
>> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
>>> From: Peng Fan <peng.fan@nxp.com>
>>>
>>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
>>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
>>
>> This patchset breaks the ABI and is not bisectable. The justification is very
>> limited (one sentence), so not really enough.
> 
> ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks, PER and IPG. But current dt-bindings and dts, use one clock.
> 
> This patchset includes dts changes patch 4 and patch 5.
> Patch 6 is to update driver use two clocks.
> 
> I think the patch order in this patchset would not break git bisect, it
> just break ABI. But I not find good way how could not break ABI,
> because only use one clock is wrong whether in dt-bindings or dtbs.

Driver changes always go via separate branch than DTS, so your patch
breaks git bisect. I already pointed it out in other patch. This is not
really acceptable. Breaking ABI is another problem which could be
justified with your explanation in other cases... but not in this one,
since it is easy to make it backwards compatible,

> Should I use a fixes tag to dt-bindings, then break ABI is allowed?

No. For such patch ABI break is also not allowed in that case. Just make
the driver backwards compatible and both problems - non bisectability
and ABI break - go away.

Best regards,
Krzysztof

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Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 15/08/2022 03:52, Peng Fan wrote:
> Hi Krzysztof,
> 
>> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
>>
>> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
>>> From: Peng Fan <peng.fan@nxp.com>
>>>
>>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
>>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
>>
>> This patchset breaks the ABI and is not bisectable. The justification is very
>> limited (one sentence), so not really enough.
> 
> ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks, PER and IPG. But current dt-bindings and dts, use one clock.
> 
> This patchset includes dts changes patch 4 and patch 5.
> Patch 6 is to update driver use two clocks.
> 
> I think the patch order in this patchset would not break git bisect, it
> just break ABI. But I not find good way how could not break ABI,
> because only use one clock is wrong whether in dt-bindings or dtbs.

Driver changes always go via separate branch than DTS, so your patch
breaks git bisect. I already pointed it out in other patch. This is not
really acceptable. Breaking ABI is another problem which could be
justified with your explanation in other cases... but not in this one,
since it is easy to make it backwards compatible,

> Should I use a fixes tag to dt-bindings, then break ABI is allowed?

No. For such patch ABI break is also not allowed in that case. Just make
the driver backwards compatible and both problems - non bisectability
and ABI break - go away.

Best regards,
Krzysztof

RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 15/08/2022 03:52, Peng Fan wrote:
> > Hi Krzysztof,
> >
> >> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> >>
> >> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> >>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> >>
> >> This patchset breaks the ABI and is not bisectable. The justification
> >> is very limited (one sentence), so not really enough.
> >
> > ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks,
> > PER and IPG. But current dt-bindings and dts, use one clock.
> >
> > This patchset includes dts changes patch 4 and patch 5.
> > Patch 6 is to update driver use two clocks.
> >
> > I think the patch order in this patchset would not break git bisect,
> > it just break ABI. But I not find good way how could not break ABI,
> > because only use one clock is wrong whether in dt-bindings or dtbs.
> 
> Driver changes always go via separate branch than DTS, so your patch
> breaks git bisect. I already pointed it out in other patch. This is not really
> acceptable. Breaking ABI is another problem which could be justified with
> your explanation in other cases... but not in this one, since it is easy to make
> it backwards compatible,

I see. But the current binding and dts using one clk is really wrong. Anyway,
I could make it backwards compatible.

Thanks,
Peng.
> 
> > Should I use a fixes tag to dt-bindings, then break ABI is allowed?
> 
> No. For such patch ABI break is also not allowed in that case. Just make the
> driver backwards compatible and both problems - non bisectability and ABI
> break - go away.
> 
> Best regards,
> Krzysztof
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RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 15/08/2022 03:52, Peng Fan wrote:
> > Hi Krzysztof,
> >
> >> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> >>
> >> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> >>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> >>
> >> This patchset breaks the ABI and is not bisectable. The justification
> >> is very limited (one sentence), so not really enough.
> >
> > ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks,
> > PER and IPG. But current dt-bindings and dts, use one clock.
> >
> > This patchset includes dts changes patch 4 and patch 5.
> > Patch 6 is to update driver use two clocks.
> >
> > I think the patch order in this patchset would not break git bisect,
> > it just break ABI. But I not find good way how could not break ABI,
> > because only use one clock is wrong whether in dt-bindings or dtbs.
> 
> Driver changes always go via separate branch than DTS, so your patch
> breaks git bisect. I already pointed it out in other patch. This is not really
> acceptable. Breaking ABI is another problem which could be justified with
> your explanation in other cases... but not in this one, since it is easy to make
> it backwards compatible,

I see. But the current binding and dts using one clk is really wrong. Anyway,
I could make it backwards compatible.

Thanks,
Peng.
> 
> > Should I use a fixes tag to dt-bindings, then break ABI is allowed?
> 
> No. For such patch ABI break is also not allowed in that case. Just make the
> driver backwards compatible and both problems - non bisectability and ABI
> break - go away.
> 
> Best regards,
> Krzysztof

RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

Hi Krzysztof,

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 15/08/2022 03:52, Peng Fan wrote:
> > Hi Krzysztof,
> >
> >> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> >>
> >> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> >>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> >>
> >> This patchset breaks the ABI and is not bisectable. The justification
> >> is very limited (one sentence), so not really enough.
> >
> > ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks,
> > PER and IPG. But current dt-bindings and dts, use one clock.
> >
> > This patchset includes dts changes patch 4 and patch 5.
> > Patch 6 is to update driver use two clocks.
> >
> > I think the patch order in this patchset would not break git bisect,
> > it just break ABI. But I not find good way how could not break ABI,
> > because only use one clock is wrong whether in dt-bindings or dtbs.
> 
> Driver changes always go via separate branch than DTS, so your patch
> breaks git bisect. I already pointed it out in other patch. This is not really
> acceptable. Breaking ABI is another problem which could be justified with
> your explanation in other cases... but not in this one, since it is easy to make
> it backwards compatible,
> 
> > Should I use a fixes tag to dt-bindings, then break ABI is allowed?
> 
> No. For such patch ABI break is also not allowed in that case. Just make the
> driver backwards compatible and both problems - non bisectability and ABI
> break - go away.

One more point that I am not very clear about  
"non bisectability and ABI break "

ABI, I suppose you mean dt-binding, right?
The I2C bindings and dts update will go through different tree, I think. So
dtbs_check may fail considering the PR merge order.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof
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linux-arm-kernel@lists.infradead.org
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RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

Hi Krzysztof,

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 15/08/2022 03:52, Peng Fan wrote:
> > Hi Krzysztof,
> >
> >> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> >>
> >> On 12/08/2022 07:34, Peng Fan (OSS) wrote:
> >>> From: Peng Fan <peng.fan@nxp.com>
> >>>
> >>> The i.MX LPI2C needs PER and IPG clock, not just PER or IPG clock.
> >>> This patch is to enable both PER and IPG clock for imx-i2c-lpi2c.
> >>
> >> This patchset breaks the ABI and is not bisectable. The justification
> >> is very limited (one sentence), so not really enough.
> >
> > ARM32 i.MX7ULP and ARM64 i.MX8QXP/i.MX8ULP all need to use two
> clocks,
> > PER and IPG. But current dt-bindings and dts, use one clock.
> >
> > This patchset includes dts changes patch 4 and patch 5.
> > Patch 6 is to update driver use two clocks.
> >
> > I think the patch order in this patchset would not break git bisect,
> > it just break ABI. But I not find good way how could not break ABI,
> > because only use one clock is wrong whether in dt-bindings or dtbs.
> 
> Driver changes always go via separate branch than DTS, so your patch
> breaks git bisect. I already pointed it out in other patch. This is not really
> acceptable. Breaking ABI is another problem which could be justified with
> your explanation in other cases... but not in this one, since it is easy to make
> it backwards compatible,
> 
> > Should I use a fixes tag to dt-bindings, then break ABI is allowed?
> 
> No. For such patch ABI break is also not allowed in that case. Just make the
> driver backwards compatible and both problems - non bisectability and ABI
> break - go away.

One more point that I am not very clear about  
"non bisectability and ABI break "

ABI, I suppose you mean dt-binding, right?
The I2C bindings and dts update will go through different tree, I think. So
dtbs_check may fail considering the PR merge order.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof

Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 16/08/2022 11:43, Peng Fan wrote:
>> No. For such patch ABI break is also not allowed in that case. Just make the
>> driver backwards compatible and both problems - non bisectability and ABI
>> break - go away.
> 
> One more point that I am not very clear about  
> "non bisectability and ABI break "
> 
> ABI, I suppose you mean dt-binding, right?
> The I2C bindings and dts update will go through different tree, I think. So
> dtbs_check may fail considering the PR merge order.

ABI break means breaking Application Binary Interface, so out of tree
DTS conforming to old bindings stop working with new kernel.

ABI is described by bindings and implemented by driver. You broke it in
the driver.

Best regards,
Krzysztof

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Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Krzysztof Kozlowski]

On 16/08/2022 11:43, Peng Fan wrote:
>> No. For such patch ABI break is also not allowed in that case. Just make the
>> driver backwards compatible and both problems - non bisectability and ABI
>> break - go away.
> 
> One more point that I am not very clear about  
> "non bisectability and ABI break "
> 
> ABI, I suppose you mean dt-binding, right?
> The I2C bindings and dts update will go through different tree, I think. So
> dtbs_check may fail considering the PR merge order.

ABI break means breaking Application Binary Interface, so out of tree
DTS conforming to old bindings stop working with new kernel.

ABI is described by bindings and implemented by driver. You broke it in
the driver.

Best regards,
Krzysztof

RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 16/08/2022 11:43, Peng Fan wrote:
> >> No. For such patch ABI break is also not allowed in that case. Just
> >> make the driver backwards compatible and both problems - non
> >> bisectability and ABI break - go away.
> >
> > One more point that I am not very clear about "non bisectability and
> > ABI break "
> >
> > ABI, I suppose you mean dt-binding, right?
> > The I2C bindings and dts update will go through different tree, I
> > think. So dtbs_check may fail considering the PR merge order.
> 
> ABI break means breaking Application Binary Interface, so out of tree DTS
> conforming to old bindings stop working with new kernel.
> 
> ABI is described by bindings and implemented by driver. You broke it in the
> driver.

Thanks for your explanation. V2 will take care of this.

Thanks,
Peng.
> 
> Best regards,
> Krzysztof
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RE: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock

[Peng Fan]

> Subject: Re: [PATCH 0/6] i2c-imx-lpi2c: add IPG clock
> 
> On 16/08/2022 11:43, Peng Fan wrote:
> >> No. For such patch ABI break is also not allowed in that case. Just
> >> make the driver backwards compatible and both problems - non
> >> bisectability and ABI break - go away.
> >
> > One more point that I am not very clear about "non bisectability and
> > ABI break "
> >
> > ABI, I suppose you mean dt-binding, right?
> > The I2C bindings and dts update will go through different tree, I
> > think. So dtbs_check may fail considering the PR merge order.
> 
> ABI break means breaking Application Binary Interface, so out of tree DTS
> conforming to old bindings stop working with new kernel.
> 
> ABI is described by bindings and implemented by driver. You broke it in the
> driver.

Thanks for your explanation. V2 will take care of this.

Thanks,
Peng.
> 
> Best regards,
> Krzysztof