* [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
@ 2015-06-26 10:27 Lucas Stach
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Lucas Stach @ 2015-06-26 10:27 UTC (permalink / raw)
To: Thierry Reding; +Cc: kernel, dri-devel, patchwork-lst
From: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/drm/panel/panel-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 30904a9b2a4c..dc6a923c89d7 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -729,6 +729,7 @@ static const struct panel_desc hannstar_hsd070pww1 = {
.width = 151,
.height = 94,
},
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
};
static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
--
2.1.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel
2015-06-26 10:27 [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
@ 2015-06-26 10:27 ` Lucas Stach
2015-08-07 12:43 ` Thierry Reding
2015-07-23 14:45 ` [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-08-07 12:42 ` Thierry Reding
2 siblings, 1 reply; 9+ messages in thread
From: Lucas Stach @ 2015-06-26 10:27 UTC (permalink / raw)
To: Thierry Reding; +Cc: kernel, dri-devel, patchwork-lst
From: Philipp Zabel <p.zabel@pengutronix.de>
According to the data sheet, the minimum horizontal blanking interval
is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
minimum working horizontal blanking interval to be 60 clocks.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/gpu/drm/panel/panel-simple.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index dc6a923c89d7..7196b940a928 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -713,7 +713,12 @@ static const struct display_timing hannstar_hsd070pww1_timing = {
.hactive = { 1280, 1280, 1280 },
.hfront_porch = { 1, 1, 10 },
.hback_porch = { 1, 1, 10 },
- .hsync_len = { 52, 158, 661 },
+ /*
+ * According to the data sheet, the minimum horizontal blanking interval
+ * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
+ * minimum working horizontal blanking interval to be 60 clocks.
+ */
+ .hsync_len = { 58, 158, 661 },
.vactive = { 800, 800, 800 },
.vfront_porch = { 1, 1, 10 },
.vback_porch = { 1, 1, 10 },
--
2.1.4
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
2015-06-26 10:27 [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
@ 2015-07-23 14:45 ` Lucas Stach
2015-08-07 12:31 ` Lucas Stach
2015-08-07 12:42 ` Thierry Reding
2 siblings, 1 reply; 9+ messages in thread
From: Lucas Stach @ 2015-07-23 14:45 UTC (permalink / raw)
To: Thierry Reding; +Cc: dri-devel, kernel, patchwork-lst
Hey Thierry,
can you please take some time to look at those two small patches?
Thanks,
Lucas
Am Freitag, den 26.06.2015, 12:27 +0200 schrieb Lucas Stach:
> From: Philipp Zabel <p.zabel@pengutronix.de>
>
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 30904a9b2a4c..dc6a923c89d7 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -729,6 +729,7 @@ static const struct panel_desc hannstar_hsd070pww1 = {
> .width = 151,
> .height = 94,
> },
> + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
> };
>
> static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
_______________________________________________
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http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
2015-07-23 14:45 ` [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
@ 2015-08-07 12:31 ` Lucas Stach
0 siblings, 0 replies; 9+ messages in thread
From: Lucas Stach @ 2015-08-07 12:31 UTC (permalink / raw)
To: Thierry Reding; +Cc: kernel, dri-devel, patchwork-lst
Ping.
Please take a look at those, it would be a shame if they miss the next
merge window, despite being on the list for over 1.5 months now.
Regards,
Lucas
Am Donnerstag, den 23.07.2015, 16:45 +0200 schrieb Lucas Stach:
> Hey Thierry,
>
> can you please take some time to look at those two small patches?
>
> Thanks,
> Lucas
>
> Am Freitag, den 26.06.2015, 12:27 +0200 schrieb Lucas Stach:
> > From: Philipp Zabel <p.zabel@pengutronix.de>
> >
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> > ---
> > drivers/gpu/drm/panel/panel-simple.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> > index 30904a9b2a4c..dc6a923c89d7 100644
> > --- a/drivers/gpu/drm/panel/panel-simple.c
> > +++ b/drivers/gpu/drm/panel/panel-simple.c
> > @@ -729,6 +729,7 @@ static const struct panel_desc hannstar_hsd070pww1 = {
> > .width = 151,
> > .height = 94,
> > },
> > + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
> > };
> >
> > static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
>
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
2015-06-26 10:27 [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
2015-07-23 14:45 ` [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
@ 2015-08-07 12:42 ` Thierry Reding
2015-08-07 13:06 ` Philipp Zabel
2 siblings, 1 reply; 9+ messages in thread
From: Thierry Reding @ 2015-08-07 12:42 UTC (permalink / raw)
To: Lucas Stach; +Cc: kernel, dri-devel, patchwork-lst
[-- Attachment #1.1: Type: text/plain, Size: 952 bytes --]
On Fri, Jun 26, 2015 at 12:27:08PM +0200, Lucas Stach wrote:
> From: Philipp Zabel <p.zabel@pengutronix.de>
>
Can you be more specific here? What kind of bus format is this? Why is
it that .bpc = 6 doesn't work here?
Thierry
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 30904a9b2a4c..dc6a923c89d7 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -729,6 +729,7 @@ static const struct panel_desc hannstar_hsd070pww1 = {
> .width = 151,
> .height = 94,
> },
> + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
> };
>
> static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
> --
> 2.1.4
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
@ 2015-08-07 12:43 ` Thierry Reding
2015-08-07 12:48 ` Lucas Stach
0 siblings, 1 reply; 9+ messages in thread
From: Thierry Reding @ 2015-08-07 12:43 UTC (permalink / raw)
To: Lucas Stach; +Cc: kernel, dri-devel, patchwork-lst
[-- Attachment #1.1: Type: text/plain, Size: 1351 bytes --]
On Fri, Jun 26, 2015 at 12:27:09PM +0200, Lucas Stach wrote:
> From: Philipp Zabel <p.zabel@pengutronix.de>
>
> According to the data sheet, the minimum horizontal blanking interval
> is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
> minimum working horizontal blanking interval to be 60 clocks.
>
> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index dc6a923c89d7..7196b940a928 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -713,7 +713,12 @@ static const struct display_timing hannstar_hsd070pww1_timing = {
> .hactive = { 1280, 1280, 1280 },
> .hfront_porch = { 1, 1, 10 },
> .hback_porch = { 1, 1, 10 },
> - .hsync_len = { 52, 158, 661 },
> + /*
> + * According to the data sheet, the minimum horizontal blanking interval
> + * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
> + * minimum working horizontal blanking interval to be 60 clocks.
> + */
> + .hsync_len = { 58, 158, 661 },
58 != 60, so which one is the truth here?
Thierry
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel
2015-08-07 12:43 ` Thierry Reding
@ 2015-08-07 12:48 ` Lucas Stach
0 siblings, 0 replies; 9+ messages in thread
From: Lucas Stach @ 2015-08-07 12:48 UTC (permalink / raw)
To: Thierry Reding; +Cc: kernel, dri-devel, patchwork-lst
Am Freitag, den 07.08.2015, 14:43 +0200 schrieb Thierry Reding:
> On Fri, Jun 26, 2015 at 12:27:09PM +0200, Lucas Stach wrote:
> > From: Philipp Zabel <p.zabel@pengutronix.de>
> >
> > According to the data sheet, the minimum horizontal blanking interval
> > is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
> > minimum working horizontal blanking interval to be 60 clocks.
> >
> > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
> > Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
> > ---
> > drivers/gpu/drm/panel/panel-simple.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> > index dc6a923c89d7..7196b940a928 100644
> > --- a/drivers/gpu/drm/panel/panel-simple.c
> > +++ b/drivers/gpu/drm/panel/panel-simple.c
> > @@ -713,7 +713,12 @@ static const struct display_timing hannstar_hsd070pww1_timing = {
> > .hactive = { 1280, 1280, 1280 },
> > .hfront_porch = { 1, 1, 10 },
> > .hback_porch = { 1, 1, 10 },
> > - .hsync_len = { 52, 158, 661 },
> > + /*
> > + * According to the data sheet, the minimum horizontal blanking interval
> > + * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
> > + * minimum working horizontal blanking interval to be 60 clocks.
> > + */
> > + .hsync_len = { 58, 158, 661 },
>
> 58 != 60, so which one is the truth here?
>
The comment says blanking interval must be at least 60 clocks. Blanking
interval = front_porch + hsync_len + back_porch. Both minimum front and
back porch for this panel are 1 clock, so the values match the comment.
Regards,
Lucas
--
Pengutronix e.K. | Lucas Stach |
Industrial Linux Solutions | http://www.pengutronix.de/ |
_______________________________________________
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
2015-08-07 12:42 ` Thierry Reding
@ 2015-08-07 13:06 ` Philipp Zabel
2015-08-07 13:22 ` Thierry Reding
0 siblings, 1 reply; 9+ messages in thread
From: Philipp Zabel @ 2015-08-07 13:06 UTC (permalink / raw)
To: Thierry Reding; +Cc: patchwork-lst, dri-devel, kernel
Am Freitag, den 07.08.2015, 14:42 +0200 schrieb Thierry Reding:
> On Fri, Jun 26, 2015 at 12:27:08PM +0200, Lucas Stach wrote:
> > From: Philipp Zabel <p.zabel@pengutronix.de>
> >
>
> Can you be more specific here? What kind of bus format is this?
The bus_format contains more information than just the bpc. In this
case, the SPWG default format for RGB666 via 3-pair LVDS specifies how
the 18 color bits are serialized in the 7 time slots for each pixel
clock. See
http://linuxtv.org/downloads/v4l-dvb-apis/subdev.html#v4l2-mbus-pixelcode-rgb-lvds
for details.
> Why is it that .bpc = 6 doesn't work here?
In this case a LVDS driver could indeed still decide itself that
bpc == 6 should be translated to MEDIA_BUS_FMT_RGB666_1X7X3_SPWG (and
not MEDIA_BUS_FMT_RGB666_1X18, or MEDIA_BUS_FMT_RGB666_1X24_CPADHI, for
example). But in the bpc == 8 case there are two different standard ways
to order the bits (SPWG/VESA vs JEIDA).
For consistency, I'd prefer to set bus_format to the correct value
everywhere.
regards
Philipp
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
2015-08-07 13:06 ` Philipp Zabel
@ 2015-08-07 13:22 ` Thierry Reding
0 siblings, 0 replies; 9+ messages in thread
From: Thierry Reding @ 2015-08-07 13:22 UTC (permalink / raw)
To: Philipp Zabel; +Cc: patchwork-lst, dri-devel, kernel
[-- Attachment #1.1: Type: text/plain, Size: 1223 bytes --]
On Fri, Aug 07, 2015 at 03:06:38PM +0200, Philipp Zabel wrote:
> Am Freitag, den 07.08.2015, 14:42 +0200 schrieb Thierry Reding:
> > On Fri, Jun 26, 2015 at 12:27:08PM +0200, Lucas Stach wrote:
> > > From: Philipp Zabel <p.zabel@pengutronix.de>
> > >
> >
> > Can you be more specific here? What kind of bus format is this?
>
> The bus_format contains more information than just the bpc. In this
> case, the SPWG default format for RGB666 via 3-pair LVDS specifies how
> the 18 color bits are serialized in the 7 time slots for each pixel
> clock. See
> http://linuxtv.org/downloads/v4l-dvb-apis/subdev.html#v4l2-mbus-pixelcode-rgb-lvds
> for details.
>
> > Why is it that .bpc = 6 doesn't work here?
>
> In this case a LVDS driver could indeed still decide itself that
> bpc == 6 should be translated to MEDIA_BUS_FMT_RGB666_1X7X3_SPWG (and
> not MEDIA_BUS_FMT_RGB666_1X18, or MEDIA_BUS_FMT_RGB666_1X24_CPADHI, for
> example). But in the bpc == 8 case there are two different standard ways
> to order the bits (SPWG/VESA vs JEIDA).
> For consistency, I'd prefer to set bus_format to the correct value
> everywhere.
Now if we can put that into a commit message, that'd be perfect.
Thierry
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2015-08-07 13:23 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-26 10:27 [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-06-26 10:27 ` [PATCH 2/2] drm/panel: correct minimum hsync length of the HannStar HSD070PWW1 panel Lucas Stach
2015-08-07 12:43 ` Thierry Reding
2015-08-07 12:48 ` Lucas Stach
2015-07-23 14:45 ` [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel Lucas Stach
2015-08-07 12:31 ` Lucas Stach
2015-08-07 12:42 ` Thierry Reding
2015-08-07 13:06 ` Philipp Zabel
2015-08-07 13:22 ` Thierry Reding
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