From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: RISC-V nommu support v3
Date: Tue, 13 Aug 2019 17:47:32 +0200 [thread overview]
Message-ID: <20190813154747.24256-1-hch@lst.de> (raw)
Hi all,
below is a series to support nommu mode on RISC-V. For now this series
just works under qemu with the qemu-virt platform, but Damien has also
been able to get kernel based on this tree with additional driver hacks
to work on the Kendryte KD210, but that will take a while to cleanup
an upstream.
A git tree is available here:
git://git.infradead.org/users/hch/riscv.git riscv-nommu.3
Gitweb:
http://git.infradead.org/users/hch/riscv.git/shortlog/refs/heads/riscv-nommu.3
I've also pushed out a builtroot branch that can build a RISC-V nommu
root filesystem here:
git://git.infradead.org/users/hch/buildroot.git riscv-nommu.2
Gitweb:
http://git.infradead.org/users/hch/buildroot.git/shortlog/refs/heads/riscv-nommu.2
Changes since v2:
- rebased to 5.3-rc
- remove the EFI image header for nommu builds
- set ARCH_SLAB_MINALIGN to ensure stack alignment in the flat binary
loader
- minor comment improvement
- use #defines for more CSRs
Changes since v1:
- fixes so that a kernel with this series still work on builds with an
IOMMU
- small clint cleanups
- the binfmt_flat base and buildroot now don't put arguments on the stack
WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Palmer Dabbelt <palmer@sifive.com>,
Paul Walmsley <paul.walmsley@sifive.com>
Cc: Damien Le Moal <damien.lemoal@wdc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: RISC-V nommu support v3
Date: Tue, 13 Aug 2019 17:47:32 +0200 [thread overview]
Message-ID: <20190813154747.24256-1-hch@lst.de> (raw)
Hi all,
below is a series to support nommu mode on RISC-V. For now this series
just works under qemu with the qemu-virt platform, but Damien has also
been able to get kernel based on this tree with additional driver hacks
to work on the Kendryte KD210, but that will take a while to cleanup
an upstream.
A git tree is available here:
git://git.infradead.org/users/hch/riscv.git riscv-nommu.3
Gitweb:
http://git.infradead.org/users/hch/riscv.git/shortlog/refs/heads/riscv-nommu.3
I've also pushed out a builtroot branch that can build a RISC-V nommu
root filesystem here:
git://git.infradead.org/users/hch/buildroot.git riscv-nommu.2
Gitweb:
http://git.infradead.org/users/hch/buildroot.git/shortlog/refs/heads/riscv-nommu.2
Changes since v2:
- rebased to 5.3-rc
- remove the EFI image header for nommu builds
- set ARCH_SLAB_MINALIGN to ensure stack alignment in the flat binary
loader
- minor comment improvement
- use #defines for more CSRs
Changes since v1:
- fixes so that a kernel with this series still work on builds with an
IOMMU
- small clint cleanups
- the binfmt_flat base and buildroot now don't put arguments on the stack
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next reply other threads:[~2019-08-13 15:47 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-13 15:47 Christoph Hellwig [this message]
2019-08-13 15:47 ` RISC-V nommu support v3 Christoph Hellwig
2019-08-13 15:47 ` [PATCH 01/15] irqchip/sifive-plic: set max threshold for ignored handlers Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 17:44 ` Paul Walmsley
2019-08-13 17:44 ` Paul Walmsley
2019-08-14 9:06 ` Marc Zyngier
2019-08-14 9:06 ` Marc Zyngier
2019-08-13 15:47 ` [PATCH 02/15] riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 16:36 ` Paul Walmsley
2019-08-13 16:36 ` Paul Walmsley
2019-08-13 16:42 ` Christoph Hellwig
2019-08-13 16:42 ` Christoph Hellwig
2019-08-13 16:51 ` Paul Walmsley
2019-08-13 16:51 ` Paul Walmsley
2019-08-13 19:44 ` Paul Walmsley
2019-08-13 19:44 ` Paul Walmsley
2019-08-13 15:47 ` [PATCH 03/15] riscv: refactor the IPI code Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-14 4:41 ` Paul Walmsley
2019-08-14 4:41 ` Paul Walmsley
2019-08-19 10:18 ` Christoph Hellwig
2019-08-19 10:18 ` Christoph Hellwig
2019-09-01 8:03 ` Christoph Hellwig
2019-09-01 8:03 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 04/15] riscv: abstract out CSR names for supervisor vs machine mode Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 05/15] riscv: improve the default power off implementation Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 06/15] riscv: provide a flat entry loader Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 07/15] riscv: read the hart ID from mhartid on boot Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 08/15] riscv: provide native clint access for M-mode Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 16:29 ` Mark Rutland
2019-08-13 16:29 ` Mark Rutland
2019-08-19 10:16 ` Christoph Hellwig
2019-08-19 10:16 ` Christoph Hellwig
2019-08-27 23:37 ` Palmer Dabbelt
2019-08-27 23:37 ` Palmer Dabbelt
2019-08-28 6:11 ` Christoph Hellwig
2019-08-28 6:11 ` Christoph Hellwig
2019-09-03 18:48 ` Palmer Dabbelt
2019-09-03 18:48 ` Palmer Dabbelt
2019-09-04 2:05 ` Alan Kao
2019-09-04 2:05 ` Alan Kao
2019-08-21 0:24 ` Atish Patra
2019-08-21 0:24 ` Atish Patra
2019-08-21 0:42 ` hch
2019-08-21 0:42 ` hch
2019-08-13 15:47 ` [PATCH 09/15] riscv: implement remote sfence.i natively " Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-20 21:04 ` Atish Patra
2019-08-20 21:04 ` Atish Patra
2019-08-13 15:47 ` [PATCH 10/15] riscv: poison SBI calls " Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-20 21:05 ` Atish Patra
2019-08-20 21:05 ` Atish Patra
2019-08-13 15:47 ` [PATCH 11/15] riscv: don't allow selecting SBI-based drivers " Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 12/15] riscv: use the correct interrupt levels " Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 13/15] riscv: clear the instruction cache and all registers when booting Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-14 1:00 ` Alan Kao
2019-08-14 1:00 ` Alan Kao
2019-08-14 1:07 ` Alan Kao
2019-08-14 1:07 ` Alan Kao
2019-08-14 4:35 ` Christoph Hellwig
2019-08-14 4:35 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 14/15] riscv: add nommu support Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-13 15:47 ` [PATCH 15/15] riscv: disable the EFI PECOFF header for M-mode Christoph Hellwig
2019-08-13 15:47 ` Christoph Hellwig
2019-08-20 21:07 ` Atish Patra
2019-08-20 21:07 ` Atish Patra
2019-08-21 4:14 ` Troy Benjegerdes
2019-08-21 4:14 ` Troy Benjegerdes
2019-08-21 7:12 ` Christoph Hellwig
2019-08-21 7:12 ` Christoph Hellwig
2019-08-21 17:31 ` Atish Patra
2019-08-21 17:31 ` Atish Patra
2019-08-21 17:54 ` Troy Benjegerdes
2019-08-21 17:54 ` Troy Benjegerdes
2019-08-21 23:02 ` Anup Patel
2019-08-21 23:02 ` Anup Patel
2019-08-21 23:32 ` Troy Benjegerdes
2019-08-21 23:32 ` Troy Benjegerdes
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