From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 02/18] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks
Date: Fri, 4 Sep 2020 14:53:38 +0300 [thread overview]
Message-ID: <20200904115354.25336-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200904115354.25336-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Non-HDMI sinks shouldn't be sent infoframes. Check for that when
using LSPCON.
FIXME: How do we turn off infoframes once enabled? Do we even
have to?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++------
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++++-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6af080542c96..28ff85493f25 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3581,19 +3581,17 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state,
intel_ddi_pre_enable_hdmi(state, encoder, crtc_state,
conn_state);
} else {
- struct intel_lspcon *lspcon =
- enc_to_intel_lspcon(encoder);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
intel_ddi_pre_enable_dp(state, encoder, crtc_state,
conn_state);
- if (lspcon->active) {
- struct intel_digital_port *dig_port =
- enc_to_dig_port(encoder);
+ /* FIXME precompute everything properly */
+ /* FIXME how do we turn infoframes off again? */
+ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
dig_port->set_infoframes(encoder,
crtc_state->has_infoframe,
crtc_state, conn_state);
- }
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 413b60337a0b..6f3a3dde99c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1277,6 +1277,7 @@ struct intel_dp {
u8 sink_count;
bool link_mst;
bool link_trained;
+ bool has_hdmi_sink;
bool has_audio;
bool reset_link_params;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a673d0d7051..60bf01a8b4ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6069,7 +6069,11 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
edid = intel_dp_get_edid(intel_dp);
intel_connector->detect_edid = edid;
- intel_dp->has_audio = drm_detect_monitor_audio(edid);
+ if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) {
+ intel_dp->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
+ intel_dp->has_audio = drm_detect_monitor_audio(edid);
+ }
+
drm_dp_cec_set_edid(&intel_dp->aux, edid);
intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid);
}
@@ -6083,6 +6087,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
kfree(intel_connector->detect_edid);
intel_connector->detect_edid = NULL;
+ intel_dp->has_hdmi_sink = false;
intel_dp->has_audio = false;
intel_dp->edid_quirks = 0;
}
--
2.26.2
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dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 02/18] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks
Date: Fri, 4 Sep 2020 14:53:38 +0300 [thread overview]
Message-ID: <20200904115354.25336-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20200904115354.25336-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Non-HDMI sinks shouldn't be sent infoframes. Check for that when
using LSPCON.
FIXME: How do we turn off infoframes once enabled? Do we even
have to?
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++------
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 7 ++++++-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 6af080542c96..28ff85493f25 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3581,19 +3581,17 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state,
intel_ddi_pre_enable_hdmi(state, encoder, crtc_state,
conn_state);
} else {
- struct intel_lspcon *lspcon =
- enc_to_intel_lspcon(encoder);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
intel_ddi_pre_enable_dp(state, encoder, crtc_state,
conn_state);
- if (lspcon->active) {
- struct intel_digital_port *dig_port =
- enc_to_dig_port(encoder);
+ /* FIXME precompute everything properly */
+ /* FIXME how do we turn infoframes off again? */
+ if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
dig_port->set_infoframes(encoder,
crtc_state->has_infoframe,
crtc_state, conn_state);
- }
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 413b60337a0b..6f3a3dde99c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1277,6 +1277,7 @@ struct intel_dp {
u8 sink_count;
bool link_mst;
bool link_trained;
+ bool has_hdmi_sink;
bool has_audio;
bool reset_link_params;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a673d0d7051..60bf01a8b4ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6069,7 +6069,11 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
edid = intel_dp_get_edid(intel_dp);
intel_connector->detect_edid = edid;
- intel_dp->has_audio = drm_detect_monitor_audio(edid);
+ if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) {
+ intel_dp->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
+ intel_dp->has_audio = drm_detect_monitor_audio(edid);
+ }
+
drm_dp_cec_set_edid(&intel_dp->aux, edid);
intel_dp->edid_quirks = drm_dp_get_edid_quirks(edid);
}
@@ -6083,6 +6087,7 @@ intel_dp_unset_edid(struct intel_dp *intel_dp)
kfree(intel_connector->detect_edid);
intel_connector->detect_edid = NULL;
+ intel_dp->has_hdmi_sink = false;
intel_dp->has_audio = false;
intel_dp->edid_quirks = 0;
}
--
2.26.2
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-09-04 11:54 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 11:53 [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 01/18] drm/dp: Dump downstream facing port caps Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` Ville Syrjala [this message]
2020-09-04 11:53 ` [Intel-gfx] [PATCH v2 02/18] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 03/18] drm/dp: Define protocol converter DPCD registers Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 04/18] drm/dp: Define more downstream facing port caps Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 05/18] drm/i915: Reworkd DFP max bpc handling Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 06/18] drm/dp: Add helpers to identify downstream facing port types Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 17:30 ` Lyude Paul
2020-09-08 17:30 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 07/18] drm/dp: Pimp drm_dp_downstream_max_bpc() Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 17:32 ` Lyude Paul
2020-09-08 17:32 ` [Intel-gfx] " Lyude Paul
2020-09-08 17:51 ` Lyude Paul
2020-09-08 17:51 ` [Intel-gfx] " Lyude Paul
2020-09-10 14:46 ` Ville Syrjälä
2020-09-10 14:46 ` [Intel-gfx] " Ville Syrjälä
2020-09-10 19:40 ` Lyude Paul
2020-09-10 19:40 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 08/18] drm/dp: Redo drm_dp_downstream_max_clock() as drm_dp_downstream_max_dotclock() Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 17:56 ` Lyude Paul
2020-09-08 17:56 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 09/18] drm/i915: Reworkd DP DFP clock handling Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 18:04 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul
2020-09-08 18:04 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul
2020-09-17 12:46 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Ville Syrjälä
2020-09-17 12:46 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjälä
2020-09-08 18:08 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul
2020-09-08 18:08 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul
2020-09-10 13:55 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Ville Syrjälä
2020-09-10 13:55 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjälä
2020-09-10 19:40 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul
2020-09-10 19:40 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul
2020-09-04 11:53 ` [PATCH v2 11/18] drm/i915: Deal with TMDS DFP clock limits Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 12/18] drm/i915: Configure DP 1.3+ protocol converted HDMI mode Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 18:11 ` Lyude Paul
2020-09-08 18:11 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 13/18] drm/dp: Add drm_dp_downstream_mode() Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 18:13 ` Lyude Paul
2020-09-08 18:13 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 14/18] drm/i915: Handle downstream facing ports w/o EDID Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 15/18] drm/i915: Extract intel_hdmi_has_audio() Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 16/18] drm/i915: DP->HDMI TMDS clock limits vs. deep color Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 11:53 ` [PATCH v2 17/18] drm/dp: Add helpers for DFP YCbCr 4:2:0 handling Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-08 18:15 ` Lyude Paul
2020-09-08 18:15 ` [Intel-gfx] " Lyude Paul
2020-09-04 11:53 ` [PATCH v2 18/18] drm/i915: Do YCbCr 444->420 conversion via DP protocol converters Ville Syrjala
2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala
2020-09-04 13:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Pimp DP DFP handling (rev2) Patchwork
2020-09-04 13:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-04 20:09 ` [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Lyude Paul
2020-09-04 20:09 ` [Intel-gfx] " Lyude Paul
2020-09-04 21:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Pimp DP DFP handling (rev2) Patchwork
2020-09-08 18:34 ` [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Lyude Paul
2020-09-08 18:34 ` [Intel-gfx] " Lyude Paul
[not found] ` <fa772231854424f2b4edc69e23b0edd924695e6c.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
2020-09-17 16:11 ` Ville Syrjälä
2020-09-17 16:11 ` [Intel-gfx] " Ville Syrjälä
2020-09-17 16:11 ` Ville Syrjälä
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