From: Ville Syrjala <ville.syrjala@linux.intel.com> To: dri-devel@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: [PATCH v2 04/18] drm/dp: Define more downstream facing port caps Date: Fri, 4 Sep 2020 14:53:40 +0300 [thread overview] Message-ID: <20200904115354.25336-5-ville.syrjala@linux.intel.com> (raw) In-Reply-To: <20200904115354.25336-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Our definitions for the DPCD DFP capabilities are lacking. Add the missing bits. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/drm/drm_dp_helper.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 17d32d7632b6..86461a40066b 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -386,12 +386,18 @@ # define DP_DS_PORT_TYPE_WIRELESS 6 # define DP_DS_PORT_HPD (1 << 3) /* offset 1 for VGA is maximum megapixels per second / 8 */ -/* offset 2 */ +/* offset 1 for DVI/HDMI is maximum TMDS clock in Mbps / 2.5 */ +/* offset 2 for VGA/DVI/HDMI */ # define DP_DS_MAX_BPC_MASK (3 << 0) # define DP_DS_8BPC 0 # define DP_DS_10BPC 1 # define DP_DS_12BPC 2 # define DP_DS_16BPC 3 +/* offset 3 for DVI */ +# define DP_DS_DVI_DUAL_LINK (1 << 1) +# define DP_DS_DVI_HIGH_COLOR_DEPTH (1 << 2) +/* offset 3 for HDMI */ +# define DP_DS_HDMI_FRAME_SEQ_TO_FRAME_PACK (1 << 0) #define DP_MAX_DOWNSTREAM_PORTS 0x10 -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
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From: Ville Syrjala <ville.syrjala@linux.intel.com> To: dri-devel@lists.freedesktop.org Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v2 04/18] drm/dp: Define more downstream facing port caps Date: Fri, 4 Sep 2020 14:53:40 +0300 [thread overview] Message-ID: <20200904115354.25336-5-ville.syrjala@linux.intel.com> (raw) In-Reply-To: <20200904115354.25336-1-ville.syrjala@linux.intel.com> From: Ville Syrjälä <ville.syrjala@linux.intel.com> Our definitions for the DPCD DFP capabilities are lacking. Add the missing bits. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- include/drm/drm_dp_helper.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 17d32d7632b6..86461a40066b 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -386,12 +386,18 @@ # define DP_DS_PORT_TYPE_WIRELESS 6 # define DP_DS_PORT_HPD (1 << 3) /* offset 1 for VGA is maximum megapixels per second / 8 */ -/* offset 2 */ +/* offset 1 for DVI/HDMI is maximum TMDS clock in Mbps / 2.5 */ +/* offset 2 for VGA/DVI/HDMI */ # define DP_DS_MAX_BPC_MASK (3 << 0) # define DP_DS_8BPC 0 # define DP_DS_10BPC 1 # define DP_DS_12BPC 2 # define DP_DS_16BPC 3 +/* offset 3 for DVI */ +# define DP_DS_DVI_DUAL_LINK (1 << 1) +# define DP_DS_DVI_HIGH_COLOR_DEPTH (1 << 2) +/* offset 3 for HDMI */ +# define DP_DS_HDMI_FRAME_SEQ_TO_FRAME_PACK (1 << 0) #define DP_MAX_DOWNSTREAM_PORTS 0x10 -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-09-04 11:54 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-04 11:53 [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 01/18] drm/dp: Dump downstream facing port caps Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 02/18] drm/i915/lspcon: Do not send infoframes to non-HDMI sinks Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 03/18] drm/dp: Define protocol converter DPCD registers Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` Ville Syrjala [this message] 2020-09-04 11:53 ` [Intel-gfx] [PATCH v2 04/18] drm/dp: Define more downstream facing port caps Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 05/18] drm/i915: Reworkd DFP max bpc handling Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 06/18] drm/dp: Add helpers to identify downstream facing port types Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 17:30 ` Lyude Paul 2020-09-08 17:30 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 07/18] drm/dp: Pimp drm_dp_downstream_max_bpc() Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 17:32 ` Lyude Paul 2020-09-08 17:32 ` [Intel-gfx] " Lyude Paul 2020-09-08 17:51 ` Lyude Paul 2020-09-08 17:51 ` [Intel-gfx] " Lyude Paul 2020-09-10 14:46 ` Ville Syrjälä 2020-09-10 14:46 ` [Intel-gfx] " Ville Syrjälä 2020-09-10 19:40 ` Lyude Paul 2020-09-10 19:40 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 08/18] drm/dp: Redo drm_dp_downstream_max_clock() as drm_dp_downstream_max_dotclock() Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 17:56 ` Lyude Paul 2020-09-08 17:56 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 09/18] drm/i915: Reworkd DP DFP clock handling Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 18:04 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul 2020-09-08 18:04 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul 2020-09-17 12:46 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Ville Syrjälä 2020-09-17 12:46 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjälä 2020-09-08 18:08 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul 2020-09-08 18:08 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul 2020-09-10 13:55 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Ville Syrjälä 2020-09-10 13:55 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Ville Syrjälä 2020-09-10 19:40 ` [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min,max}_tmds_clock() Lyude Paul 2020-09-10 19:40 ` [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock() Lyude Paul 2020-09-04 11:53 ` [PATCH v2 11/18] drm/i915: Deal with TMDS DFP clock limits Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 12/18] drm/i915: Configure DP 1.3+ protocol converted HDMI mode Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 18:11 ` Lyude Paul 2020-09-08 18:11 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 13/18] drm/dp: Add drm_dp_downstream_mode() Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 18:13 ` Lyude Paul 2020-09-08 18:13 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 14/18] drm/i915: Handle downstream facing ports w/o EDID Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 15/18] drm/i915: Extract intel_hdmi_has_audio() Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 16/18] drm/i915: DP->HDMI TMDS clock limits vs. deep color Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 11:53 ` [PATCH v2 17/18] drm/dp: Add helpers for DFP YCbCr 4:2:0 handling Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-08 18:15 ` Lyude Paul 2020-09-08 18:15 ` [Intel-gfx] " Lyude Paul 2020-09-04 11:53 ` [PATCH v2 18/18] drm/i915: Do YCbCr 444->420 conversion via DP protocol converters Ville Syrjala 2020-09-04 11:53 ` [Intel-gfx] " Ville Syrjala 2020-09-04 13:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Pimp DP DFP handling (rev2) Patchwork 2020-09-04 13:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-09-04 20:09 ` [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Lyude Paul 2020-09-04 20:09 ` [Intel-gfx] " Lyude Paul 2020-09-04 21:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Pimp DP DFP handling (rev2) Patchwork 2020-09-08 18:34 ` [PATCH v2 00/18] drm/i915: Pimp DP DFP handling Lyude Paul 2020-09-08 18:34 ` [Intel-gfx] " Lyude Paul [not found] ` <fa772231854424f2b4edc69e23b0edd924695e6c.camel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2020-09-17 16:11 ` Ville Syrjälä 2020-09-17 16:11 ` [Intel-gfx] " Ville Syrjälä 2020-09-17 16:11 ` Ville Syrjälä
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