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From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>,
	Boris Brezillon <boris.brezillon@collabora.com>
Subject: [PATCH v14 08/15] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Thu, 1 Oct 2020 00:27:25 +0530	[thread overview]
Message-ID: <20200930185732.6201-9-p.yadav@ti.com> (raw)
In-Reply-To: <20200930185732.6201-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 73a26e7e32c2..6b54a923002a 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3068,6 +3068,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3107,6 +3136,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 9a33c8d07335..5cfe2db9ee13 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.28.0


WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Boris Brezillon <boris.brezillon@collabora.com>,
	Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v14 08/15] mtd: spi-nor: core: enable octal DTR mode when possible
Date: Thu, 1 Oct 2020 00:27:25 +0530	[thread overview]
Message-ID: <20200930185732.6201-9-p.yadav@ti.com> (raw)
In-Reply-To: <20200930185732.6201-1-p.yadav@ti.com>

Allow flashes to specify a hook to enable octal DTR mode. Use this hook
whenever possible to get optimal transfer speeds.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/core.h |  2 ++
 2 files changed, 37 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 73a26e7e32c2..6b54a923002a 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3068,6 +3068,35 @@ static int spi_nor_init_params(struct spi_nor *nor)
 	return 0;
 }
 
+/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
+ * @nor:                 pointer to a 'struct spi_nor'
+ * @enable:              whether to enable or disable Octal DTR
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+	int ret;
+
+	if (!nor->params->octal_dtr_enable)
+		return 0;
+
+	if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR &&
+	      nor->write_proto == SNOR_PROTO_8_8_8_DTR))
+		return 0;
+
+	ret = nor->params->octal_dtr_enable(nor, enable);
+	if (ret)
+		return ret;
+
+	if (enable)
+		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+	else
+		nor->reg_proto = SNOR_PROTO_1_1_1;
+
+	return 0;
+}
+
 /**
  * spi_nor_quad_enable() - enable Quad I/O if needed.
  * @nor:                pointer to a 'struct spi_nor'
@@ -3107,6 +3136,12 @@ static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
 
+	err = spi_nor_octal_dtr_enable(nor, true);
+	if (err) {
+		dev_dbg(nor->dev, "octal mode not supported\n");
+		return err;
+	}
+
 	err = spi_nor_quad_enable(nor);
 	if (err) {
 		dev_dbg(nor->dev, "quad mode not supported\n");
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 9a33c8d07335..5cfe2db9ee13 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -203,6 +203,7 @@ struct spi_nor_locking_ops {
  *                      higher index in the array, the higher priority.
  * @erase_map:		the erase map parsed from the SFDP Sector Map Parameter
  *                      Table.
+ * @octal_dtr_enable:	enables SPI NOR octal DTR mode.
  * @quad_enable:	enables SPI NOR quad mode.
  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
  * @convert_addr:	converts an absolute address into something the flash
@@ -226,6 +227,7 @@ struct spi_nor_flash_parameter {
 
 	struct spi_nor_erase_map        erase_map;
 
+	int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
 	int (*quad_enable)(struct spi_nor *nor);
 	int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
 	u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
-- 
2.28.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2020-09-30 18:58 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30 18:57 [PATCH v14 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-30 18:57 ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:19   ` Tudor.Ambarus
2020-10-01  7:19     ` Tudor.Ambarus
2020-10-01  7:34     ` Pratyush Yadav
2020-10-01  7:34       ` Pratyush Yadav
2020-10-01  7:50       ` Miquel Raynal
2020-10-01  7:50         ` Miquel Raynal
2020-10-01  8:18         ` Tudor.Ambarus
2020-10-01  8:18           ` Tudor.Ambarus
2020-10-01 10:50         ` Vignesh Raghavendra
2020-10-01 10:50           ` Vignesh Raghavendra
2020-09-30 18:57 ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg,write_reg,erase}() Pratyush Yadav
2020-09-30 18:57   ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg, write_reg, erase}() Pratyush Yadav
2020-10-01  7:21   ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg,write_reg,erase}() Tudor.Ambarus
2020-10-01  7:21     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:46   ` Tudor.Ambarus
2020-10-01  7:46     ` Tudor.Ambarus
2020-10-01  8:37     ` Pratyush Yadav
2020-10-01  8:37       ` Pratyush Yadav
2020-10-01  8:49       ` Tudor.Ambarus
2020-10-01  8:49         ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:49   ` Tudor.Ambarus
2020-10-01  7:49     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:50   ` Tudor.Ambarus
2020-10-01  7:50     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:52   ` Tudor.Ambarus
2020-10-01  7:52     ` Tudor.Ambarus
2020-09-30 18:57 ` Pratyush Yadav [this message]
2020-09-30 18:57   ` [PATCH v14 08/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-10-01  8:09   ` Tudor.Ambarus
2020-10-01  8:09     ` Tudor.Ambarus
2020-10-01  8:42     ` Pratyush Yadav
2020-10-01  8:42       ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 09/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 10/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:20   ` Tudor.Ambarus
2020-10-01  8:20     ` Tudor.Ambarus
2020-10-01 11:56     ` Pratyush Yadav
2020-10-01 11:56       ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:21   ` Tudor.Ambarus
2020-10-01  8:21     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:23   ` Tudor.Ambarus
2020-10-01  8:23     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:26   ` Tudor.Ambarus
2020-10-01  8:26     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:35   ` Tudor.Ambarus
2020-10-01  8:35     ` Tudor.Ambarus
2020-10-01  8:40     ` Pratyush Yadav
2020-10-01  8:40       ` Pratyush Yadav
2020-10-01  8:50       ` Tudor.Ambarus
2020-10-01  8:50         ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:38   ` Tudor.Ambarus
2020-10-01  8:38     ` Tudor.Ambarus
2020-10-01 19:43     ` Pratyush Yadav
2020-10-01 19:43       ` Pratyush Yadav

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