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From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>
Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<nsekhar@ti.com>, <boris.brezillon@collabora.com>
Subject: Re: [PATCH v14 03/15] mtd: spi-nor: add support for DTR protocol
Date: Thu, 1 Oct 2020 08:49:01 +0000	[thread overview]
Message-ID: <2a34630d-1159-e678-1596-035328f412aa@microchip.com> (raw)
In-Reply-To: <20201001083737.iacunfb7l75elvex@ti.com>

On 10/1/20 11:37 AM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 01/10/20 07:46AM, Tudor.Ambarus@microchip.com wrote:
>> On 9/30/20 9:57 PM, Pratyush Yadav wrote:
>>> @@ -2387,12 +2496,16 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor
>>> *nor, u32 *hwcaps)
>>>         struct spi_nor_flash_parameter *params = nor->params;
>>>         unsigned int cap;
>>>
>>> -       /* DTR modes are not supported yet, mask them all. */
>>> -       *hwcaps &= ~SNOR_HWCAPS_DTR;
>>> -
>>>         /* X-X-X modes are not supported yet, mask them all. */
>>>         *hwcaps &= ~SNOR_HWCAPS_X_X_X;
>>>
>>> +       /*
>>> +        * If the reset line is broken, we do not want to enter a stateful
>>> +        * mode.
>>> +        */
>>> +       if (nor->flags & SNOR_F_BROKEN_RESET)
>>> +               *hwcaps &= ~(SNOR_HWCAPS_X_X_X | SNOR_HWCAPS_X_X_X_DTR);
>>
>> SNOR_HWCAPS_X_X_X is already masked out above. Do we need to do it again?
> 
> That might change later and the person removing that line might not
> remember or even know to add it back here.

ok

WARNING: multiple messages have this Message-ID (diff)
From: <Tudor.Ambarus@microchip.com>
To: <p.yadav@ti.com>
Cc: vigneshr@ti.com, richard@nod.at, nsekhar@ti.com,
	linux-kernel@vger.kernel.org, boris.brezillon@collabora.com,
	linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com
Subject: Re: [PATCH v14 03/15] mtd: spi-nor: add support for DTR protocol
Date: Thu, 1 Oct 2020 08:49:01 +0000	[thread overview]
Message-ID: <2a34630d-1159-e678-1596-035328f412aa@microchip.com> (raw)
In-Reply-To: <20201001083737.iacunfb7l75elvex@ti.com>

On 10/1/20 11:37 AM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 01/10/20 07:46AM, Tudor.Ambarus@microchip.com wrote:
>> On 9/30/20 9:57 PM, Pratyush Yadav wrote:
>>> @@ -2387,12 +2496,16 @@ spi_nor_spimem_adjust_hwcaps(struct spi_nor
>>> *nor, u32 *hwcaps)
>>>         struct spi_nor_flash_parameter *params = nor->params;
>>>         unsigned int cap;
>>>
>>> -       /* DTR modes are not supported yet, mask them all. */
>>> -       *hwcaps &= ~SNOR_HWCAPS_DTR;
>>> -
>>>         /* X-X-X modes are not supported yet, mask them all. */
>>>         *hwcaps &= ~SNOR_HWCAPS_X_X_X;
>>>
>>> +       /*
>>> +        * If the reset line is broken, we do not want to enter a stateful
>>> +        * mode.
>>> +        */
>>> +       if (nor->flags & SNOR_F_BROKEN_RESET)
>>> +               *hwcaps &= ~(SNOR_HWCAPS_X_X_X | SNOR_HWCAPS_X_X_X_DTR);
>>
>> SNOR_HWCAPS_X_X_X is already masked out above. Do we need to do it again?
> 
> That might change later and the person removing that line might not
> remember or even know to add it back here.

ok
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  reply	other threads:[~2020-10-01  8:49 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30 18:57 [PATCH v14 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-30 18:57 ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:19   ` Tudor.Ambarus
2020-10-01  7:19     ` Tudor.Ambarus
2020-10-01  7:34     ` Pratyush Yadav
2020-10-01  7:34       ` Pratyush Yadav
2020-10-01  7:50       ` Miquel Raynal
2020-10-01  7:50         ` Miquel Raynal
2020-10-01  8:18         ` Tudor.Ambarus
2020-10-01  8:18           ` Tudor.Ambarus
2020-10-01 10:50         ` Vignesh Raghavendra
2020-10-01 10:50           ` Vignesh Raghavendra
2020-09-30 18:57 ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg,write_reg,erase}() Pratyush Yadav
2020-09-30 18:57   ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg, write_reg, erase}() Pratyush Yadav
2020-10-01  7:21   ` [PATCH v14 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg,write_reg,erase}() Tudor.Ambarus
2020-10-01  7:21     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:46   ` Tudor.Ambarus
2020-10-01  7:46     ` Tudor.Ambarus
2020-10-01  8:37     ` Pratyush Yadav
2020-10-01  8:37       ` Pratyush Yadav
2020-10-01  8:49       ` Tudor.Ambarus [this message]
2020-10-01  8:49         ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:49   ` Tudor.Ambarus
2020-10-01  7:49     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:50   ` Tudor.Ambarus
2020-10-01  7:50     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  7:52   ` Tudor.Ambarus
2020-10-01  7:52     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 08/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:09   ` Tudor.Ambarus
2020-10-01  8:09     ` Tudor.Ambarus
2020-10-01  8:42     ` Pratyush Yadav
2020-10-01  8:42       ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 09/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 10/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:20   ` Tudor.Ambarus
2020-10-01  8:20     ` Tudor.Ambarus
2020-10-01 11:56     ` Pratyush Yadav
2020-10-01 11:56       ` Pratyush Yadav
2020-09-30 18:57 ` [PATCH v14 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:21   ` Tudor.Ambarus
2020-10-01  8:21     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:23   ` Tudor.Ambarus
2020-10-01  8:23     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:26   ` Tudor.Ambarus
2020-10-01  8:26     ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:35   ` Tudor.Ambarus
2020-10-01  8:35     ` Tudor.Ambarus
2020-10-01  8:40     ` Pratyush Yadav
2020-10-01  8:40       ` Pratyush Yadav
2020-10-01  8:50       ` Tudor.Ambarus
2020-10-01  8:50         ` Tudor.Ambarus
2020-09-30 18:57 ` [PATCH v14 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-09-30 18:57   ` Pratyush Yadav
2020-10-01  8:38   ` Tudor.Ambarus
2020-10-01  8:38     ` Tudor.Ambarus
2020-10-01 19:43     ` Pratyush Yadav
2020-10-01 19:43       ` Pratyush Yadav

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