All of lore.kernel.org
 help / color / mirror / Atom feed
From: Pratyush Yadav <p.yadav@ti.com>
To: Maxime Ripard <mripard@kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Pratyush Yadav <p.yadav@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>,
	Peter Ujfalusi <peter.ujfalusi@gmail.com>,
	Steve Longerbeam <slongerbeam@gmail.com>,
	Benoit Parrot <bparrot@ti.com>, <linux-media@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <dmaengine@vger.kernel.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
	Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: [PATCH v2 11/18] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX
Date: Wed, 26 May 2021 20:53:01 +0530	[thread overview]
Message-ID: <20210526152308.16525-12-p.yadav@ti.com> (raw)
In-Reply-To: <20210526152308.16525-1-p.yadav@ti.com>

The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
have up to 32 threads but the current driver only supports using one. So
add an entry for that one thread.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

---

Changes in v2:
- Add all 64 threads, instead of having only the one thread being
  currently used by the driver.

 drivers/dma/ti/k3-psil-j721e.c | 73 ++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c
index 7580870ed746..34e3fc565a37 100644
--- a/drivers/dma/ti/k3-psil-j721e.c
+++ b/drivers/dma/ti/k3-psil-j721e.c
@@ -58,6 +58,14 @@
 		},					\
 	}
 
+#define PSIL_CSI2RX(x)					\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+		},					\
+	}
+
 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 static struct psil_ep j721e_src_ep_map[] = {
 	/* SA2UL */
@@ -138,6 +146,71 @@ static struct psil_ep j721e_src_ep_map[] = {
 	PSIL_PDMA_XY_PKT(0x4707),
 	PSIL_PDMA_XY_PKT(0x4708),
 	PSIL_PDMA_XY_PKT(0x4709),
+	/* CSI2RX */
+	PSIL_CSI2RX(0x4940),
+	PSIL_CSI2RX(0x4941),
+	PSIL_CSI2RX(0x4942),
+	PSIL_CSI2RX(0x4943),
+	PSIL_CSI2RX(0x4944),
+	PSIL_CSI2RX(0x4945),
+	PSIL_CSI2RX(0x4946),
+	PSIL_CSI2RX(0x4947),
+	PSIL_CSI2RX(0x4948),
+	PSIL_CSI2RX(0x4949),
+	PSIL_CSI2RX(0x494a),
+	PSIL_CSI2RX(0x494b),
+	PSIL_CSI2RX(0x494c),
+	PSIL_CSI2RX(0x494d),
+	PSIL_CSI2RX(0x494e),
+	PSIL_CSI2RX(0x494f),
+	PSIL_CSI2RX(0x4950),
+	PSIL_CSI2RX(0x4951),
+	PSIL_CSI2RX(0x4952),
+	PSIL_CSI2RX(0x4953),
+	PSIL_CSI2RX(0x4954),
+	PSIL_CSI2RX(0x4955),
+	PSIL_CSI2RX(0x4956),
+	PSIL_CSI2RX(0x4957),
+	PSIL_CSI2RX(0x4958),
+	PSIL_CSI2RX(0x4959),
+	PSIL_CSI2RX(0x495a),
+	PSIL_CSI2RX(0x495b),
+	PSIL_CSI2RX(0x495c),
+	PSIL_CSI2RX(0x495d),
+	PSIL_CSI2RX(0x495e),
+	PSIL_CSI2RX(0x495f),
+	PSIL_CSI2RX(0x4960),
+	PSIL_CSI2RX(0x4961),
+	PSIL_CSI2RX(0x4962),
+	PSIL_CSI2RX(0x4963),
+	PSIL_CSI2RX(0x4964),
+	PSIL_CSI2RX(0x4965),
+	PSIL_CSI2RX(0x4966),
+	PSIL_CSI2RX(0x4967),
+	PSIL_CSI2RX(0x4968),
+	PSIL_CSI2RX(0x4969),
+	PSIL_CSI2RX(0x496a),
+	PSIL_CSI2RX(0x496b),
+	PSIL_CSI2RX(0x496c),
+	PSIL_CSI2RX(0x496d),
+	PSIL_CSI2RX(0x496e),
+	PSIL_CSI2RX(0x496f),
+	PSIL_CSI2RX(0x4970),
+	PSIL_CSI2RX(0x4971),
+	PSIL_CSI2RX(0x4972),
+	PSIL_CSI2RX(0x4973),
+	PSIL_CSI2RX(0x4974),
+	PSIL_CSI2RX(0x4975),
+	PSIL_CSI2RX(0x4976),
+	PSIL_CSI2RX(0x4977),
+	PSIL_CSI2RX(0x4978),
+	PSIL_CSI2RX(0x4979),
+	PSIL_CSI2RX(0x497a),
+	PSIL_CSI2RX(0x497b),
+	PSIL_CSI2RX(0x497c),
+	PSIL_CSI2RX(0x497d),
+	PSIL_CSI2RX(0x497e),
+	PSIL_CSI2RX(0x497f),
 	/* CPSW9 */
 	PSIL_ETHERNET(0x4a00),
 	/* CPSW0 */
-- 
2.30.0


WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Maxime Ripard <mripard@kernel.org>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>, Pratyush Yadav <p.yadav@ti.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>,
	Peter Ujfalusi <peter.ujfalusi@gmail.com>,
	Steve Longerbeam <slongerbeam@gmail.com>,
	Benoit Parrot <bparrot@ti.com>, <linux-media@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <dmaengine@vger.kernel.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
	Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Subject: [PATCH v2 11/18] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX
Date: Wed, 26 May 2021 20:53:01 +0530	[thread overview]
Message-ID: <20210526152308.16525-12-p.yadav@ti.com> (raw)
In-Reply-To: <20210526152308.16525-1-p.yadav@ti.com>

The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
have up to 32 threads but the current driver only supports using one. So
add an entry for that one thread.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

---

Changes in v2:
- Add all 64 threads, instead of having only the one thread being
  currently used by the driver.

 drivers/dma/ti/k3-psil-j721e.c | 73 ++++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c
index 7580870ed746..34e3fc565a37 100644
--- a/drivers/dma/ti/k3-psil-j721e.c
+++ b/drivers/dma/ti/k3-psil-j721e.c
@@ -58,6 +58,14 @@
 		},					\
 	}
 
+#define PSIL_CSI2RX(x)					\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+		},					\
+	}
+
 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 static struct psil_ep j721e_src_ep_map[] = {
 	/* SA2UL */
@@ -138,6 +146,71 @@ static struct psil_ep j721e_src_ep_map[] = {
 	PSIL_PDMA_XY_PKT(0x4707),
 	PSIL_PDMA_XY_PKT(0x4708),
 	PSIL_PDMA_XY_PKT(0x4709),
+	/* CSI2RX */
+	PSIL_CSI2RX(0x4940),
+	PSIL_CSI2RX(0x4941),
+	PSIL_CSI2RX(0x4942),
+	PSIL_CSI2RX(0x4943),
+	PSIL_CSI2RX(0x4944),
+	PSIL_CSI2RX(0x4945),
+	PSIL_CSI2RX(0x4946),
+	PSIL_CSI2RX(0x4947),
+	PSIL_CSI2RX(0x4948),
+	PSIL_CSI2RX(0x4949),
+	PSIL_CSI2RX(0x494a),
+	PSIL_CSI2RX(0x494b),
+	PSIL_CSI2RX(0x494c),
+	PSIL_CSI2RX(0x494d),
+	PSIL_CSI2RX(0x494e),
+	PSIL_CSI2RX(0x494f),
+	PSIL_CSI2RX(0x4950),
+	PSIL_CSI2RX(0x4951),
+	PSIL_CSI2RX(0x4952),
+	PSIL_CSI2RX(0x4953),
+	PSIL_CSI2RX(0x4954),
+	PSIL_CSI2RX(0x4955),
+	PSIL_CSI2RX(0x4956),
+	PSIL_CSI2RX(0x4957),
+	PSIL_CSI2RX(0x4958),
+	PSIL_CSI2RX(0x4959),
+	PSIL_CSI2RX(0x495a),
+	PSIL_CSI2RX(0x495b),
+	PSIL_CSI2RX(0x495c),
+	PSIL_CSI2RX(0x495d),
+	PSIL_CSI2RX(0x495e),
+	PSIL_CSI2RX(0x495f),
+	PSIL_CSI2RX(0x4960),
+	PSIL_CSI2RX(0x4961),
+	PSIL_CSI2RX(0x4962),
+	PSIL_CSI2RX(0x4963),
+	PSIL_CSI2RX(0x4964),
+	PSIL_CSI2RX(0x4965),
+	PSIL_CSI2RX(0x4966),
+	PSIL_CSI2RX(0x4967),
+	PSIL_CSI2RX(0x4968),
+	PSIL_CSI2RX(0x4969),
+	PSIL_CSI2RX(0x496a),
+	PSIL_CSI2RX(0x496b),
+	PSIL_CSI2RX(0x496c),
+	PSIL_CSI2RX(0x496d),
+	PSIL_CSI2RX(0x496e),
+	PSIL_CSI2RX(0x496f),
+	PSIL_CSI2RX(0x4970),
+	PSIL_CSI2RX(0x4971),
+	PSIL_CSI2RX(0x4972),
+	PSIL_CSI2RX(0x4973),
+	PSIL_CSI2RX(0x4974),
+	PSIL_CSI2RX(0x4975),
+	PSIL_CSI2RX(0x4976),
+	PSIL_CSI2RX(0x4977),
+	PSIL_CSI2RX(0x4978),
+	PSIL_CSI2RX(0x4979),
+	PSIL_CSI2RX(0x497a),
+	PSIL_CSI2RX(0x497b),
+	PSIL_CSI2RX(0x497c),
+	PSIL_CSI2RX(0x497d),
+	PSIL_CSI2RX(0x497e),
+	PSIL_CSI2RX(0x497f),
 	/* CPSW9 */
 	PSIL_ETHERNET(0x4a00),
 	/* CPSW0 */
-- 
2.30.0


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  parent reply	other threads:[~2021-05-26 15:25 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26 15:22 [PATCH v2 00/18] CSI2RX support on J721E Pratyush Yadav
2021-05-26 15:22 ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 01/18] phy: Distinguish between Rx and Tx for MIPI D-PHY with submodes Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 02/18] phy: cdns-dphy: Prepare for Rx support Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 03/18] phy: cdns-dphy: Allow setting mode Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 04/18] phy: cdns-dphy: Add Rx support Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-28  6:09   ` Tomi Valkeinen
2021-05-28  6:09     ` Tomi Valkeinen
2021-05-26 15:22 ` [PATCH v2 05/18] media: ov5640: Use runtime PM to control sensor power Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-28  6:44   ` Tomi Valkeinen
2021-05-28  6:44     ` Tomi Valkeinen
2021-05-28  7:25     ` Pratyush Yadav
2021-05-28  7:25       ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 06/18] media: cadence: csi2rx: Add external DPHY support Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-28  7:23   ` Tomi Valkeinen
2021-05-28  7:23     ` Tomi Valkeinen
2021-05-28  7:30     ` Pratyush Yadav
2021-05-28  7:30       ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 07/18] media: cadence: csi2rx: Soft reset the streams before starting capture Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 08/18] media: cadence: csi2rx: Set the STOP bit when stopping a stream Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:22 ` [PATCH v2 09/18] media: cadence: csi2rx: Fix stream data configuration Pratyush Yadav
2021-05-26 15:22   ` Pratyush Yadav
2021-05-26 15:23 ` [PATCH v2 10/18] media: cadence: csi2rx: Populate subdev devnode Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-05-28  7:16   ` Tomi Valkeinen
2021-05-28  7:16     ` Tomi Valkeinen
2021-05-28  7:24     ` Pratyush Yadav
2021-05-28  7:24       ` Pratyush Yadav
2021-05-28  7:35       ` Tomi Valkeinen
2021-05-28  7:35         ` Tomi Valkeinen
2021-06-03 12:42         ` Pratyush Yadav
2021-06-03 12:42           ` Pratyush Yadav
2021-05-26 15:23 ` Pratyush Yadav [this message]
2021-05-26 15:23   ` [PATCH v2 11/18] dmaengine: ti: k3-psil-j721e: Add entry for CSI2RX Pratyush Yadav
2021-05-31  6:51   ` Péter Ujfalusi
2021-05-31  6:51     ` Péter Ujfalusi
2021-05-31  9:16     ` Pratyush Yadav
2021-05-31  9:16       ` Pratyush Yadav
2021-05-26 15:23 ` [PATCH v2 12/18] media: Re-structure TI platform drivers Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-05-28  8:29   ` Tomi Valkeinen
2021-05-28  8:29     ` Tomi Valkeinen
2021-05-26 15:23 ` [PATCH v2 13/18] media: ti: Add CSI2RX support for J721E Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-05-27 13:29   ` Tomi Valkeinen
2021-05-27 13:29     ` Tomi Valkeinen
2021-06-03 12:49     ` Pratyush Yadav
2021-06-03 12:49       ` Pratyush Yadav
2021-06-04  8:04       ` Tomi Valkeinen
2021-06-04  8:04         ` Tomi Valkeinen
2021-05-26 15:23 ` [PATCH v2 14/18] media: dt-bindings: Add DT bindings for TI J721E CSI2RX driver Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-05-27 14:23   ` Rob Herring
2021-05-27 14:23     ` Rob Herring
2021-06-03 12:43     ` Pratyush Yadav
2021-06-03 12:43       ` Pratyush Yadav
2021-05-26 15:23 ` [PATCH v2 15/18] media: dt-bindings: Convert Cadence CSI2RX binding to YAML Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-06-01 17:45   ` Rob Herring
2021-06-01 17:45     ` Rob Herring
2021-06-03 12:23     ` Pratyush Yadav
2021-06-03 12:23       ` Pratyush Yadav
2021-05-26 15:23 ` [PATCH v2 16/18] phy: dt-bindings: Convert Cadence DPHY " Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-06-02 19:51   ` Rob Herring
2021-06-02 19:51     ` Rob Herring
2021-05-26 15:23 ` [PATCH v2 17/18] phy: dt-bindings: cdns,dphy: make clocks optional Pratyush Yadav
2021-05-26 15:23   ` Pratyush Yadav
2021-06-02 13:27   ` Maxime Ripard
2021-06-02 13:27     ` Maxime Ripard
2021-06-03  8:16     ` Pratyush Yadav
2021-06-03  8:16       ` Pratyush Yadav
2021-06-02 20:03   ` Rob Herring
2021-06-02 20:03     ` Rob Herring
2021-05-26 15:23 ` [PATCH v2 18/18] phy: dt-bindings: cdns,dphy: add power-domains property Pratyush Yadav
2021-05-26 15:23   ` [PATCH v2 18/18] phy: dt-bindings: cdns, dphy: " Pratyush Yadav
2021-06-02 20:03   ` [PATCH v2 18/18] phy: dt-bindings: cdns,dphy: " Rob Herring
2021-06-02 20:03     ` Rob Herring
2021-05-27 12:42 ` [PATCH v2 00/18] CSI2RX support on J721E Tomi Valkeinen
2021-05-27 12:42   ` Tomi Valkeinen
2021-06-03 12:54   ` Pratyush Yadav
2021-06-03 12:54     ` Pratyush Yadav
2021-05-27 13:23 ` Tomi Valkeinen
2021-05-27 13:23   ` Tomi Valkeinen
2021-06-03 12:52   ` Pratyush Yadav
2021-06-03 12:52     ` Pratyush Yadav
2021-06-04  7:54     ` Tomi Valkeinen
2021-06-04  7:54       ` Tomi Valkeinen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210526152308.16525-12-p.yadav@ti.com \
    --to=p.yadav@ti.com \
    --cc=bparrot@ti.com \
    --cc=chunfeng.yun@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=kishon@ti.com \
    --cc=laurent.pinchart@ideasonboard.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=mchehab@kernel.org \
    --cc=mripard@kernel.org \
    --cc=peter.ujfalusi@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=slongerbeam@gmail.com \
    --cc=tomi.valkeinen@ideasonboard.com \
    --cc=vigneshr@ti.com \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.