* [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
@ 2021-07-31 12:22 ` Pali Rohár
2021-08-02 6:33 ` Stefan Roese
2021-07-31 12:22 ` [PATCH 2/5] arm: mvebu: a37x: " Pali Rohár
` (4 subsequent siblings)
5 siblings, 1 reply; 20+ messages in thread
From: Pali Rohár @ 2021-07-31 12:22 UTC (permalink / raw)
To: Stefan Roese, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz.
Use this information instead of manual configuration in every board file.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++-----
include/configs/clearfog.h | 1 -
include/configs/controlcenterdc.h | 2 --
include/configs/db-88f6820-amc.h | 2 --
include/configs/db-88f6820-gp.h | 2 --
include/configs/helios4.h | 1 -
include/configs/turris_omnia.h | 1 -
include/configs/x530.h | 2 --
8 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 3f3b15aa8ab6..cb323aa59a76 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -33,11 +33,6 @@
#define MV_88F68XX_A0_ID 0x4
#define MV_88F68XX_B0_ID 0xa
-/* TCLK Core Clock definition */
-#ifndef CONFIG_SYS_TCLK
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-#endif
-
/* SOC specific definations */
#define INTREG_BASE 0xd0000000
#define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
@@ -170,6 +165,9 @@
#define BOOT_FROM_SPI 0x32
#define BOOT_FROM_MMC 0x30
#define BOOT_FROM_MMC_ALT 0x31
+
+#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \
+ 200000000 : 250000000)
#elif defined(CONFIG_ARMADA_MSYS)
/* SAR values for MSYS */
#define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200)
@@ -207,4 +205,9 @@
#define BOOT_FROM_SPI 0x3
#endif
+/* TCLK Core Clock definition */
+#ifndef CONFIG_SYS_TCLK
+#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
+#endif
+
#endif /* _MVEBU_SOC_H */
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index fbdd2f0a244c..705217067b30 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -17,7 +17,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index e81d05aa2e83..d9802d2a3b8d 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -20,8 +20,6 @@
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-
#define CONFIG_LOADADDR 1000000
/*
diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
index 757fbc0b9bcd..83f5b71839e2 100644
--- a/include/configs/db-88f6820-amc.h
+++ b/include/configs/db-88f6820-amc.h
@@ -10,8 +10,6 @@
* High Level Configuration Options (easy to change)
*/
-#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
-
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index d50eb2c12011..feab46cbcbc5 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -10,8 +10,6 @@
* High Level Configuration Options (easy to change)
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MVTWSI
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index 1368080f036b..b5814ed55cf2 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -17,7 +17,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
index 0a824b79397c..18b9861160b0 100644
--- a/include/configs/turris_omnia.h
+++ b/include/configs/turris_omnia.h
@@ -16,7 +16,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/x530.h b/include/configs/x530.h
index 515c6e7ff45c..64d68276234c 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -12,8 +12,6 @@
#define CONFIG_DISPLAY_BOARDINFO_LATE
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
-
/*
* NS16550 Configuration
*/
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
2021-07-31 12:22 ` [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Pali Rohár
@ 2021-08-02 6:33 ` Stefan Roese
0 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-02 6:33 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz.
> Use this information instead of manual configuration in every board file.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/include/mach/soc.h | 13 ++++++++-----
> include/configs/clearfog.h | 1 -
> include/configs/controlcenterdc.h | 2 --
> include/configs/db-88f6820-amc.h | 2 --
> include/configs/db-88f6820-gp.h | 2 --
> include/configs/helios4.h | 1 -
> include/configs/turris_omnia.h | 1 -
> include/configs/x530.h | 2 --
> 8 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index 3f3b15aa8ab6..cb323aa59a76 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -33,11 +33,6 @@
> #define MV_88F68XX_A0_ID 0x4
> #define MV_88F68XX_B0_ID 0xa
>
> -/* TCLK Core Clock definition */
> -#ifndef CONFIG_SYS_TCLK
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -#endif
> -
> /* SOC specific definations */
> #define INTREG_BASE 0xd0000000
> #define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
> @@ -170,6 +165,9 @@
> #define BOOT_FROM_SPI 0x32
> #define BOOT_FROM_MMC 0x30
> #define BOOT_FROM_MMC_ALT 0x31
> +
> +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \
> + 200000000 : 250000000)
> #elif defined(CONFIG_ARMADA_MSYS)
> /* SAR values for MSYS */
> #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200)
> @@ -207,4 +205,9 @@
> #define BOOT_FROM_SPI 0x3
> #endif
>
> +/* TCLK Core Clock definition */
> +#ifndef CONFIG_SYS_TCLK
> +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> +#endif
> +
> #endif /* _MVEBU_SOC_H */
> diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
> index fbdd2f0a244c..705217067b30 100644
> --- a/include/configs/clearfog.h
> +++ b/include/configs/clearfog.h
> @@ -17,7 +17,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
> index e81d05aa2e83..d9802d2a3b8d 100644
> --- a/include/configs/controlcenterdc.h
> +++ b/include/configs/controlcenterdc.h
> @@ -20,8 +20,6 @@
> * U-Boot into it.
> */
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> #define CONFIG_LOADADDR 1000000
>
> /*
> diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h
> index 757fbc0b9bcd..83f5b71839e2 100644
> --- a/include/configs/db-88f6820-amc.h
> +++ b/include/configs/db-88f6820-amc.h
> @@ -10,8 +10,6 @@
> * High Level Configuration Options (easy to change)
> */
>
> -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> -
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
>
> diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
> index d50eb2c12011..feab46cbcbc5 100644
> --- a/include/configs/db-88f6820-gp.h
> +++ b/include/configs/db-88f6820-gp.h
> @@ -10,8 +10,6 @@
> * High Level Configuration Options (easy to change)
> */
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> /* I2C */
> #define CONFIG_SYS_I2C
> #define CONFIG_SYS_I2C_MVTWSI
> diff --git a/include/configs/helios4.h b/include/configs/helios4.h
> index 1368080f036b..b5814ed55cf2 100644
> --- a/include/configs/helios4.h
> +++ b/include/configs/helios4.h
> @@ -17,7 +17,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h
> index 0a824b79397c..18b9861160b0 100644
> --- a/include/configs/turris_omnia.h
> +++ b/include/configs/turris_omnia.h
> @@ -16,7 +16,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/x530.h b/include/configs/x530.h
> index 515c6e7ff45c..64d68276234c 100644
> --- a/include/configs/x530.h
> +++ b/include/configs/x530.h
> @@ -12,8 +12,6 @@
>
> #define CONFIG_DISPLAY_BOARDINFO_LATE
>
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> -
> /*
> * NS16550 Configuration
> */
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 2/5] arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
2021-07-31 12:22 ` [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Pali Rohár
@ 2021-07-31 12:22 ` Pali Rohár
2021-08-02 6:33 ` Stefan Roese
2021-07-31 12:22 ` [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally Pali Rohár
` (3 subsequent siblings)
5 siblings, 1 reply; 20+ messages in thread
From: Pali Rohár @ 2021-07-31 12:22 UTC (permalink / raw)
To: Stefan Roese, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
Use this information instead of manual configuration in every board file.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-mvebu/include/mach/soc.h | 3 +++
include/configs/db-88f6720.h | 1 -
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index cb323aa59a76..eb6906ad8027 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -145,6 +145,9 @@
#define BOOT_FROM_UART 0x30
#define BOOT_FROM_SPI 0x38
+
+#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \
+ 200000000 : 166000000)
#elif defined(CONFIG_ARMADA_38X)
/* SAR values for Armada 38x */
#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600))
diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
index cbb9270f9327..67d8cd42d1c2 100644
--- a/include/configs/db-88f6720.h
+++ b/include/configs/db-88f6720.h
@@ -15,7 +15,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* I2C */
#define CONFIG_SYS_I2C
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 2/5] arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register
2021-07-31 12:22 ` [PATCH 2/5] arm: mvebu: a37x: " Pali Rohár
@ 2021-08-02 6:33 ` Stefan Roese
0 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-02 6:33 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> Bit 20 in SAR register specifies if TCLK is running at 200 MHz or 166 MHz.
> Use this information instead of manual configuration in every board file.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/include/mach/soc.h | 3 +++
> include/configs/db-88f6720.h | 1 -
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index cb323aa59a76..eb6906ad8027 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -145,6 +145,9 @@
>
> #define BOOT_FROM_UART 0x30
> #define BOOT_FROM_SPI 0x38
> +
> +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \
> + 200000000 : 166000000)
> #elif defined(CONFIG_ARMADA_38X)
> /* SAR values for Armada 38x */
> #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600))
> diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h
> index cbb9270f9327..67d8cd42d1c2 100644
> --- a/include/configs/db-88f6720.h
> +++ b/include/configs/db-88f6720.h
> @@ -15,7 +15,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
>
> /* I2C */
> #define CONFIG_SYS_I2C
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
2021-07-31 12:22 ` [PATCH 1/5] arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register Pali Rohár
2021-07-31 12:22 ` [PATCH 2/5] arm: mvebu: a37x: " Pali Rohár
@ 2021-07-31 12:22 ` Pali Rohár
2021-08-02 6:34 ` Stefan Roese
2021-07-31 12:22 ` [PATCH 4/5] arm: mvebu: axp: " Pali Rohár
` (2 subsequent siblings)
5 siblings, 1 reply; 20+ messages in thread
From: Pali Rohár @ 2021-07-31 12:22 UTC (permalink / raw)
To: Stefan Roese, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this
CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
manual configuration in every board file.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-mvebu/include/mach/soc.h | 2 ++
include/configs/crs3xx-98dx3236.h | 1 -
include/configs/db-xc3-24g4xg.h | 1 -
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index eb6906ad8027..e29c0f32c3de 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -187,6 +187,8 @@
#define BOOT_FROM_NAND 0x1
#define BOOT_FROM_UART 0x2
#define BOOT_FROM_SPI 0x3
+
+#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
#else
/* SAR values for Armada XP */
#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230))
diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h
index e2ba7b81263f..3feaa60edad8 100644
--- a/include/configs/crs3xx-98dx3236.h
+++ b/include/configs/crs3xx-98dx3236.h
@@ -12,7 +12,6 @@
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
-#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h
index 0e9ccd9b4419..f04ae487b76a 100644
--- a/include/configs/db-xc3-24g4xg.h
+++ b/include/configs/db-xc3-24g4xg.h
@@ -11,7 +11,6 @@
*/
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
-#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally
2021-07-31 12:22 ` [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally Pali Rohár
@ 2021-08-02 6:34 ` Stefan Roese
0 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-02 6:34 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> This mvebu msys platform always uses fixed 200 MHz TCLK. So specify this
> CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
> manual configuration in every board file.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/include/mach/soc.h | 2 ++
> include/configs/crs3xx-98dx3236.h | 1 -
> include/configs/db-xc3-24g4xg.h | 1 -
> 3 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index eb6906ad8027..e29c0f32c3de 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -187,6 +187,8 @@
> #define BOOT_FROM_NAND 0x1
> #define BOOT_FROM_UART 0x2
> #define BOOT_FROM_SPI 0x3
> +
> +#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> #else
> /* SAR values for Armada XP */
> #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230))
> diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h
> index e2ba7b81263f..3feaa60edad8 100644
> --- a/include/configs/crs3xx-98dx3236.h
> +++ b/include/configs/crs3xx-98dx3236.h
> @@ -12,7 +12,6 @@
>
> #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) /* 64 MB */
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
> -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
> diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h
> index 0e9ccd9b4419..f04ae487b76a 100644
> --- a/include/configs/db-xc3-24g4xg.h
> +++ b/include/configs/db-xc3-24g4xg.h
> @@ -11,7 +11,6 @@
> */
>
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
> -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
>
> /* USB/EHCI configuration */
> #define CONFIG_EHCI_IS_TDI
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/5] arm: mvebu: axp: Set CONFIG_SYS_TCLK globally
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
` (2 preceding siblings ...)
2021-07-31 12:22 ` [PATCH 3/5] arm: mvebu: msys: Set CONFIG_SYS_TCLK globally Pali Rohár
@ 2021-07-31 12:22 ` Pali Rohár
2021-08-02 6:35 ` Stefan Roese
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
2021-08-11 8:27 ` [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Stefan Roese
5 siblings, 1 reply; 20+ messages in thread
From: Pali Rohár @ 2021-07-31 12:22 UTC (permalink / raw)
To: Stefan Roese, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
This mvebu axp platform always uses fixed 250 MHz TCLK. So specify this
CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
manual configuration in every board file.
Now every #if-#else case of soc.h file defines CONFIG_SYS_TCLK, so remove
useless default CONFIG_SYS_TCLK value from the end of soc.h file.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-mvebu/include/mach/soc.h | 3 ---
include/configs/db-mv784mp-gp.h | 1 -
include/configs/ds414.h | 1 -
include/configs/maxbcm.h | 1 -
include/configs/theadorable.h | 1 -
5 files changed, 7 deletions(-)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index e29c0f32c3de..8e8a4058550e 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -208,10 +208,7 @@
#define BOOT_FROM_UART 0x2
#define BOOT_FROM_SPI 0x3
-#endif
-/* TCLK Core Clock definition */
-#ifndef CONFIG_SYS_TCLK
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
#endif
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index ef7eebd081f9..f1b79e8a1fb8 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -16,7 +16,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
#define CONFIG_SYS_I2C
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 4bbb244fa227..9fe830965854 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -18,7 +18,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
#define CONFIG_SYS_I2C
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 0c2185c529f7..a8cffcb82d43 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -15,7 +15,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/* I2C */
#define CONFIG_SYS_I2C
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 31852fb24801..54e60a4094f8 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -15,7 +15,6 @@
* for DDR ECC byte filling in the SPL before loading the main
* U-Boot into it.
*/
-#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
/*
* The debugging version enables USB support via defconfig.
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 4/5] arm: mvebu: axp: Set CONFIG_SYS_TCLK globally
2021-07-31 12:22 ` [PATCH 4/5] arm: mvebu: axp: " Pali Rohár
@ 2021-08-02 6:35 ` Stefan Roese
0 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-02 6:35 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> This mvebu axp platform always uses fixed 250 MHz TCLK. So specify this
> CONFIG_SYS_TCLK option in msys section of global file soc.h file instead of
> manual configuration in every board file.
>
> Now every #if-#else case of soc.h file defines CONFIG_SYS_TCLK, so remove
> useless default CONFIG_SYS_TCLK value from the end of soc.h file.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/include/mach/soc.h | 3 ---
> include/configs/db-mv784mp-gp.h | 1 -
> include/configs/ds414.h | 1 -
> include/configs/maxbcm.h | 1 -
> include/configs/theadorable.h | 1 -
> 5 files changed, 7 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
> index e29c0f32c3de..8e8a4058550e 100644
> --- a/arch/arm/mach-mvebu/include/mach/soc.h
> +++ b/arch/arm/mach-mvebu/include/mach/soc.h
> @@ -208,10 +208,7 @@
>
> #define BOOT_FROM_UART 0x2
> #define BOOT_FROM_SPI 0x3
> -#endif
>
> -/* TCLK Core Clock definition */
> -#ifndef CONFIG_SYS_TCLK
> #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
> #endif
>
> diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
> index ef7eebd081f9..f1b79e8a1fb8 100644
> --- a/include/configs/db-mv784mp-gp.h
> +++ b/include/configs/db-mv784mp-gp.h
> @@ -16,7 +16,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* I2C */
> #define CONFIG_SYS_I2C
> diff --git a/include/configs/ds414.h b/include/configs/ds414.h
> index 4bbb244fa227..9fe830965854 100644
> --- a/include/configs/ds414.h
> +++ b/include/configs/ds414.h
> @@ -18,7 +18,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* I2C */
> #define CONFIG_SYS_I2C
> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> index 0c2185c529f7..a8cffcb82d43 100644
> --- a/include/configs/maxbcm.h
> +++ b/include/configs/maxbcm.h
> @@ -15,7 +15,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /* I2C */
> #define CONFIG_SYS_I2C
> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> index 31852fb24801..54e60a4094f8 100644
> --- a/include/configs/theadorable.h
> +++ b/include/configs/theadorable.h
> @@ -15,7 +15,6 @@
> * for DDR ECC byte filling in the SPL before loading the main
> * U-Boot into it.
> */
> -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
>
> /*
> * The debugging version enables USB support via defconfig.
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
` (3 preceding siblings ...)
2021-07-31 12:22 ` [PATCH 4/5] arm: mvebu: axp: " Pali Rohár
@ 2021-07-31 12:22 ` Pali Rohár
2021-08-01 8:07 ` Chris Packham
2021-08-02 6:35 ` Stefan Roese
2021-08-11 8:27 ` [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Stefan Roese
5 siblings, 2 replies; 20+ messages in thread
From: Pali Rohár @ 2021-07-31 12:22 UTC (permalink / raw)
To: Stefan Roese, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
to correct SOC/platform value. So do not overwrite it in board config
include files.
Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
200 MHz TCLK.
Signed-off-by: Pali Rohár <pali@kernel.org>
---
arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
include/configs/lacie_kw.h | 5 -----
include/configs/lsxl.h | 2 --
3 files changed, 9 deletions(-)
diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
index 33e741420781..87406081cf54 100644
--- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
+++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
@@ -15,8 +15,6 @@
#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
/* TCLK Core Clock definition */
-#ifndef CONFIG_SYS_TCLK
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
-#endif
#endif /* _ASM_ARCH_KW88F6281_H */
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index 420c1d49b08e..88f784f1f0fd 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -39,11 +39,6 @@
#endif
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-/*
- * Core clock definition
- */
-#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
-
/*
* SDRAM configuration
*/
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 0c0ab2486e23..a4a4739d0dd7 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -13,11 +13,9 @@
#if defined(CONFIG_LSCHLV2)
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
#define CONFIG_MACH_TYPE 3006
-#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
#elif defined(CONFIG_LSXHL)
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
#define CONFIG_MACH_TYPE 2663
-/* CONFIG_SYS_TCLK is 200000000 by default */
#else
#error "unknown board"
#endif
--
2.20.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
@ 2021-08-01 8:07 ` Chris Packham
2021-08-01 10:25 ` Pali Rohár
2021-08-02 6:35 ` Stefan Roese
1 sibling, 1 reply; 20+ messages in thread
From: Chris Packham @ 2021-08-01 8:07 UTC (permalink / raw)
To: Pali Rohár
Cc: Stefan Roese, Baruch Siach, Dirk Eibach, u-boot,
Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
>
> Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> to correct SOC/platform value. So do not overwrite it in board config
> include files.
>
> Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> 200 MHz TCLK.
>
It's been a while since I worked with kirkwood but I thought that
there was hardware strapping for the TCLK. If I understand correctly
the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
boards were able to override it to reflect the hardware configuration.
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
> arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> include/configs/lacie_kw.h | 5 -----
> include/configs/lsxl.h | 2 --
> 3 files changed, 9 deletions(-)
>
> diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> index 33e741420781..87406081cf54 100644
> --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> @@ -15,8 +15,6 @@
> #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
>
> /* TCLK Core Clock definition */
> -#ifndef CONFIG_SYS_TCLK
> #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> -#endif
>
> #endif /* _ASM_ARCH_KW88F6281_H */
> diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> index 420c1d49b08e..88f784f1f0fd 100644
> --- a/include/configs/lacie_kw.h
> +++ b/include/configs/lacie_kw.h
> @@ -39,11 +39,6 @@
> #endif
> #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
>
> -/*
> - * Core clock definition
> - */
> -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> -
> /*
> * SDRAM configuration
> */
> diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> index 0c0ab2486e23..a4a4739d0dd7 100644
> --- a/include/configs/lsxl.h
> +++ b/include/configs/lsxl.h
> @@ -13,11 +13,9 @@
> #if defined(CONFIG_LSCHLV2)
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> #define CONFIG_MACH_TYPE 3006
> -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> #elif defined(CONFIG_LSXHL)
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> #define CONFIG_MACH_TYPE 2663
> -/* CONFIG_SYS_TCLK is 200000000 by default */
> #else
> #error "unknown board"
> #endif
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2021-08-01 8:07 ` Chris Packham
@ 2021-08-01 10:25 ` Pali Rohár
2022-08-16 9:37 ` Michael Walle
0 siblings, 1 reply; 20+ messages in thread
From: Pali Rohár @ 2021-08-01 10:25 UTC (permalink / raw)
To: Chris Packham
Cc: Stefan Roese, Baruch Siach, Dirk Eibach, u-boot,
Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
> >
> > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> > to correct SOC/platform value. So do not overwrite it in board config
> > include files.
> >
> > Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> > 200 MHz TCLK.
> >
>
> It's been a while since I worked with kirkwood but I thought that
> there was hardware strapping for the TCLK.
Interesting... Because I took above information from Kirkwood hardware specifications...
88F6180: https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
88F6192: https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
88F6281: https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
And there are specified fixed TCLK values.
> If I understand correctly
> the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
> boards were able to override it to reflect the hardware configuration.
Anyway, I think that this patch should not cause issue as it is changing
only two board config files and removing redefinition of CONFIG_SYS_TCLK
macro which is set to the same value as in kw88f61**.h files.
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > ---
> > arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> > include/configs/lacie_kw.h | 5 -----
> > include/configs/lsxl.h | 2 --
> > 3 files changed, 9 deletions(-)
> >
> > diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > index 33e741420781..87406081cf54 100644
> > --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > @@ -15,8 +15,6 @@
> > #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
> >
> > /* TCLK Core Clock definition */
> > -#ifndef CONFIG_SYS_TCLK
> > #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> > -#endif
> >
> > #endif /* _ASM_ARCH_KW88F6281_H */
> > diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> > index 420c1d49b08e..88f784f1f0fd 100644
> > --- a/include/configs/lacie_kw.h
> > +++ b/include/configs/lacie_kw.h
> > @@ -39,11 +39,6 @@
> > #endif
> > #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
> >
> > -/*
> > - * Core clock definition
> > - */
> > -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> > -
> > /*
> > * SDRAM configuration
> > */
> > diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> > index 0c0ab2486e23..a4a4739d0dd7 100644
> > --- a/include/configs/lsxl.h
> > +++ b/include/configs/lsxl.h
> > @@ -13,11 +13,9 @@
> > #if defined(CONFIG_LSCHLV2)
> > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> > #define CONFIG_MACH_TYPE 3006
> > -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> > #elif defined(CONFIG_LSXHL)
> > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> > #define CONFIG_MACH_TYPE 2663
> > -/* CONFIG_SYS_TCLK is 200000000 by default */
> > #else
> > #error "unknown board"
> > #endif
> > --
> > 2.20.1
> >
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2021-08-01 10:25 ` Pali Rohár
@ 2022-08-16 9:37 ` Michael Walle
2022-08-16 18:17 ` Pali Rohár
0 siblings, 1 reply; 20+ messages in thread
From: Michael Walle @ 2022-08-16 9:37 UTC (permalink / raw)
To: pali
Cc: baruch, dgilmore, dirk.eibach, jon, judge.packham, marek.behun,
mario.six, sr, u-boot, Michael Walle
Hi!
> On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> > On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
> > >
> > > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> > > to correct SOC/platform value. So do not overwrite it in board config
> > > include files.
> > >
> > > Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> > > 200 MHz TCLK.
> > >
> >
> > It's been a while since I worked with kirkwood but I thought that
> > there was hardware strapping for the TCLK.
>
> Interesting... Because I took above information from Kirkwood hardware specifications...
>
> 88F6180: https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
> 88F6192: https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
> 88F6281: https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
>
> And there are specified fixed TCLK values.
Nope, this breaks my lsxl (specifically the LSCHLv2) board. The TCLK is
166MHz there.
> > If I understand correctly
> > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
> > boards were able to override it to reflect the hardware configuration.
>
> Anyway, I think that this patch should not cause issue as it is changing
> only two board config files and removing redefinition of CONFIG_SYS_TCLK
> macro which is set to the same value as in kw88f61**.h files.
At least for the lsxl and the NET2BIG_V2 this is not correct. Both have
the 88F6281 and both use have a 166MHz TCLK clock.
Anyway, I'm reverting this patch. The only open question is, should I
convert the TCLK to a Kconfig option?
-michael
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > ---
> > arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> > include/configs/lacie_kw.h | 5 -----
> > include/configs/lsxl.h | 2 --
> > 3 files changed, 9 deletions(-)
> >
> > diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > index 33e741420781..87406081cf54 100644
> > --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > @@ -15,8 +15,6 @@
> > #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
> >
> > /* TCLK Core Clock definition */
> > -#ifndef CONFIG_SYS_TCLK
> > #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> > -#endif
> >
> > #endif /* _ASM_ARCH_KW88F6281_H */
> > diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> > index 420c1d49b08e..88f784f1f0fd 100644
> > --- a/include/configs/lacie_kw.h
> > +++ b/include/configs/lacie_kw.h
> > @@ -39,11 +39,6 @@
> > #endif
> > #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
> >
> > -/*
> > - * Core clock definition
> > - */
> > -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> > -
> > /*
> > * SDRAM configuration
> > */
> > diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> > index 0c0ab2486e23..a4a4739d0dd7 100644
> > --- a/include/configs/lsxl.h
> > +++ b/include/configs/lsxl.h
> > @@ -13,11 +13,9 @@
> > #if defined(CONFIG_LSCHLV2)
> > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> > #define CONFIG_MACH_TYPE 3006
> > -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> > #elif defined(CONFIG_LSXHL)
> > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> > #define CONFIG_MACH_TYPE 2663
> > -/* CONFIG_SYS_TCLK is 200000000 by default */
> > #else
> > #error "unknown board"
> > #endif
> > --
> > 2.20.1
> >
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2022-08-16 9:37 ` Michael Walle
@ 2022-08-16 18:17 ` Pali Rohár
2022-08-16 19:38 ` Pali Rohár
2022-08-16 20:05 ` Michael Walle
0 siblings, 2 replies; 20+ messages in thread
From: Pali Rohár @ 2022-08-16 18:17 UTC (permalink / raw)
To: Michael Walle
Cc: baruch, dgilmore, dirk.eibach, jon, judge.packham, marek.behun,
mario.six, sr, u-boot
Hello!
On Tuesday 16 August 2022 11:37:48 Michael Walle wrote:
> Hi!
>
> > On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> > > On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
> > > >
> > > > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> > > > to correct SOC/platform value. So do not overwrite it in board config
> > > > include files.
> > > >
> > > > Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> > > > 200 MHz TCLK.
> > > >
> > >
> > > It's been a while since I worked with kirkwood but I thought that
> > > there was hardware strapping for the TCLK.
> >
> > Interesting... Because I took above information from Kirkwood hardware specifications...
> >
> > 88F6180: https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
> > 88F6192: https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
> > 88F6281: https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
> >
> > And there are specified fixed TCLK values.
>
> Nope, this breaks my lsxl (specifically the LSCHLv2) board. The TCLK is
> 166MHz there.
Ou, sorry for that.
> > > If I understand correctly
> > > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
> > > boards were able to override it to reflect the hardware configuration.
> >
> > Anyway, I think that this patch should not cause issue as it is changing
> > only two board config files and removing redefinition of CONFIG_SYS_TCLK
> > macro which is set to the same value as in kw88f61**.h files.
>
> At least for the lsxl and the NET2BIG_V2 this is not correct. Both have
> the 88F6281 and both use have a 166MHz TCLK clock.
Interesting... because this contradicts publicly available
documentation. Maybe in NDA doc is some more details?
> Anyway, I'm reverting this patch. The only open question is, should I
> convert the TCLK to a Kconfig option?
In this case it would be better to detect TCLK from some SAR register,
like it is already implemented for other Armada SoCs.
Just by a chance, do you have some "better" 88F6281 documentation? If
there is some TCLK information or SAR register description. In publicly
available FS_88F6180_9x_6281_OpenSource.pdf there is 0x10030 Sample at
Reset Register, but nothing TCLK related.
At least BootROM has to detect TCLK because UART clock is derived from
TCLK and BootROM supports UART booting via 115200 baudrate. In case you
can provide me 88F6281 BootROM dump from your board, I can try to find
code which configures UART and detect TCLK. I have already did it for
88F6820 (A385) to verify that U-Boot code detects TCLK in the same way
as BootROM.
> -michael
>
> > > Signed-off-by: Pali Rohár <pali@kernel.org>
> > > ---
> > > arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> > > include/configs/lacie_kw.h | 5 -----
> > > include/configs/lsxl.h | 2 --
> > > 3 files changed, 9 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > index 33e741420781..87406081cf54 100644
> > > --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > @@ -15,8 +15,6 @@
> > > #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
> > >
> > > /* TCLK Core Clock definition */
> > > -#ifndef CONFIG_SYS_TCLK
> > > #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> > > -#endif
> > >
> > > #endif /* _ASM_ARCH_KW88F6281_H */
> > > diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> > > index 420c1d49b08e..88f784f1f0fd 100644
> > > --- a/include/configs/lacie_kw.h
> > > +++ b/include/configs/lacie_kw.h
> > > @@ -39,11 +39,6 @@
> > > #endif
> > > #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
> > >
> > > -/*
> > > - * Core clock definition
> > > - */
> > > -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> > > -
> > > /*
> > > * SDRAM configuration
> > > */
> > > diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> > > index 0c0ab2486e23..a4a4739d0dd7 100644
> > > --- a/include/configs/lsxl.h
> > > +++ b/include/configs/lsxl.h
> > > @@ -13,11 +13,9 @@
> > > #if defined(CONFIG_LSCHLV2)
> > > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> > > #define CONFIG_MACH_TYPE 3006
> > > -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> > > #elif defined(CONFIG_LSXHL)
> > > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> > > #define CONFIG_MACH_TYPE 2663
> > > -/* CONFIG_SYS_TCLK is 200000000 by default */
> > > #else
> > > #error "unknown board"
> > > #endif
> > > --
> > > 2.20.1
> > >
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2022-08-16 18:17 ` Pali Rohár
@ 2022-08-16 19:38 ` Pali Rohár
2022-08-16 20:02 ` Pali Rohár
2022-08-16 20:06 ` Michael Walle
2022-08-16 20:05 ` Michael Walle
1 sibling, 2 replies; 20+ messages in thread
From: Pali Rohár @ 2022-08-16 19:38 UTC (permalink / raw)
To: Michael Walle
Cc: baruch, dgilmore, jon, judge.packham, marek.behun, mario.six, sr, u-boot
On Tuesday 16 August 2022 20:17:08 Pali Rohár wrote:
> Hello!
>
> On Tuesday 16 August 2022 11:37:48 Michael Walle wrote:
> > Hi!
> >
> > > On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
> > > > On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
> > > > >
> > > > > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> > > > > to correct SOC/platform value. So do not overwrite it in board config
> > > > > include files.
> > > > >
> > > > > Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> > > > > 200 MHz TCLK.
> > > > >
> > > >
> > > > It's been a while since I worked with kirkwood but I thought that
> > > > there was hardware strapping for the TCLK.
> > >
> > > Interesting... Because I took above information from Kirkwood hardware specifications...
> > >
> > > 88F6180: https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
> > > 88F6192: https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
> > > 88F6281: https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
> > >
> > > And there are specified fixed TCLK values.
> >
> > Nope, this breaks my lsxl (specifically the LSCHLv2) board. The TCLK is
> > 166MHz there.
>
> Ou, sorry for that.
>
> > > > If I understand correctly
> > > > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
> > > > boards were able to override it to reflect the hardware configuration.
> > >
> > > Anyway, I think that this patch should not cause issue as it is changing
> > > only two board config files and removing redefinition of CONFIG_SYS_TCLK
> > > macro which is set to the same value as in kw88f61**.h files.
> >
> > At least for the lsxl and the NET2BIG_V2 this is not correct. Both have
> > the 88F6281 and both use have a 166MHz TCLK clock.
>
> Interesting... because this contradicts publicly available
> documentation. Maybe in NDA doc is some more details?
>
> > Anyway, I'm reverting this patch. The only open question is, should I
> > convert the TCLK to a Kconfig option?
>
> In this case it would be better to detect TCLK from some SAR register,
> like it is already implemented for other Armada SoCs.
>
> Just by a chance, do you have some "better" 88F6281 documentation? If
> there is some TCLK information or SAR register description. In publicly
> available FS_88F6180_9x_6281_OpenSource.pdf there is 0x10030 Sample at
> Reset Register, but nothing TCLK related.
>
> At least BootROM has to detect TCLK because UART clock is derived from
> TCLK and BootROM supports UART booting via 115200 baudrate. In case you
> can provide me 88F6281 BootROM dump from your board, I can try to find
> code which configures UART and detect TCLK. I have already did it for
> 88F6820 (A385) to verify that U-Boot code detects TCLK in the same way
> as BootROM.
Meanwhile I have found following email thread:
https://lore.kernel.org/linux-arm-kernel/20121020113800.GC21046@lunn.ch/t/#u
Where are more 6281 boards with 166 MHz TCLK and there is interesting output:
$ dmesg | grep -i tclk
[ 5.851008] Kirkwood: MV88F6281-A0, TCLK=200000000
Which means that old kernel version had TCLK detection code. I grepped
git linux history and I successfully found it:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030)
static int __init kirkwood_find_tclk(void)
{
u32 dev, rev;
kirkwood_pcie_id(&dev, &rev);
if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
return 200000000;
return 166666667;
}
So for TCLK detection is used BIT 21 of already mentioned 0x10030 Sample
at Reset Register.
I'm going to prepare a patch which will fix this issue for 88F6281 SoCs.
> > -michael
> >
> > > > Signed-off-by: Pali Rohár <pali@kernel.org>
> > > > ---
> > > > arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> > > > include/configs/lacie_kw.h | 5 -----
> > > > include/configs/lsxl.h | 2 --
> > > > 3 files changed, 9 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > > index 33e741420781..87406081cf54 100644
> > > > --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > > +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> > > > @@ -15,8 +15,6 @@
> > > > #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
> > > >
> > > > /* TCLK Core Clock definition */
> > > > -#ifndef CONFIG_SYS_TCLK
> > > > #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> > > > -#endif
> > > >
> > > > #endif /* _ASM_ARCH_KW88F6281_H */
> > > > diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> > > > index 420c1d49b08e..88f784f1f0fd 100644
> > > > --- a/include/configs/lacie_kw.h
> > > > +++ b/include/configs/lacie_kw.h
> > > > @@ -39,11 +39,6 @@
> > > > #endif
> > > > #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
> > > >
> > > > -/*
> > > > - * Core clock definition
> > > > - */
> > > > -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> > > > -
> > > > /*
> > > > * SDRAM configuration
> > > > */
> > > > diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> > > > index 0c0ab2486e23..a4a4739d0dd7 100644
> > > > --- a/include/configs/lsxl.h
> > > > +++ b/include/configs/lsxl.h
> > > > @@ -13,11 +13,9 @@
> > > > #if defined(CONFIG_LSCHLV2)
> > > > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> > > > #define CONFIG_MACH_TYPE 3006
> > > > -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> > > > #elif defined(CONFIG_LSXHL)
> > > > #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> > > > #define CONFIG_MACH_TYPE 2663
> > > > -/* CONFIG_SYS_TCLK is 200000000 by default */
> > > > #else
> > > > #error "unknown board"
> > > > #endif
> > > > --
> > > > 2.20.1
> > > >
> >
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2022-08-16 19:38 ` Pali Rohár
@ 2022-08-16 20:02 ` Pali Rohár
2022-08-16 20:06 ` Michael Walle
1 sibling, 0 replies; 20+ messages in thread
From: Pali Rohár @ 2022-08-16 20:02 UTC (permalink / raw)
To: Michael Walle
Cc: baruch, dgilmore, jon, judge.packham, marek.behun, mario.six, sr, u-boot
On Tuesday 16 August 2022 21:38:51 Pali Rohár wrote:
> Meanwhile I have found following email thread:
> https://lore.kernel.org/linux-arm-kernel/20121020113800.GC21046@lunn.ch/t/#u
>
> Where are more 6281 boards with 166 MHz TCLK and there is interesting output:
> $ dmesg | grep -i tclk
> [ 5.851008] Kirkwood: MV88F6281-A0, TCLK=200000000
>
> Which means that old kernel version had TCLK detection code. I grepped
> git linux history and I successfully found it:
> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
>
> #define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030)
>
> static int __init kirkwood_find_tclk(void)
> {
> u32 dev, rev;
>
> kirkwood_pcie_id(&dev, &rev);
>
> if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
> if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
> return 200000000;
>
> return 166666667;
> }
>
> So for TCLK detection is used BIT 21 of already mentioned 0x10030 Sample
> at Reset Register.
>
> I'm going to prepare a patch which will fix this issue for 88F6281 SoCs.
Done! Please test it!
https://patchwork.ozlabs.org/project/uboot/patch/20220816200016.18288-1-pali@kernel.org/
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2022-08-16 19:38 ` Pali Rohár
2022-08-16 20:02 ` Pali Rohár
@ 2022-08-16 20:06 ` Michael Walle
1 sibling, 0 replies; 20+ messages in thread
From: Michael Walle @ 2022-08-16 20:06 UTC (permalink / raw)
To: Pali Rohár
Cc: baruch, dgilmore, jon, judge.packham, marek.behun, mario.six, sr, u-boot
Am 2022-08-16 21:38, schrieb Pali Rohár:
> On Tuesday 16 August 2022 20:17:08 Pali Rohár wrote:
>> Hello!
>>
>> On Tuesday 16 August 2022 11:37:48 Michael Walle wrote:
>> > Hi!
>> >
>> > > On Sunday 01 August 2021 20:07:16 Chris Packham wrote:
>> > > > On Sun, Aug 1, 2021 at 12:23 AM Pali Rohár <pali@kernel.org> wrote:
>> > > > >
>> > > > > Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
>> > > > > to correct SOC/platform value. So do not overwrite it in board config
>> > > > > include files.
>> > > > >
>> > > > > Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
>> > > > > 200 MHz TCLK.
>> > > > >
>> > > >
>> > > > It's been a while since I worked with kirkwood but I thought that
>> > > > there was hardware strapping for the TCLK.
>> > >
>> > > Interesting... Because I took above information from Kirkwood hardware specifications...
>> > >
>> > > 88F6180: https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf
>> > > 88F6192: https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf
>> > > 88F6281: https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf
>> > >
>> > > And there are specified fixed TCLK values.
>> >
>> > Nope, this breaks my lsxl (specifically the LSCHLv2) board. The TCLK is
>> > 166MHz there.
>>
>> Ou, sorry for that.
>>
>> > > > If I understand correctly
>> > > > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
>> > > > boards were able to override it to reflect the hardware configuration.
>> > >
>> > > Anyway, I think that this patch should not cause issue as it is changing
>> > > only two board config files and removing redefinition of CONFIG_SYS_TCLK
>> > > macro which is set to the same value as in kw88f61**.h files.
>> >
>> > At least for the lsxl and the NET2BIG_V2 this is not correct. Both have
>> > the 88F6281 and both use have a 166MHz TCLK clock.
>>
>> Interesting... because this contradicts publicly available
>> documentation. Maybe in NDA doc is some more details?
>>
>> > Anyway, I'm reverting this patch. The only open question is, should I
>> > convert the TCLK to a Kconfig option?
>>
>> In this case it would be better to detect TCLK from some SAR register,
>> like it is already implemented for other Armada SoCs.
>>
>> Just by a chance, do you have some "better" 88F6281 documentation? If
>> there is some TCLK information or SAR register description. In
>> publicly
>> available FS_88F6180_9x_6281_OpenSource.pdf there is 0x10030 Sample at
>> Reset Register, but nothing TCLK related.
>>
>> At least BootROM has to detect TCLK because UART clock is derived from
>> TCLK and BootROM supports UART booting via 115200 baudrate. In case
>> you
>> can provide me 88F6281 BootROM dump from your board, I can try to find
>> code which configures UART and detect TCLK. I have already did it for
>> 88F6820 (A385) to verify that U-Boot code detects TCLK in the same way
>> as BootROM.
>
> Meanwhile I have found following email thread:
> https://lore.kernel.org/linux-arm-kernel/20121020113800.GC21046@lunn.ch/t/#u
>
> Where are more 6281 boards with 166 MHz TCLK and there is interesting
> output:
> $ dmesg | grep -i tclk
> [ 5.851008] Kirkwood: MV88F6281-A0, TCLK=200000000
>
> Which means that old kernel version had TCLK detection code. I grepped
> git linux history and I successfully found it:
> https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542
>
> #define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE + 0x0030)
>
> static int __init kirkwood_find_tclk(void)
> {
> u32 dev, rev;
>
> kirkwood_pcie_id(&dev, &rev);
>
> if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
> if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
> return 200000000;
>
> return 166666667;
> }
>
> So for TCLK detection is used BIT 21 of already mentioned 0x10030
> Sample
> at Reset Register.
Seems like you beat me, while I was typing my former mail ;)
-michael
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2022-08-16 18:17 ` Pali Rohár
2022-08-16 19:38 ` Pali Rohár
@ 2022-08-16 20:05 ` Michael Walle
1 sibling, 0 replies; 20+ messages in thread
From: Michael Walle @ 2022-08-16 20:05 UTC (permalink / raw)
To: Pali Rohár
Cc: baruch, dgilmore, dirk.eibach, jon, judge.packham, marek.behun,
mario.six, sr, u-boot
Am 2022-08-16 20:17, schrieb Pali Rohár:
>> > > If I understand correctly
>> > > the defines in kw88f6281.h/kw88f6192.h were sensible defaults but
>> > > boards were able to override it to reflect the hardware configuration.
>> >
>> > Anyway, I think that this patch should not cause issue as it is changing
>> > only two board config files and removing redefinition of CONFIG_SYS_TCLK
>> > macro which is set to the same value as in kw88f61**.h files.
>>
>> At least for the lsxl and the NET2BIG_V2 this is not correct. Both
>> have
>> the 88F6281 and both use have a 166MHz TCLK clock.
>
> Interesting... because this contradicts publicly available
> documentation. Maybe in NDA doc is some more details?
No, the board support was entirely done by reverse engineering the
original bootloader, back in 2012..
>> Anyway, I'm reverting this patch. The only open question is, should I
>> convert the TCLK to a Kconfig option?
>
> In this case it would be better to detect TCLK from some SAR register,
> like it is already implemented for other Armada SoCs.
Maybe a bit of a background: The LS-XHL and the LS-CHLv2 share the same
PCB, labeled LSXL (thus the board name). the LS-CHLv2 being the
low-budget
version, i.e. only 64MiB of memory and a slower CPU clock. The LS-XHL
has 256MiB memory.
I have both boards and I've dumped the SAR:
On the LS-XHL (TCLK 200MHz):
# busybox devmem 0xf1010030 32
0x0093CE96
On the LS-CHLv2 (TCLK 166MHz):
# busybox devmem 0xf1010030 32
0x00B2CA4C
> md f1040000 1
f1040000: 628111ab
> Just by a chance, do you have some "better" 88F6281 documentation? If
> there is some TCLK information or SAR register description. In publicly
> available FS_88F6180_9x_6281_OpenSource.pdf there is 0x10030 Sample at
> Reset Register, but nothing TCLK related.
This made me look closer, and linux is reporting:
[ 0.000017] sched_clock: 32 bits at 200MHz, resolution 5ns, wraps
every 21474836475ns
and on the other board:
[ 0.000015] sched_clock: 32 bits at 166MHz, resolution 6ns, wraps
every 12884901885ns
I've digged into it and the kirkwood-core-clock has more information:
https://elixir.bootlin.com/linux/v5.19.1/source/drivers/clk/mvebu/kirkwood.c#L59
I'll take a look at how this could then be determined at runtime.
> At least BootROM has to detect TCLK because UART clock is derived from
> TCLK and BootROM supports UART booting via 115200 baudrate. In case you
> can provide me 88F6281 BootROM dump from your board, I can try to find
> code which configures UART and detect TCLK. I have already did it for
> 88F6820 (A385) to verify that U-Boot code detects TCLK in the same way
> as BootROM.
If you still need the bootrom and it is readable in u-boot, I can
provide
you the dump.
-michael
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
2021-08-01 8:07 ` Chris Packham
@ 2021-08-02 6:35 ` Stefan Roese
1 sibling, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-02 6:35 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> Config option CONFIG_SYS_TCLK is set by kw88f6281.h and kw88f6192.h files
> to correct SOC/platform value. So do not overwrite it in board config
> include files.
>
> Kirkwood 88F6180 and 88F6192 uses 166 MHz TCLK and Kirkwood 88F6281 uses
> 200 MHz TCLK.
>
> Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> include/configs/lacie_kw.h | 5 -----
> include/configs/lsxl.h | 2 --
> 3 files changed, 9 deletions(-)
>
> diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> index 33e741420781..87406081cf54 100644
> --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h
> @@ -15,8 +15,6 @@
> #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
>
> /* TCLK Core Clock definition */
> -#ifndef CONFIG_SYS_TCLK
> #define CONFIG_SYS_TCLK 200000000 /* 200MHz */
> -#endif
>
> #endif /* _ASM_ARCH_KW88F6281_H */
> diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
> index 420c1d49b08e..88f784f1f0fd 100644
> --- a/include/configs/lacie_kw.h
> +++ b/include/configs/lacie_kw.h
> @@ -39,11 +39,6 @@
> #endif
> #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
>
> -/*
> - * Core clock definition
> - */
> -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
> -
> /*
> * SDRAM configuration
> */
> diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
> index 0c0ab2486e23..a4a4739d0dd7 100644
> --- a/include/configs/lsxl.h
> +++ b/include/configs/lsxl.h
> @@ -13,11 +13,9 @@
> #if defined(CONFIG_LSCHLV2)
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
> #define CONFIG_MACH_TYPE 3006
> -#define CONFIG_SYS_TCLK 166666667 /* 166 MHz */
> #elif defined(CONFIG_LSXHL)
> #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
> #define CONFIG_MACH_TYPE 2663
> -/* CONFIG_SYS_TCLK is 200000000 by default */
> #else
> #error "unknown board"
> #endif
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK
2021-07-31 12:22 [PATCH 0/5] arm: mvebu: Automatically detect CONFIG_SYS_TCLK Pali Rohár
` (4 preceding siblings ...)
2021-07-31 12:22 ` [PATCH 5/5] arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK Pali Rohár
@ 2021-08-11 8:27 ` Stefan Roese
5 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-11 8:27 UTC (permalink / raw)
To: Pali Rohár, Chris Packham, Baruch Siach, Dirk Eibach, u-boot
Cc: Marek Behún, Dennis Gilmore, Mario Six, Jon Nettleton
On 31.07.21 14:22, Pali Rohár wrote:
> This patch series automatically detects CONFIG_SYS_TCLK value, set it in
> global mach/soc.h file and remove manual CONFIG_SYS_TCLK value from all
> mvebu/kirkwood board config files.
>
> So it just a cleanup to avoid defining custom macros in board config
> files which can be automatically detected.
>
> Could you test these patches on a38x and a37x platforms that nothing is
> broken? I tested them on a38x Turris Omnia.
>
> Pali Rohár (5):
> arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register
> arm: mvebu: a37x: Detect CONFIG_SYS_TCLK from SAR register
> arm: mvebu: msys: Set CONFIG_SYS_TCLK globally
> arm: mvebu: axp: Set CONFIG_SYS_TCLK globally
> arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK
Applied to u-boot-marvell/master
Thanks,
Stefan
> arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 --
> arch/arm/mach-mvebu/include/mach/soc.h | 15 ++++++++++-----
> include/configs/clearfog.h | 1 -
> include/configs/controlcenterdc.h | 2 --
> include/configs/crs3xx-98dx3236.h | 1 -
> include/configs/db-88f6720.h | 1 -
> include/configs/db-88f6820-amc.h | 2 --
> include/configs/db-88f6820-gp.h | 2 --
> include/configs/db-mv784mp-gp.h | 1 -
> include/configs/db-xc3-24g4xg.h | 1 -
> include/configs/ds414.h | 1 -
> include/configs/helios4.h | 1 -
> include/configs/lacie_kw.h | 5 -----
> include/configs/lsxl.h | 2 --
> include/configs/maxbcm.h | 1 -
> include/configs/theadorable.h | 1 -
> include/configs/turris_omnia.h | 1 -
> include/configs/x530.h | 2 --
> 18 files changed, 10 insertions(+), 32 deletions(-)
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread