From: Conor Dooley <conor.dooley@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>, <palmer@rivosinc.com>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>, <krzk+dt@kernel.org> Cc: <daire.mcnamara@microchip.com>, <linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-riscv@lists.infradead.org>, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH v3 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Date: Wed, 13 Apr 2022 08:58:29 +0100 [thread overview] Message-ID: <20220413075835.3354193-3-conor.dooley@microchip.com> (raw) In-Reply-To: <20220413075835.3354193-1-conor.dooley@microchip.com> CLK_ATHENA is another fabric interconnect and should be marked as critical as with FIC0-3, since disabling it will cause part of the fabric to go into reset. Fixes: 635e5e73370e ("clk: microchip: Add driver for Microchip PolarFire SoC") Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- drivers/clk/microchip/clk-mpfs.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c index 7485a5eeb5c0..a361b8743a32 100644 --- a/drivers/clk/microchip/clk-mpfs.c +++ b/drivers/clk/microchip/clk-mpfs.c @@ -249,8 +249,10 @@ static const struct clk_ops mpfs_periph_clk_ops = { * trap handler * - CLK_MMUART0: reserved by the hss * - CLK_DDRC: provides clock to the ddr subsystem - * - CLK_FICx: these provide clocks for sections of the fpga fabric, disabling them would - * cause the fabric to go into reset + * - CLK_FICx: these provide the processor side clocks to the "FIC" (Fabric InterConnect) + * clock domain crossers which provide the interface to the FPGA fabric. Disabling them + * causes the FPGA fabric to go into reset. + * - CLK_ATHENA: The athena clock is FIC4, which is reserved for the Athena TeraFire. */ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { @@ -281,7 +283,7 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AXI), 25, CLK_IS_CRITICAL), CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AXI), 26, CLK_IS_CRITICAL), CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AXI), 27, CLK_IS_CRITICAL), - CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, 0), + CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, CLK_IS_CRITICAL), CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0), }; -- 2.35.1
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com> To: <mturquette@baylibre.com>, <sboyd@kernel.org>, <aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>, <palmer@rivosinc.com>, <a.zummo@towertech.it>, <alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>, <krzk+dt@kernel.org> Cc: <daire.mcnamara@microchip.com>, <linux-rtc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-riscv@lists.infradead.org>, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH v3 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Date: Wed, 13 Apr 2022 08:58:29 +0100 [thread overview] Message-ID: <20220413075835.3354193-3-conor.dooley@microchip.com> (raw) In-Reply-To: <20220413075835.3354193-1-conor.dooley@microchip.com> CLK_ATHENA is another fabric interconnect and should be marked as critical as with FIC0-3, since disabling it will cause part of the fabric to go into reset. Fixes: 635e5e73370e ("clk: microchip: Add driver for Microchip PolarFire SoC") Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- drivers/clk/microchip/clk-mpfs.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c index 7485a5eeb5c0..a361b8743a32 100644 --- a/drivers/clk/microchip/clk-mpfs.c +++ b/drivers/clk/microchip/clk-mpfs.c @@ -249,8 +249,10 @@ static const struct clk_ops mpfs_periph_clk_ops = { * trap handler * - CLK_MMUART0: reserved by the hss * - CLK_DDRC: provides clock to the ddr subsystem - * - CLK_FICx: these provide clocks for sections of the fpga fabric, disabling them would - * cause the fabric to go into reset + * - CLK_FICx: these provide the processor side clocks to the "FIC" (Fabric InterConnect) + * clock domain crossers which provide the interface to the FPGA fabric. Disabling them + * causes the FPGA fabric to go into reset. + * - CLK_ATHENA: The athena clock is FIC4, which is reserved for the Athena TeraFire. */ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { @@ -281,7 +283,7 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = { CLK_PERIPH(CLK_FIC1, "clk_periph_fic1", PARENT_CLK(AXI), 25, CLK_IS_CRITICAL), CLK_PERIPH(CLK_FIC2, "clk_periph_fic2", PARENT_CLK(AXI), 26, CLK_IS_CRITICAL), CLK_PERIPH(CLK_FIC3, "clk_periph_fic3", PARENT_CLK(AXI), 27, CLK_IS_CRITICAL), - CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, 0), + CLK_PERIPH(CLK_ATHENA, "clk_periph_athena", PARENT_CLK(AXI), 28, CLK_IS_CRITICAL), CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0), }; -- 2.35.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-04-13 8:02 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-13 7:58 [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-13 7:58 ` [PATCH v3 1/9] clk: microchip: mpfs: fix parents for FIC clocks Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 17:58 ` Conor Dooley 2022-04-23 17:58 ` Conor Dooley 2022-04-13 7:58 ` Conor Dooley [this message] 2022-04-13 7:58 ` [PATCH v3 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 4/9] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 5/9] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-19 11:59 ` Krzysztof Kozlowski 2022-04-19 11:59 ` Krzysztof Kozlowski 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 6/9] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 7/9] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:41 ` Stephen Boyd 2022-04-23 1:41 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 8/9] clk: microchip: mpfs: add RTCREF clock control Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:42 ` Stephen Boyd 2022-04-23 1:42 ` Stephen Boyd 2022-04-13 7:58 ` [PATCH v3 9/9] riscv: dts: microchip: reparent mpfs clocks Conor Dooley 2022-04-13 7:58 ` Conor Dooley 2022-04-23 1:42 ` Stephen Boyd 2022-04-23 1:42 ` Stephen Boyd 2022-04-22 19:39 ` [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Palmer Dabbelt 2022-04-22 19:39 ` Palmer Dabbelt 2022-04-22 19:59 ` Conor Dooley 2022-04-22 19:59 ` Conor Dooley 2022-04-22 21:00 ` Stephen Boyd 2022-04-22 21:00 ` Stephen Boyd 2022-04-22 21:10 ` Conor Dooley 2022-04-22 21:10 ` Conor Dooley 2022-04-22 21:40 ` Palmer Dabbelt 2022-04-22 21:40 ` Palmer Dabbelt 2022-04-22 21:52 ` Rob Herring 2022-04-22 21:52 ` Rob Herring 2022-04-22 22:32 ` Conor Dooley 2022-04-22 22:32 ` Conor Dooley
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