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From: Conor Dooley <conor.dooley@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>,
	<palmer@rivosinc.com>, <a.zummo@towertech.it>,
	<alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>,
	<krzk+dt@kernel.org>
Cc: <daire.mcnamara@microchip.com>, <linux-rtc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v3 6/9] dt-bindings: rtc: add refclk to mpfs-rtc
Date: Wed, 13 Apr 2022 08:58:33 +0100	[thread overview]
Message-ID: <20220413075835.3354193-7-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220413075835.3354193-1-conor.dooley@microchip.com>

The rtc on PolarFire SoC does not use the AHB clock as its reference
frequency, but rather a 1 MHz refclk that it shares with MTIMER. Add
this second clock to the binding as a required property.

Fixes: 4cbcc0d7b397 ("dt-bindings: rtc: add bindings for microchip mpfs rtc")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/rtc/microchip,mfps-rtc.yaml          | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
index a2e984ea3553..500c62becd6b 100644
--- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
@@ -31,11 +31,19 @@ properties:
           to that of the RTC's count register.
 
   clocks:
-    maxItems: 1
+    items:
+      - description: |
+          AHB clock
+      - description: |
+          Reference clock: divided by the prescaler to create a time-based
+          strobe (typically 1 Hz) for the calendar counter. By default, the rtc
+          on the PolarFire SoC shares it's reference with MTIMER so this will
+          be a 1 MHz clock.
 
   clock-names:
     items:
       - const: rtc
+      - const: rtcref
 
 required:
   - compatible
@@ -48,11 +56,12 @@ additionalProperties: false
 
 examples:
   - |
+    #include "dt-bindings/clock/microchip,mpfs-clock.h"
     rtc@20124000 {
         compatible = "microchip,mpfs-rtc";
         reg = <0x20124000 0x1000>;
-        clocks = <&clkcfg 21>;
-        clock-names = "rtc";
+        clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
+        clock-names = "rtc", "rtcref";
         interrupts = <80>, <81>;
     };
 ...
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<aou@eecs.berkeley.edu>, <paul.walmsley@sifive.com>,
	<palmer@rivosinc.com>, <a.zummo@towertech.it>,
	<alexandre.belloni@bootlin.com>, <robh+dt@kernel.org>,
	<krzk+dt@kernel.org>
Cc: <daire.mcnamara@microchip.com>, <linux-rtc@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Conor Dooley <conor.dooley@microchip.com>,
	 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: [PATCH v3 6/9] dt-bindings: rtc: add refclk to mpfs-rtc
Date: Wed, 13 Apr 2022 08:58:33 +0100	[thread overview]
Message-ID: <20220413075835.3354193-7-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220413075835.3354193-1-conor.dooley@microchip.com>

The rtc on PolarFire SoC does not use the AHB clock as its reference
frequency, but rather a 1 MHz refclk that it shares with MTIMER. Add
this second clock to the binding as a required property.

Fixes: 4cbcc0d7b397 ("dt-bindings: rtc: add bindings for microchip mpfs rtc")
Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/rtc/microchip,mfps-rtc.yaml          | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
index a2e984ea3553..500c62becd6b 100644
--- a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
+++ b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
@@ -31,11 +31,19 @@ properties:
           to that of the RTC's count register.
 
   clocks:
-    maxItems: 1
+    items:
+      - description: |
+          AHB clock
+      - description: |
+          Reference clock: divided by the prescaler to create a time-based
+          strobe (typically 1 Hz) for the calendar counter. By default, the rtc
+          on the PolarFire SoC shares it's reference with MTIMER so this will
+          be a 1 MHz clock.
 
   clock-names:
     items:
       - const: rtc
+      - const: rtcref
 
 required:
   - compatible
@@ -48,11 +56,12 @@ additionalProperties: false
 
 examples:
   - |
+    #include "dt-bindings/clock/microchip,mpfs-clock.h"
     rtc@20124000 {
         compatible = "microchip,mpfs-rtc";
         reg = <0x20124000 0x1000>;
-        clocks = <&clkcfg 21>;
-        clock-names = "rtc";
+        clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;
+        clock-names = "rtc", "rtcref";
         interrupts = <80>, <81>;
     };
 ...
-- 
2.35.1


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  parent reply	other threads:[~2022-04-13  8:02 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-13  7:58 [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Conor Dooley
2022-04-13  7:58 ` Conor Dooley
2022-04-13  7:58 ` [PATCH v3 1/9] clk: microchip: mpfs: fix parents for FIC clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-23 17:58     ` Conor Dooley
2022-04-23 17:58       ` Conor Dooley
2022-04-13  7:58 ` [PATCH v3 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 4/9] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 5/9] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-19 11:59   ` Krzysztof Kozlowski
2022-04-19 11:59     ` Krzysztof Kozlowski
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` Conor Dooley [this message]
2022-04-13  7:58   ` [PATCH v3 6/9] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 7/9] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 8/9] clk: microchip: mpfs: add RTCREF clock control Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:42   ` Stephen Boyd
2022-04-23  1:42     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 9/9] riscv: dts: microchip: reparent mpfs clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:42   ` Stephen Boyd
2022-04-23  1:42     ` Stephen Boyd
2022-04-22 19:39 ` [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Palmer Dabbelt
2022-04-22 19:39   ` Palmer Dabbelt
2022-04-22 19:59   ` Conor Dooley
2022-04-22 19:59     ` Conor Dooley
2022-04-22 21:00     ` Stephen Boyd
2022-04-22 21:00       ` Stephen Boyd
2022-04-22 21:10       ` Conor Dooley
2022-04-22 21:10         ` Conor Dooley
2022-04-22 21:40         ` Palmer Dabbelt
2022-04-22 21:40           ` Palmer Dabbelt
2022-04-22 21:52     ` Rob Herring
2022-04-22 21:52       ` Rob Herring
2022-04-22 22:32       ` Conor Dooley
2022-04-22 22:32         ` Conor Dooley

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