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From: Stephen Boyd <sboyd@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>,
	a.zummo@towertech.it, alexandre.belloni@bootlin.com,
	aou@eecs.berkeley.edu, krzk+dt@kernel.org,
	mturquette@baylibre.com, palmer@rivosinc.com,
	paul.walmsley@sifive.com, robh+dt@kernel.org
Cc: daire.mcnamara@microchip.com, linux-rtc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs
Date: Fri, 22 Apr 2022 18:41:18 -0700	[thread overview]
Message-ID: <20220423014120.272F8C385A4@smtp.kernel.org> (raw)
In-Reply-To: <20220413075835.3354193-4-conor.dooley@microchip.com>

Quoting Conor Dooley (2022-04-13 00:58:30)
> The fic clocks passed to the pcie controller and other peripherals in
> the device tree are not the clocks they actually run on. The fics are
> actually clock domain crossers & the clock config blocks output is the
> mss/cpu side input to the interconnect. The peripherals are actually
> clocked by fixed frequency clocks embedded in the fpga fabric.
> 
> Fix the device tree so that these peripherals use the correct clocks.
> The fabric side FIC0 & FIC1 inputs both use the same 125 MHz, so only
> one clock is created for them.
> 
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---

Applied to clk-fixes

WARNING: multiple messages have this Message-ID
From: Stephen Boyd <sboyd@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>,
	a.zummo@towertech.it, alexandre.belloni@bootlin.com,
	aou@eecs.berkeley.edu, krzk+dt@kernel.org,
	mturquette@baylibre.com, palmer@rivosinc.com,
	paul.walmsley@sifive.com, robh+dt@kernel.org
Cc: daire.mcnamara@microchip.com, linux-rtc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs
Date: Fri, 22 Apr 2022 18:41:18 -0700	[thread overview]
Message-ID: <20220423014120.272F8C385A4@smtp.kernel.org> (raw)
In-Reply-To: <20220413075835.3354193-4-conor.dooley@microchip.com>

Quoting Conor Dooley (2022-04-13 00:58:30)
> The fic clocks passed to the pcie controller and other peripherals in
> the device tree are not the clocks they actually run on. The fics are
> actually clock domain crossers & the clock config blocks output is the
> mss/cpu side input to the interconnect. The peripherals are actually
> clocked by fixed frequency clocks embedded in the fpga fabric.
> 
> Fix the device tree so that these peripherals use the correct clocks.
> The fabric side FIC0 & FIC1 inputs both use the same 125 MHz, so only
> one clock is created for them.
> 
> Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree")
> Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---

Applied to clk-fixes

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  reply	other threads:[~2022-04-23  1:41 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-13  7:58 [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Conor Dooley
2022-04-13  7:58 ` Conor Dooley
2022-04-13  7:58 ` [PATCH v3 1/9] clk: microchip: mpfs: fix parents for FIC clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-23 17:58     ` Conor Dooley
2022-04-23 17:58       ` Conor Dooley
2022-04-13  7:58 ` [PATCH v3 2/9] clk: microchip: mpfs: mark CLK_ATHENA as critical Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 3/9] riscv: dts: microchip: fix usage of fic clocks on mpfs Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd [this message]
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 4/9] dt-bindings: clk: mpfs document msspll dri registers Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 5/9] dt-bindings: clk: mpfs: add defines for two new clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-19 11:59   ` Krzysztof Kozlowski
2022-04-19 11:59     ` Krzysztof Kozlowski
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 6/9] dt-bindings: rtc: add refclk to mpfs-rtc Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 7/9] clk: microchip: mpfs: re-parent the configurable clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:41   ` Stephen Boyd
2022-04-23  1:41     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 8/9] clk: microchip: mpfs: add RTCREF clock control Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:42   ` Stephen Boyd
2022-04-23  1:42     ` Stephen Boyd
2022-04-13  7:58 ` [PATCH v3 9/9] riscv: dts: microchip: reparent mpfs clocks Conor Dooley
2022-04-13  7:58   ` Conor Dooley
2022-04-23  1:42   ` Stephen Boyd
2022-04-23  1:42     ` Stephen Boyd
2022-04-22 19:39 ` [PATCH v3 0/9] More PolarFire SoC Fixes for 5.18 Palmer Dabbelt
2022-04-22 19:39   ` Palmer Dabbelt
2022-04-22 19:59   ` Conor Dooley
2022-04-22 19:59     ` Conor Dooley
2022-04-22 21:00     ` Stephen Boyd
2022-04-22 21:00       ` Stephen Boyd
2022-04-22 21:10       ` Conor Dooley
2022-04-22 21:10         ` Conor Dooley
2022-04-22 21:40         ` Palmer Dabbelt
2022-04-22 21:40           ` Palmer Dabbelt
2022-04-22 21:52     ` Rob Herring
2022-04-22 21:52       ` Rob Herring
2022-04-22 22:32       ` Conor Dooley
2022-04-22 22:32         ` Conor Dooley

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