From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Anup Patel <anup@brainfault.org>, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH 5/6] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Date: Tue, 26 Jul 2022 19:06:22 +0100 [thread overview] Message-ID: <20220726180623.1668-6-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) In-Reply-To: <20220726180623.1668-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most of the Renesas drivers depend on this config option. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- arch/riscv/Kconfig.socs | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..91b7f38b77a8 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE endif # SOC_CANAAN +config ARCH_RENESAS + bool + select GPIOLIB + select PINCTRL + select SOC_BUS + +config SOC_RENESAS_RZFIVE + bool "Renesas RZ/Five SoC" + select ARCH_R9A07G043 + select ARCH_RENESAS + select RESET_CONTROLLER + help + This enables support for Renesas RZ/Five SoC. + endmenu # "SoC selection" -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: Geert Uytterhoeven <geert+renesas@glider.be>, Magnus Damm <magnus.damm@gmail.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: Anup Patel <anup@brainfault.org>, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Subject: [PATCH 5/6] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Date: Tue, 26 Jul 2022 19:06:22 +0100 [thread overview] Message-ID: <20220726180623.1668-6-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw) In-Reply-To: <20220726180623.1668-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most of the Renesas drivers depend on this config option. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- arch/riscv/Kconfig.socs | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..91b7f38b77a8 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE endif # SOC_CANAAN +config ARCH_RENESAS + bool + select GPIOLIB + select PINCTRL + select SOC_BUS + +config SOC_RENESAS_RZFIVE + bool "Renesas RZ/Five SoC" + select ARCH_R9A07G043 + select ARCH_RENESAS + select RESET_CONTROLLER + help + This enables support for Renesas RZ/Five SoC. + endmenu # "SoC selection" -- 2.17.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-07-26 18:07 UTC|newest] Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-26 18:06 [PATCH 0/6] Add support for Renesas RZ/Five SoC Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-26 18:06 ` [PATCH 1/6] dt-bindings: arm: renesas: Ignore the schema for RISC-V arch Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-27 8:50 ` Krzysztof Kozlowski 2022-07-27 8:50 ` Krzysztof Kozlowski 2022-07-27 8:55 ` Lad, Prabhakar 2022-07-27 8:55 ` Lad, Prabhakar 2022-07-27 8:53 ` Krzysztof Kozlowski 2022-07-27 8:53 ` Krzysztof Kozlowski 2022-07-27 9:00 ` Lad, Prabhakar 2022-07-27 9:00 ` Lad, Prabhakar 2022-07-27 9:31 ` Krzysztof Kozlowski 2022-07-27 9:31 ` Krzysztof Kozlowski 2022-07-27 9:48 ` Lad, Prabhakar 2022-07-27 9:48 ` Lad, Prabhakar 2022-08-11 15:26 ` Geert Uytterhoeven 2022-08-11 15:26 ` Geert Uytterhoeven 2022-08-11 23:37 ` Lad, Prabhakar 2022-08-11 23:37 ` Lad, Prabhakar 2022-07-27 15:43 ` Rob Herring 2022-07-27 15:43 ` Rob Herring 2022-07-26 18:06 ` [PATCH 2/6] dt-bindings: riscv: Sort the CPU core list alphabetically Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-27 8:51 ` Krzysztof Kozlowski 2022-07-27 8:51 ` Krzysztof Kozlowski 2022-07-26 18:06 ` [PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-27 8:51 ` Krzysztof Kozlowski 2022-07-27 8:51 ` Krzysztof Kozlowski 2022-07-26 18:06 ` [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-27 8:54 ` Krzysztof Kozlowski 2022-07-27 8:54 ` Krzysztof Kozlowski 2022-07-27 9:05 ` Lad, Prabhakar 2022-07-27 9:05 ` Lad, Prabhakar 2022-07-27 9:27 ` Biju Das 2022-07-27 9:27 ` Biju Das 2022-07-27 9:35 ` Lad, Prabhakar 2022-07-27 9:35 ` Lad, Prabhakar 2022-07-27 9:54 ` Krzysztof Kozlowski 2022-07-27 9:54 ` Krzysztof Kozlowski 2022-07-27 10:06 ` Lad, Prabhakar 2022-07-27 10:06 ` Lad, Prabhakar 2022-07-27 10:09 ` Krzysztof Kozlowski 2022-07-27 10:09 ` Krzysztof Kozlowski 2022-07-27 11:37 ` Lad, Prabhakar 2022-07-27 11:37 ` Lad, Prabhakar 2022-07-27 11:44 ` Krzysztof Kozlowski 2022-07-27 11:44 ` Krzysztof Kozlowski 2022-07-27 12:21 ` Biju Das 2022-07-27 12:21 ` Biju Das 2022-07-27 12:36 ` Krzysztof Kozlowski 2022-07-27 12:36 ` Krzysztof Kozlowski 2022-07-27 12:56 ` Biju Das 2022-07-27 12:56 ` Biju Das 2022-07-27 13:00 ` Krzysztof Kozlowski 2022-07-27 13:00 ` Krzysztof Kozlowski 2022-07-27 13:29 ` Conor.Dooley 2022-07-27 13:29 ` Conor.Dooley 2022-07-27 15:32 ` Lad, Prabhakar 2022-07-27 15:32 ` Lad, Prabhakar 2022-08-11 15:42 ` Geert Uytterhoeven 2022-08-11 15:42 ` Geert Uytterhoeven 2022-08-12 6:23 ` Krzysztof Kozlowski 2022-08-12 6:23 ` Krzysztof Kozlowski 2022-08-12 9:49 ` Lad, Prabhakar 2022-08-12 9:49 ` Lad, Prabhakar 2022-08-12 15:10 ` Palmer Dabbelt 2022-08-12 15:10 ` Palmer Dabbelt 2022-07-26 18:06 ` Lad Prabhakar [this message] 2022-07-26 18:06 ` [PATCH 5/6] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option Lad Prabhakar 2022-07-26 18:49 ` Conor.Dooley 2022-07-26 18:49 ` Conor.Dooley 2022-07-27 8:19 ` Lad, Prabhakar 2022-07-27 8:19 ` Lad, Prabhakar 2022-07-26 18:06 ` [PATCH 6/6] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC Lad Prabhakar 2022-07-26 18:06 ` Lad Prabhakar 2022-07-26 18:25 ` Conor.Dooley 2022-07-26 18:25 ` Conor.Dooley 2022-07-26 18:53 ` Conor.Dooley 2022-07-26 18:53 ` Conor.Dooley 2022-07-27 8:09 ` Lad, Prabhakar 2022-07-27 8:09 ` Lad, Prabhakar 2022-07-27 8:21 ` Conor.Dooley 2022-07-27 8:21 ` Conor.Dooley 2022-07-27 8:30 ` Lad, Prabhakar 2022-07-27 8:30 ` Lad, Prabhakar 2022-07-27 8:55 ` Krzysztof Kozlowski 2022-07-27 8:55 ` Krzysztof Kozlowski 2022-07-27 9:08 ` Lad, Prabhakar 2022-07-27 9:08 ` Lad, Prabhakar 2022-07-26 18:51 ` [PATCH 0/6] Add support " Conor.Dooley 2022-07-26 18:51 ` Conor.Dooley 2022-07-27 8:00 ` Lad, Prabhakar 2022-07-27 8:00 ` Lad, Prabhakar
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220726180623.1668-6-prabhakar.mahadev-lad.rj@bp.renesas.com \ --to=prabhakar.mahadev-lad.rj@bp.renesas.com \ --cc=anup@brainfault.org \ --cc=aou@eecs.berkeley.edu \ --cc=biju.das.jz@bp.renesas.com \ --cc=devicetree@vger.kernel.org \ --cc=geert+renesas@glider.be \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-renesas-soc@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=magnus.damm@gmail.com \ --cc=palmer@dabbelt.com \ --cc=paul.walmsley@sifive.com \ --cc=prabhakar.csengg@gmail.com \ --cc=robh+dt@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.