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From: <daire.mcnamara@microchip.com>
To: <conor.dooley@microchip.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<lpieralisi@kernel.org>, <kw@linux.com>, <bhelgaas@google.com>,
	<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	<linux-pci@vger.kernel.org>
Cc: Daire McNamara <daire.mcnamara@microchip.com>
Subject: [PATCH v1 2/9] PCI: microchip: Correct the DED and SEC interrupt bit offsets
Date: Wed, 16 Nov 2022 13:54:57 +0000	[thread overview]
Message-ID: <20221116135504.258687-3-daire.mcnamara@microchip.com> (raw)
In-Reply-To: <20221116135504.258687-1-daire.mcnamara@microchip.com>

From: Daire McNamara <daire.mcnamara@microchip.com>

The SEC and DED interrupt bits were the wrong way round so the SEC
interrupt handler attempted to mask, unmask, and clear the DED interrupt
and vice versa. Correct the bit offsets so each interrupt handler
operates properly.

Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/pci/controller/pcie-microchip-host.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pcie-microchip-host.c b/drivers/pci/controller/pcie-microchip-host.c
index 80e7554722ca..30153fd1a2b3 100644
--- a/drivers/pci/controller/pcie-microchip-host.c
+++ b/drivers/pci/controller/pcie-microchip-host.c
@@ -165,12 +165,12 @@
 #define EVENT_PCIE_DLUP_EXIT			2
 #define EVENT_SEC_TX_RAM_SEC_ERR		3
 #define EVENT_SEC_RX_RAM_SEC_ERR		4
-#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR		5
-#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR		6
+#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR		5
+#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR		6
 #define EVENT_DED_TX_RAM_DED_ERR		7
 #define EVENT_DED_RX_RAM_DED_ERR		8
-#define EVENT_DED_AXI2PCIE_RAM_DED_ERR		9
-#define EVENT_DED_PCIE2AXI_RAM_DED_ERR		10
+#define EVENT_DED_PCIE2AXI_RAM_DED_ERR		9
+#define EVENT_DED_AXI2PCIE_RAM_DED_ERR		10
 #define EVENT_LOCAL_DMA_END_ENGINE_0		11
 #define EVENT_LOCAL_DMA_END_ENGINE_1		12
 #define EVENT_LOCAL_DMA_ERROR_ENGINE_0		13
-- 
2.25.1


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WARNING: multiple messages have this Message-ID (diff)
From: <daire.mcnamara@microchip.com>
To: <conor.dooley@microchip.com>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<lpieralisi@kernel.org>, <kw@linux.com>, <bhelgaas@google.com>,
	<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	<linux-pci@vger.kernel.org>
Cc: Daire McNamara <daire.mcnamara@microchip.com>
Subject: [PATCH v1 2/9] PCI: microchip: Correct the DED and SEC interrupt bit offsets
Date: Wed, 16 Nov 2022 13:54:57 +0000	[thread overview]
Message-ID: <20221116135504.258687-3-daire.mcnamara@microchip.com> (raw)
In-Reply-To: <20221116135504.258687-1-daire.mcnamara@microchip.com>

From: Daire McNamara <daire.mcnamara@microchip.com>

The SEC and DED interrupt bits were the wrong way round so the SEC
interrupt handler attempted to mask, unmask, and clear the DED interrupt
and vice versa. Correct the bit offsets so each interrupt handler
operates properly.

Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 drivers/pci/controller/pcie-microchip-host.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pcie-microchip-host.c b/drivers/pci/controller/pcie-microchip-host.c
index 80e7554722ca..30153fd1a2b3 100644
--- a/drivers/pci/controller/pcie-microchip-host.c
+++ b/drivers/pci/controller/pcie-microchip-host.c
@@ -165,12 +165,12 @@
 #define EVENT_PCIE_DLUP_EXIT			2
 #define EVENT_SEC_TX_RAM_SEC_ERR		3
 #define EVENT_SEC_RX_RAM_SEC_ERR		4
-#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR		5
-#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR		6
+#define EVENT_SEC_PCIE2AXI_RAM_SEC_ERR		5
+#define EVENT_SEC_AXI2PCIE_RAM_SEC_ERR		6
 #define EVENT_DED_TX_RAM_DED_ERR		7
 #define EVENT_DED_RX_RAM_DED_ERR		8
-#define EVENT_DED_AXI2PCIE_RAM_DED_ERR		9
-#define EVENT_DED_PCIE2AXI_RAM_DED_ERR		10
+#define EVENT_DED_PCIE2AXI_RAM_DED_ERR		9
+#define EVENT_DED_AXI2PCIE_RAM_DED_ERR		10
 #define EVENT_LOCAL_DMA_END_ENGINE_0		11
 #define EVENT_LOCAL_DMA_END_ENGINE_1		12
 #define EVENT_LOCAL_DMA_ERROR_ENGINE_0		13
-- 
2.25.1


  parent reply	other threads:[~2022-11-16 13:55 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-16 13:54 [PATCH v1 0/9] PCI: microchip: Partition address translations daire.mcnamara
2022-11-16 13:54 ` daire.mcnamara
2022-11-16 13:54 ` [PATCH v1 1/9] PCI: microchip: Align register, offset, and mask names with hw docs daire.mcnamara
2022-11-16 13:54   ` daire.mcnamara
2022-11-23 21:09   ` Conor Dooley
2022-11-23 21:09     ` Conor Dooley
2022-11-16 13:54 ` daire.mcnamara [this message]
2022-11-16 13:54   ` [PATCH v1 2/9] PCI: microchip: Correct the DED and SEC interrupt bit offsets daire.mcnamara
2022-11-16 15:19   ` Conor Dooley
2022-11-16 15:19     ` Conor Dooley
2022-11-23 21:28   ` Conor Dooley
2022-11-23 21:28     ` Conor Dooley
2022-11-16 13:54 ` [PATCH v1 3/9] PCI: microchip: Enable event handlers to access bridge and ctrl ptrs daire.mcnamara
2022-11-16 13:54   ` daire.mcnamara
2022-11-23 21:34   ` Conor Dooley
2022-11-23 21:34     ` Conor Dooley
2022-11-16 13:54 ` [PATCH v1 4/9] PCI: microchip: Clean up initialisation of interrupts daire.mcnamara
2022-11-16 13:54   ` daire.mcnamara
2022-11-16 15:17   ` kernel test robot
2022-11-16 15:17     ` kernel test robot
2022-11-17 18:28   ` kernel test robot
2022-11-17 18:28     ` kernel test robot
2022-11-23 21:58   ` Conor Dooley
2022-11-23 21:58     ` Conor Dooley
2022-11-16 13:55 ` [PATCH v1 5/9] PCI: microchip: Gather MSI information from hardware config registers daire.mcnamara
2022-11-16 13:55   ` daire.mcnamara
2022-11-16 16:41   ` Bjorn Helgaas
2022-11-16 16:41     ` Bjorn Helgaas
2022-11-23 22:09   ` Conor Dooley
2022-11-23 22:09     ` Conor Dooley
2022-11-16 13:55 ` [PATCH v1 6/9] PCI: microchip: Re-partition code between probe() and init() daire.mcnamara
2022-11-16 13:55   ` daire.mcnamara
2022-11-23 22:39   ` Conor Dooley
2022-11-23 22:39     ` Conor Dooley
2022-11-16 13:55 ` [PATCH v1 7/9] PCI: microchip: Partition outbound address translation daire.mcnamara
2022-11-16 13:55   ` daire.mcnamara
2022-11-23 22:44   ` Conor Dooley
2022-11-23 22:44     ` Conor Dooley
2022-11-16 13:55 ` [PATCH v1 8/9] PCI: microchip: Partition inbound " daire.mcnamara
2022-11-16 13:55   ` daire.mcnamara
2022-11-16 16:49   ` Bjorn Helgaas
2022-11-16 16:49     ` Bjorn Helgaas
2022-11-16 17:01     ` Conor Dooley
2022-11-16 17:01       ` Conor Dooley
2022-11-16 20:10   ` kernel test robot
2022-11-16 20:10     ` kernel test robot
2022-11-17  6:06   ` kernel test robot
2022-11-17  6:06     ` kernel test robot
2022-11-23 23:05   ` Conor Dooley
2022-11-23 23:05     ` Conor Dooley
2022-11-16 13:55 ` [PATCH v1 9/9] riscv: dts: microchip: add parent ranges and dma-ranges for IKRD v2022.09 daire.mcnamara
2022-11-16 13:55   ` daire.mcnamara
2022-11-23 22:14   ` Conor Dooley
2022-11-23 22:14     ` Conor Dooley
2022-11-23 23:15 ` [PATCH v1 0/9] PCI: microchip: Partition address translations Conor Dooley
2022-11-23 23:15   ` Conor Dooley

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