From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: [PATCH 09/15] hw/riscv/boot.c: use MachineState in riscv_load_initrd()
Date: Wed, 21 Dec 2022 15:22:54 -0300 [thread overview]
Message-ID: <20221221182300.307900-10-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20221221182300.307900-1-dbarboza@ventanamicro.com>
'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be
retrieved by the MachineState object for all callers.
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
hw/riscv/boot.c | 6 ++++--
hw/riscv/microchip_pfsoc.c | 3 +--
hw/riscv/sifive_u.c | 3 +--
hw/riscv/spike.c | 3 +--
hw/riscv/virt.c | 3 +--
include/hw/riscv/boot.h | 3 +--
6 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 8aed803d8c..4b46a9c51b 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -193,9 +193,11 @@ target_ulong riscv_load_kernel(const char *kernel_filename,
exit(1);
}
-void riscv_load_initrd(const char *filename, uint64_t mem_size,
- uint64_t kernel_entry, void *fdt)
+void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
{
+ const char *filename = machine->initrd_filename;
+ uint64_t mem_size = machine->ram_size;
+ void *fdt = machine->fdt;
hwaddr start, end;
ssize_t size;
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 593a799549..1e9b0a420e 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -633,8 +633,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 3e6df87b5b..c40885ed5c 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -602,8 +602,7 @@ static void sifive_u_machine_init(MachineState *machine)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 6d50abd425..1eeee8f349 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -277,8 +277,7 @@ static void spike_board_init(MachineState *machine)
htif_symbol_callback);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 6c946b6def..02f1369843 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1285,8 +1285,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
kernel_start_addr, NULL);
if (machine->initrd_filename) {
- riscv_load_initrd(machine->initrd_filename, machine->ram_size,
- kernel_entry, machine->fdt);
+ riscv_load_initrd(machine, kernel_entry);
}
if (machine->kernel_cmdline && *machine->kernel_cmdline) {
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index 6f4c606edc..a2861c9431 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -44,8 +44,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename,
target_ulong riscv_load_kernel(const char *kernel_filename,
target_ulong firmware_end_addr,
symbol_fn_t sym_cb);
-void riscv_load_initrd(const char *filename, uint64_t mem_size,
- uint64_t kernel_entry, void *fdt);
+void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry);
uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt);
void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
hwaddr saddr,
--
2.38.1
next prev parent reply other threads:[~2022-12-21 18:24 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 18:22 [PATCH 00/15] riscv: opensbi boot test and cleanups Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test Daniel Henrique Barboza
2022-12-22 10:24 ` Bin Meng
2022-12-22 10:47 ` Daniel Henrique Barboza
2022-12-22 12:56 ` Bin Meng
2022-12-22 16:56 ` Anup Patel
2022-12-22 20:58 ` Daniel Henrique Barboza
2022-12-23 6:25 ` Bin Meng
2022-12-24 3:52 ` Bin Meng
2022-12-26 13:56 ` Bin Meng
2022-12-26 14:00 ` Daniel Henrique Barboza
2022-12-27 18:02 ` Daniel Henrique Barboza
2022-12-23 2:40 ` Alistair Francis
2022-12-27 23:04 ` Wainer dos Santos Moschetta
2022-12-21 18:22 ` [PATCH 02/15] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2022-12-22 14:25 ` Philippe Mathieu-Daudé
2022-12-22 16:43 ` Daniel Henrique Barboza
2022-12-23 3:10 ` Alistair Francis
2022-12-23 9:09 ` Bin Meng
2022-12-21 18:22 ` [PATCH 03/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
2022-12-22 14:25 ` Philippe Mathieu-Daudé
2022-12-23 3:12 ` Alistair Francis
2022-12-23 9:10 ` Bin Meng
2022-12-21 18:22 ` [PATCH 04/15] hw/riscv/boot.c: make riscv_find_firmware() static Daniel Henrique Barboza
2022-12-22 14:26 ` Philippe Mathieu-Daudé
2022-12-23 3:13 ` Alistair Francis
2022-12-23 9:13 ` Bin Meng
2022-12-21 18:22 ` [PATCH 05/15] hw/riscv/boot.c: introduce riscv_default_firmware_name() Daniel Henrique Barboza
2022-12-23 3:17 ` Alistair Francis
2022-12-23 9:20 ` Bin Meng
2022-12-21 18:22 ` [PATCH 06/15] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:27 ` Philippe Mathieu-Daudé
2022-12-23 3:19 ` Alistair Francis
2022-12-23 10:04 ` Bin Meng
2022-12-26 13:49 ` Bin Meng
2022-12-26 13:52 ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 07/15] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2022-12-23 10:15 ` Bin Meng
2022-12-21 18:22 ` [PATCH 08/15] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2022-12-23 10:32 ` Bin Meng
2022-12-21 18:22 ` Daniel Henrique Barboza [this message]
2022-12-22 14:27 ` [PATCH 09/15] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Philippe Mathieu-Daudé
2022-12-23 10:47 ` Bin Meng
2022-12-21 18:22 ` [PATCH 10/15] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:28 ` Philippe Mathieu-Daudé
2022-12-23 10:55 ` Bin Meng
2022-12-21 18:22 ` [PATCH 11/15] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2022-12-23 12:55 ` Bin Meng
2022-12-21 18:22 ` [PATCH 12/15] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2022-12-22 14:29 ` Philippe Mathieu-Daudé
2022-12-23 12:56 ` Bin Meng
2022-12-21 18:22 ` [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt() Daniel Henrique Barboza
2022-12-23 13:06 ` Bin Meng
2022-12-26 14:18 ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 14/15] hw/riscv/virt.c: " Daniel Henrique Barboza
2022-12-21 18:23 ` [PATCH 15/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
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