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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	Bin Meng <bin.meng@windriver.com>
Subject: [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt()
Date: Wed, 21 Dec 2022 15:22:58 -0300	[thread overview]
Message-ID: <20221221182300.307900-14-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20221221182300.307900-1-dbarboza@ventanamicro.com>

'mem_size' and 'cmdline' aren't being used and the MachineState pointer
is being retrieved via a MACHINE() macro.

Remove 'mem_size' and 'cmdline' and add MachineState as a parameter.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 hw/riscv/spike.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 2b9af5689e..181bf394a0 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -48,15 +48,14 @@ static const MemMapEntry spike_memmap[] = {
     [SPIKE_DRAM] =     { 0x80000000,        0x0 },
 };
 
-static void create_fdt(SpikeState *s, const MemMapEntry *memmap,
-                       uint64_t mem_size, const char *cmdline, bool is_32_bit)
+static void create_fdt(MachineState *mc, SpikeState *s,
+                       const MemMapEntry *memmap, bool is_32_bit)
 {
     void *fdt;
     int fdt_size;
     uint64_t addr, size;
     unsigned long clint_addr;
     int cpu, socket;
-    MachineState *mc = MACHINE(s);
     uint32_t *clint_cells;
     uint32_t cpu_phandle, intc_phandle, phandle = 1;
     char *name, *mem_name, *clint_name, *clust_name;
@@ -254,8 +253,7 @@ static void spike_board_init(MachineState *machine)
                                 mask_rom);
 
     /* Create device tree */
-    create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
-               riscv_is_32bit(&s->soc[0]));
+    create_fdt(machine, s, memmap, riscv_is_32bit(&s->soc[0]));
 
     /*
      * Not like other RISC-V machines that use plain binary bios images,
-- 
2.38.1



  parent reply	other threads:[~2022-12-21 18:24 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-21 18:22 [PATCH 00/15] riscv: opensbi boot test and cleanups Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test Daniel Henrique Barboza
2022-12-22 10:24   ` Bin Meng
2022-12-22 10:47     ` Daniel Henrique Barboza
2022-12-22 12:56       ` Bin Meng
2022-12-22 16:56         ` Anup Patel
2022-12-22 20:58           ` Daniel Henrique Barboza
2022-12-23  6:25           ` Bin Meng
2022-12-24  3:52             ` Bin Meng
2022-12-26 13:56               ` Bin Meng
2022-12-26 14:00                 ` Daniel Henrique Barboza
2022-12-27 18:02                 ` Daniel Henrique Barboza
2022-12-23  2:40   ` Alistair Francis
2022-12-27 23:04   ` Wainer dos Santos Moschetta
2022-12-21 18:22 ` [PATCH 02/15] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2022-12-22 14:25   ` Philippe Mathieu-Daudé
2022-12-22 16:43     ` Daniel Henrique Barboza
2022-12-23  3:10   ` Alistair Francis
2022-12-23  9:09   ` Bin Meng
2022-12-21 18:22 ` [PATCH 03/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
2022-12-22 14:25   ` Philippe Mathieu-Daudé
2022-12-23  3:12   ` Alistair Francis
2022-12-23  9:10   ` Bin Meng
2022-12-21 18:22 ` [PATCH 04/15] hw/riscv/boot.c: make riscv_find_firmware() static Daniel Henrique Barboza
2022-12-22 14:26   ` Philippe Mathieu-Daudé
2022-12-23  3:13   ` Alistair Francis
2022-12-23  9:13   ` Bin Meng
2022-12-21 18:22 ` [PATCH 05/15] hw/riscv/boot.c: introduce riscv_default_firmware_name() Daniel Henrique Barboza
2022-12-23  3:17   ` Alistair Francis
2022-12-23  9:20   ` Bin Meng
2022-12-21 18:22 ` [PATCH 06/15] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:27   ` Philippe Mathieu-Daudé
2022-12-23  3:19   ` Alistair Francis
2022-12-23 10:04   ` Bin Meng
2022-12-26 13:49     ` Bin Meng
2022-12-26 13:52       ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 07/15] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2022-12-23 10:15   ` Bin Meng
2022-12-21 18:22 ` [PATCH 08/15] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2022-12-23 10:32   ` Bin Meng
2022-12-21 18:22 ` [PATCH 09/15] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Daniel Henrique Barboza
2022-12-22 14:27   ` Philippe Mathieu-Daudé
2022-12-23 10:47   ` Bin Meng
2022-12-21 18:22 ` [PATCH 10/15] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:28   ` Philippe Mathieu-Daudé
2022-12-23 10:55   ` Bin Meng
2022-12-21 18:22 ` [PATCH 11/15] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2022-12-23 12:55   ` Bin Meng
2022-12-21 18:22 ` [PATCH 12/15] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2022-12-22 14:29   ` Philippe Mathieu-Daudé
2022-12-23 12:56   ` Bin Meng
2022-12-21 18:22 ` Daniel Henrique Barboza [this message]
2022-12-23 13:06   ` [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt() Bin Meng
2022-12-26 14:18     ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 14/15] hw/riscv/virt.c: " Daniel Henrique Barboza
2022-12-21 18:23 ` [PATCH 15/15] hw/riscv/sifive_u: " Daniel Henrique Barboza

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