All of lore.kernel.org
 help / color / mirror / Atom feed
From: Alistair Francis <alistair23@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  Bin Meng <bin.meng@windriver.com>
Subject: Re: [PATCH 06/15] hw/riscv/spike.c: load initrd right after riscv_load_kernel()
Date: Fri, 23 Dec 2022 13:19:10 +1000	[thread overview]
Message-ID: <CAKmqyKOpKZ4anXZS4XA3do+C_LgSeg-kx5sdBqj57Y000oa2sQ@mail.gmail.com> (raw)
In-Reply-To: <20221221182300.307900-7-dbarboza@ventanamicro.com>

On Thu, Dec 22, 2022 at 4:28 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> This will make the code more in line with what the other boards are
> doing. We'll also avoid an extra check to machine->kernel_filename since
> we already checked that before executing riscv_load_kernel().
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/spike.c | 31 +++++++++++++++----------------
>  1 file changed, 15 insertions(+), 16 deletions(-)
>
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 43341c20b6..f37a9bebbf 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -257,6 +257,10 @@ static void spike_board_init(MachineState *machine)
>      memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
>                                  mask_rom);
>
> +    /* Create device tree */
> +    create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
> +               riscv_is_32bit(&s->soc[0]));
> +
>      /*
>       * Not like other RISC-V machines that use plain binary bios images,
>       * keeping ELF files here was intentional because BIN files don't work
> @@ -275,6 +279,17 @@ static void spike_board_init(MachineState *machine)
>          kernel_entry = riscv_load_kernel(machine->kernel_filename,
>                                           kernel_start_addr,
>                                           htif_symbol_callback);
> +
> +        if (machine->initrd_filename) {
> +            hwaddr start;
> +            hwaddr end = riscv_load_initrd(machine->initrd_filename,
> +                                           machine->ram_size, kernel_entry,
> +                                           &start);
> +            qemu_fdt_setprop_cell(machine->fdt, "/chosen",
> +                                  "linux,initrd-start", start);
> +            qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end",
> +                                  end);
> +        }
>      } else {
>         /*
>          * If dynamic firmware is used, it doesn't know where is the next mode
> @@ -283,22 +298,6 @@ static void spike_board_init(MachineState *machine)
>          kernel_entry = 0;
>      }
>
> -    /* Create device tree */
> -    create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
> -               riscv_is_32bit(&s->soc[0]));
> -
> -    /* Load initrd */
> -    if (machine->kernel_filename && machine->initrd_filename) {
> -        hwaddr start;
> -        hwaddr end = riscv_load_initrd(machine->initrd_filename,
> -                                       machine->ram_size, kernel_entry,
> -                                       &start);
> -        qemu_fdt_setprop_cell(machine->fdt, "/chosen",
> -                              "linux,initrd-start", start);
> -        qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end",
> -                              end);
> -    }
> -
>      /* Compute the fdt load address in dram */
>      fdt_load_addr = riscv_load_fdt(memmap[SPIKE_DRAM].base,
>                                     machine->ram_size, machine->fdt);
> --
> 2.38.1
>
>


  parent reply	other threads:[~2022-12-23  3:20 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-21 18:22 [PATCH 00/15] riscv: opensbi boot test and cleanups Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test Daniel Henrique Barboza
2022-12-22 10:24   ` Bin Meng
2022-12-22 10:47     ` Daniel Henrique Barboza
2022-12-22 12:56       ` Bin Meng
2022-12-22 16:56         ` Anup Patel
2022-12-22 20:58           ` Daniel Henrique Barboza
2022-12-23  6:25           ` Bin Meng
2022-12-24  3:52             ` Bin Meng
2022-12-26 13:56               ` Bin Meng
2022-12-26 14:00                 ` Daniel Henrique Barboza
2022-12-27 18:02                 ` Daniel Henrique Barboza
2022-12-23  2:40   ` Alistair Francis
2022-12-27 23:04   ` Wainer dos Santos Moschetta
2022-12-21 18:22 ` [PATCH 02/15] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2022-12-22 14:25   ` Philippe Mathieu-Daudé
2022-12-22 16:43     ` Daniel Henrique Barboza
2022-12-23  3:10   ` Alistair Francis
2022-12-23  9:09   ` Bin Meng
2022-12-21 18:22 ` [PATCH 03/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
2022-12-22 14:25   ` Philippe Mathieu-Daudé
2022-12-23  3:12   ` Alistair Francis
2022-12-23  9:10   ` Bin Meng
2022-12-21 18:22 ` [PATCH 04/15] hw/riscv/boot.c: make riscv_find_firmware() static Daniel Henrique Barboza
2022-12-22 14:26   ` Philippe Mathieu-Daudé
2022-12-23  3:13   ` Alistair Francis
2022-12-23  9:13   ` Bin Meng
2022-12-21 18:22 ` [PATCH 05/15] hw/riscv/boot.c: introduce riscv_default_firmware_name() Daniel Henrique Barboza
2022-12-23  3:17   ` Alistair Francis
2022-12-23  9:20   ` Bin Meng
2022-12-21 18:22 ` [PATCH 06/15] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:27   ` Philippe Mathieu-Daudé
2022-12-23  3:19   ` Alistair Francis [this message]
2022-12-23 10:04   ` Bin Meng
2022-12-26 13:49     ` Bin Meng
2022-12-26 13:52       ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 07/15] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2022-12-23 10:15   ` Bin Meng
2022-12-21 18:22 ` [PATCH 08/15] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2022-12-23 10:32   ` Bin Meng
2022-12-21 18:22 ` [PATCH 09/15] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Daniel Henrique Barboza
2022-12-22 14:27   ` Philippe Mathieu-Daudé
2022-12-23 10:47   ` Bin Meng
2022-12-21 18:22 ` [PATCH 10/15] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:28   ` Philippe Mathieu-Daudé
2022-12-23 10:55   ` Bin Meng
2022-12-21 18:22 ` [PATCH 11/15] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2022-12-23 12:55   ` Bin Meng
2022-12-21 18:22 ` [PATCH 12/15] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2022-12-22 14:29   ` Philippe Mathieu-Daudé
2022-12-23 12:56   ` Bin Meng
2022-12-21 18:22 ` [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt() Daniel Henrique Barboza
2022-12-23 13:06   ` Bin Meng
2022-12-26 14:18     ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 14/15] hw/riscv/virt.c: " Daniel Henrique Barboza
2022-12-21 18:23 ` [PATCH 15/15] hw/riscv/sifive_u: " Daniel Henrique Barboza

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAKmqyKOpKZ4anXZS4XA3do+C_LgSeg-kx5sdBqj57Y000oa2sQ@mail.gmail.com \
    --to=alistair23@gmail.com \
    --cc=alistair.francis@wdc.com \
    --cc=bin.meng@windriver.com \
    --cc=dbarboza@ventanamicro.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.