From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Date: Fri, 23 Dec 2022 10:42:48 +0100 [thread overview] Message-ID: <20221223094259.87373-13-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> As a preparation to increase probe functions commonization across various MediaTek SoC clock controller drivers, extend function mtk_clk_simple_probe() to be able to register not only gates, but also fixed clocks, factors, muxes and composites. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/clk/mediatek/clk-mtk.c | 101 ++++++++++++++++++++++++++++++--- drivers/clk/mediatek/clk-mtk.h | 10 ++++ 2 files changed, 103 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index d05364e17e95..b0a6225cd7b2 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -11,12 +11,14 @@ #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/slab.h> #include "clk-mtk.h" #include "clk-gate.h" +#include "clk-mux.h" const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 }; @@ -465,20 +467,71 @@ int mtk_clk_simple_probe(struct platform_device *pdev) const struct mtk_clk_desc *mcd; struct clk_hw_onecell_data *clk_data; struct device_node *node = pdev->dev.of_node; - int r; + void __iomem *base; + int num_clks, r; mcd = of_device_get_match_data(&pdev->dev); if (!mcd) return -EINVAL; - clk_data = mtk_alloc_clk_data(mcd->num_clks); + /* Composite clocks needs us to pass iomem pointer */ + if (mcd->composite_clks) { + if (!mcd->shared_io) + base = devm_platform_ioremap_resource(pdev, 0); + else + base = of_iomap(node, 0); + + if (IS_ERR_OR_NULL(base)) + return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; + } + + /* Calculate how many clk_hw_onecell_data entries to allocate */ + num_clks = mcd->num_clks + mcd->num_composite_clks; + num_clks += mcd->num_fixed_clks + mcd->num_factor_clks; + num_clks += mcd->num_mux_clks; + + clk_data = mtk_alloc_clk_data(num_clks); if (!clk_data) return -ENOMEM; - r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, - clk_data, &pdev->dev); - if (r) - goto free_data; + if (mcd->fixed_clks) { + r = mtk_clk_register_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); + if (r) + goto free_data; + } + + if (mcd->factor_clks) { + r = mtk_clk_register_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); + if (r) + goto unregister_fixed_clks; + } + + if (mcd->mux_clks) { + r = mtk_clk_register_muxes(mcd->mux_clks, mcd->num_mux_clks, + node, mcd->clk_lock, clk_data, + &pdev->dev); + if (r) + goto unregister_factors; + }; + + if (mcd->composite_clks) { + /* We don't check composite_lock because it's optional */ + r = mtk_clk_register_composites(mcd->composite_clks, + mcd->num_composite_clks, + base, mcd->clk_lock, + clk_data, &pdev->dev); + if (r) + goto unregister_muxes; + } + + if (mcd->clks) { + r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, + clk_data, &pdev->dev); + if (r) + goto unregister_composites; + } r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (r) @@ -496,9 +549,28 @@ int mtk_clk_simple_probe(struct platform_device *pdev) return r; unregister_clks: - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->clks) + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); +unregister_composites: + if (mcd->composite_clks) + mtk_clk_unregister_composites(mcd->composite_clks, + mcd->num_composite_clks, clk_data); +unregister_muxes: + if (mcd->mux_clks) + mtk_clk_unregister_muxes(mcd->mux_clks, + mcd->num_mux_clks, clk_data); +unregister_factors: + if (mcd->factor_clks) + mtk_clk_unregister_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); +unregister_fixed_clks: + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); free_data: mtk_free_clk_data(clk_data); + if (mcd->shared_io && base) + iounmap(base); return r; } EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); @@ -510,7 +582,20 @@ int mtk_clk_simple_remove(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; of_clk_del_provider(node); - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->clks) + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->composite_clks) + mtk_clk_unregister_composites(mcd->composite_clks, + mcd->num_composite_clks, clk_data); + if (mcd->mux_clks) + mtk_clk_unregister_muxes(mcd->mux_clks, + mcd->num_mux_clks, clk_data); + if (mcd->factor_clks) + mtk_clk_unregister_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); mtk_free_clk_data(clk_data); return 0; diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index dd43235285db..1d036ba6ca07 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -220,7 +220,17 @@ void mtk_clk_unregister_ref2usb_tx(struct clk_hw *hw); struct mtk_clk_desc { const struct mtk_gate *clks; size_t num_clks; + const struct mtk_composite *composite_clks; + size_t num_composite_clks; + const struct mtk_fixed_clk *fixed_clks; + size_t num_fixed_clks; + const struct mtk_fixed_factor *factor_clks; + size_t num_factor_clks; + const struct mtk_mux *mux_clks; + size_t num_mux_clks; const struct mtk_clk_rst_desc *rst_desc; + spinlock_t *clk_lock; + bool shared_io; }; int mtk_clk_simple_probe(struct platform_device *pdev); -- 2.39.0
WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Date: Fri, 23 Dec 2022 10:42:48 +0100 [thread overview] Message-ID: <20221223094259.87373-13-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> As a preparation to increase probe functions commonization across various MediaTek SoC clock controller drivers, extend function mtk_clk_simple_probe() to be able to register not only gates, but also fixed clocks, factors, muxes and composites. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/clk/mediatek/clk-mtk.c | 101 ++++++++++++++++++++++++++++++--- drivers/clk/mediatek/clk-mtk.h | 10 ++++ 2 files changed, 103 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index d05364e17e95..b0a6225cd7b2 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -11,12 +11,14 @@ #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/slab.h> #include "clk-mtk.h" #include "clk-gate.h" +#include "clk-mux.h" const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 }; @@ -465,20 +467,71 @@ int mtk_clk_simple_probe(struct platform_device *pdev) const struct mtk_clk_desc *mcd; struct clk_hw_onecell_data *clk_data; struct device_node *node = pdev->dev.of_node; - int r; + void __iomem *base; + int num_clks, r; mcd = of_device_get_match_data(&pdev->dev); if (!mcd) return -EINVAL; - clk_data = mtk_alloc_clk_data(mcd->num_clks); + /* Composite clocks needs us to pass iomem pointer */ + if (mcd->composite_clks) { + if (!mcd->shared_io) + base = devm_platform_ioremap_resource(pdev, 0); + else + base = of_iomap(node, 0); + + if (IS_ERR_OR_NULL(base)) + return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; + } + + /* Calculate how many clk_hw_onecell_data entries to allocate */ + num_clks = mcd->num_clks + mcd->num_composite_clks; + num_clks += mcd->num_fixed_clks + mcd->num_factor_clks; + num_clks += mcd->num_mux_clks; + + clk_data = mtk_alloc_clk_data(num_clks); if (!clk_data) return -ENOMEM; - r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, - clk_data, &pdev->dev); - if (r) - goto free_data; + if (mcd->fixed_clks) { + r = mtk_clk_register_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); + if (r) + goto free_data; + } + + if (mcd->factor_clks) { + r = mtk_clk_register_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); + if (r) + goto unregister_fixed_clks; + } + + if (mcd->mux_clks) { + r = mtk_clk_register_muxes(mcd->mux_clks, mcd->num_mux_clks, + node, mcd->clk_lock, clk_data, + &pdev->dev); + if (r) + goto unregister_factors; + }; + + if (mcd->composite_clks) { + /* We don't check composite_lock because it's optional */ + r = mtk_clk_register_composites(mcd->composite_clks, + mcd->num_composite_clks, + base, mcd->clk_lock, + clk_data, &pdev->dev); + if (r) + goto unregister_muxes; + } + + if (mcd->clks) { + r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, + clk_data, &pdev->dev); + if (r) + goto unregister_composites; + } r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (r) @@ -496,9 +549,28 @@ int mtk_clk_simple_probe(struct platform_device *pdev) return r; unregister_clks: - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->clks) + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); +unregister_composites: + if (mcd->composite_clks) + mtk_clk_unregister_composites(mcd->composite_clks, + mcd->num_composite_clks, clk_data); +unregister_muxes: + if (mcd->mux_clks) + mtk_clk_unregister_muxes(mcd->mux_clks, + mcd->num_mux_clks, clk_data); +unregister_factors: + if (mcd->factor_clks) + mtk_clk_unregister_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); +unregister_fixed_clks: + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); free_data: mtk_free_clk_data(clk_data); + if (mcd->shared_io && base) + iounmap(base); return r; } EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); @@ -510,7 +582,20 @@ int mtk_clk_simple_remove(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; of_clk_del_provider(node); - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->clks) + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); + if (mcd->composite_clks) + mtk_clk_unregister_composites(mcd->composite_clks, + mcd->num_composite_clks, clk_data); + if (mcd->mux_clks) + mtk_clk_unregister_muxes(mcd->mux_clks, + mcd->num_mux_clks, clk_data); + if (mcd->factor_clks) + mtk_clk_unregister_factors(mcd->factor_clks, + mcd->num_factor_clks, clk_data); + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, + mcd->num_fixed_clks, clk_data); mtk_free_clk_data(clk_data); return 0; diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index dd43235285db..1d036ba6ca07 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -220,7 +220,17 @@ void mtk_clk_unregister_ref2usb_tx(struct clk_hw *hw); struct mtk_clk_desc { const struct mtk_gate *clks; size_t num_clks; + const struct mtk_composite *composite_clks; + size_t num_composite_clks; + const struct mtk_fixed_clk *fixed_clks; + size_t num_fixed_clks; + const struct mtk_fixed_factor *factor_clks; + size_t num_factor_clks; + const struct mtk_mux *mux_clks; + size_t num_mux_clks; const struct mtk_clk_rst_desc *rst_desc; + spinlock_t *clk_lock; + bool shared_io; }; int mtk_clk_simple_probe(struct platform_device *pdev); -- 2.39.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-12-23 9:44 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-23 9:42 [PATCH v2 00/23] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 01/23] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:55 ` Chen-Yu Tsai 2022-12-26 6:55 ` Chen-Yu Tsai 2023-01-04 10:55 ` Markus Schneider-Pargmann 2023-01-04 10:55 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 02/23] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:05 ` Chen-Yu Tsai 2022-12-26 7:05 ` Chen-Yu Tsai 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 04/23] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:07 ` Chen-Yu Tsai 2022-12-26 7:07 ` Chen-Yu Tsai 2023-01-06 17:00 ` Markus Schneider-Pargmann 2023-01-06 17:00 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 05/23] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:37 ` Chen-Yu Tsai 2022-12-30 4:37 ` Chen-Yu Tsai 2023-01-06 17:09 ` Markus Schneider-Pargmann 2023-01-06 17:09 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 06/23] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:24 ` Miles Chen 2022-12-28 7:24 ` Miles Chen 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 08/23] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 09/23] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:58 ` Chen-Yu Tsai 2022-12-30 4:58 ` Chen-Yu Tsai 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-11 2:27 ` Chen-Yu Tsai 2023-01-11 2:27 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-24 1:47 ` kernel test robot 2022-12-23 9:42 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:50 ` Miles Chen 2022-12-28 7:50 ` Miles Chen 2022-12-30 5:12 ` Chen-Yu Tsai 2022-12-30 5:12 ` Chen-Yu Tsai 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 8:56 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() Miles Chen 2023-01-11 8:56 ` Miles Chen 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno [this message] 2022-12-23 9:42 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-27 16:22 ` Miles Chen 2022-12-27 16:22 ` Miles Chen 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 13/23] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:54 ` Miles Chen 2022-12-28 7:54 ` Miles Chen 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:58 ` Miles Chen 2022-12-28 7:58 ` Miles Chen 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 8:31 ` Miles Chen 2022-12-28 8:31 ` Miles Chen 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 16/23] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 18/23] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-29 8:21 ` Miles Chen 2022-12-29 8:21 ` Miles Chen 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 19/23] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 20/23] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:55 ` Miles Chen 2022-12-30 5:55 ` Miles Chen 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 21/23] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:56 ` Miles Chen 2022-12-30 5:56 ` Miles Chen 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 22/23] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 6:04 ` Miles Chen 2022-12-30 6:04 ` Miles Chen 2022-12-23 9:42 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:18 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Miles Chen 2022-12-27 16:18 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-30 6:05 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() Miles Chen 2022-12-30 6:05 ` Miles Chen 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 6:13 ` [PATCH v2 00/23] MediaTek clocks cleanups and improvements Miles Chen 2022-12-30 6:13 ` Miles Chen 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 7:19 ` Miles Chen 2022-12-30 7:19 ` Miles Chen 2023-01-03 9:36 ` Chen-Yu Tsai 2023-01-03 9:36 ` Chen-Yu Tsai 2022-12-23 20:33 [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build kernel test robot 2022-12-24 7:13 ` Dan Carpenter 2022-12-24 7:13 ` Dan Carpenter
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