From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs Date: Fri, 23 Dec 2022 10:42:53 +0100 [thread overview] Message-ID: <20221223094259.87373-18-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> Join the two to register them in one shot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/clk/mediatek/clk-mt8183.c | 34 +++++++++++++------------------ 1 file changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c index f1d84c0730d5..be2a53b3a881 100644 --- a/drivers/clk/mediatek/clk-mt8183.c +++ b/drivers/clk/mediatek/clk-mt8183.c @@ -613,21 +613,6 @@ static const char * const apll_i2s5_parents[] = { "aud_2_sel" }; -static struct mtk_composite top_aud_muxes[] = { - MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents, - 0x320, 8, 1), - MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents, - 0x320, 9, 1), - MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents, - 0x320, 10, 1), - MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents, - 0x320, 11, 1), - MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents, - 0x320, 12, 1), - MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents, - 0x328, 20, 1), -}; - static const char * const mcu_mp0_parents[] = { "clk26m", "armpll_ll", @@ -658,7 +643,19 @@ static struct mtk_composite mcu_muxes[] = { MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2), }; -static struct mtk_composite top_aud_divs[] = { +static struct mtk_composite top_aud_comp[] = { + MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents, + 0x320, 8, 1), + MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents, + 0x320, 9, 1), + MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents, + 0x320, 10, 1), + MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents, + 0x320, 11, 1), + MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents, + 0x320, 12, 1), + MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents, + 0x328, 20, 1), DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel", 0x320, 2, 0x324, 8, 0), DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel", @@ -1169,10 +1166,7 @@ static int clk_mt8183_top_probe(struct platform_device *pdev) mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, &mt8183_clk_lock, top_clk_data, &pdev->dev); - mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes), - base, &mt8183_clk_lock, top_clk_data, &pdev->dev); - - mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), + mtk_clk_register_composites(top_aud_comp, ARRAY_SIZE(top_aud_comp), base, &mt8183_clk_lock, top_clk_data, &pdev->dev); mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), -- 2.39.0
WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: mturquette@baylibre.com Cc: sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, angelogioacchino.delregno@collabora.com, wenst@chromium.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs Date: Fri, 23 Dec 2022 10:42:53 +0100 [thread overview] Message-ID: <20221223094259.87373-18-angelogioacchino.delregno@collabora.com> (raw) In-Reply-To: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> Join the two to register them in one shot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/clk/mediatek/clk-mt8183.c | 34 +++++++++++++------------------ 1 file changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c index f1d84c0730d5..be2a53b3a881 100644 --- a/drivers/clk/mediatek/clk-mt8183.c +++ b/drivers/clk/mediatek/clk-mt8183.c @@ -613,21 +613,6 @@ static const char * const apll_i2s5_parents[] = { "aud_2_sel" }; -static struct mtk_composite top_aud_muxes[] = { - MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents, - 0x320, 8, 1), - MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents, - 0x320, 9, 1), - MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents, - 0x320, 10, 1), - MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents, - 0x320, 11, 1), - MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents, - 0x320, 12, 1), - MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents, - 0x328, 20, 1), -}; - static const char * const mcu_mp0_parents[] = { "clk26m", "armpll_ll", @@ -658,7 +643,19 @@ static struct mtk_composite mcu_muxes[] = { MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2), }; -static struct mtk_composite top_aud_divs[] = { +static struct mtk_composite top_aud_comp[] = { + MUX(CLK_TOP_MUX_APLL_I2S0, "apll_i2s0_sel", apll_i2s0_parents, + 0x320, 8, 1), + MUX(CLK_TOP_MUX_APLL_I2S1, "apll_i2s1_sel", apll_i2s1_parents, + 0x320, 9, 1), + MUX(CLK_TOP_MUX_APLL_I2S2, "apll_i2s2_sel", apll_i2s2_parents, + 0x320, 10, 1), + MUX(CLK_TOP_MUX_APLL_I2S3, "apll_i2s3_sel", apll_i2s3_parents, + 0x320, 11, 1), + MUX(CLK_TOP_MUX_APLL_I2S4, "apll_i2s4_sel", apll_i2s4_parents, + 0x320, 12, 1), + MUX(CLK_TOP_MUX_APLL_I2S5, "apll_i2s5_sel", apll_i2s5_parents, + 0x328, 20, 1), DIV_GATE(CLK_TOP_APLL12_DIV0, "apll12_div0", "apll_i2s0_sel", 0x320, 2, 0x324, 8, 0), DIV_GATE(CLK_TOP_APLL12_DIV1, "apll12_div1", "apll_i2s1_sel", @@ -1169,10 +1166,7 @@ static int clk_mt8183_top_probe(struct platform_device *pdev) mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), node, &mt8183_clk_lock, top_clk_data, &pdev->dev); - mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes), - base, &mt8183_clk_lock, top_clk_data, &pdev->dev); - - mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), + mtk_clk_register_composites(top_aud_comp, ARRAY_SIZE(top_aud_comp), base, &mt8183_clk_lock, top_clk_data, &pdev->dev); mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), -- 2.39.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-12-23 9:45 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-23 9:42 [PATCH v2 00/23] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 01/23] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:55 ` Chen-Yu Tsai 2022-12-26 6:55 ` Chen-Yu Tsai 2023-01-04 10:55 ` Markus Schneider-Pargmann 2023-01-04 10:55 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 02/23] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:05 ` Chen-Yu Tsai 2022-12-26 7:05 ` Chen-Yu Tsai 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 04/23] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:07 ` Chen-Yu Tsai 2022-12-26 7:07 ` Chen-Yu Tsai 2023-01-06 17:00 ` Markus Schneider-Pargmann 2023-01-06 17:00 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 05/23] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:37 ` Chen-Yu Tsai 2022-12-30 4:37 ` Chen-Yu Tsai 2023-01-06 17:09 ` Markus Schneider-Pargmann 2023-01-06 17:09 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 06/23] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:24 ` Miles Chen 2022-12-28 7:24 ` Miles Chen 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 08/23] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 09/23] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:58 ` Chen-Yu Tsai 2022-12-30 4:58 ` Chen-Yu Tsai 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-11 2:27 ` Chen-Yu Tsai 2023-01-11 2:27 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-24 1:47 ` kernel test robot 2022-12-23 9:42 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:50 ` Miles Chen 2022-12-28 7:50 ` Miles Chen 2022-12-30 5:12 ` Chen-Yu Tsai 2022-12-30 5:12 ` Chen-Yu Tsai 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 8:56 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() Miles Chen 2023-01-11 8:56 ` Miles Chen 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:22 ` Miles Chen 2022-12-27 16:22 ` Miles Chen 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 13/23] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:54 ` Miles Chen 2022-12-28 7:54 ` Miles Chen 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:58 ` Miles Chen 2022-12-28 7:58 ` Miles Chen 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 8:31 ` Miles Chen 2022-12-28 8:31 ` Miles Chen 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 16/23] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` AngeloGioacchino Del Regno [this message] 2022-12-23 9:42 ` [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 18/23] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-29 8:21 ` Miles Chen 2022-12-29 8:21 ` Miles Chen 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 19/23] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 20/23] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:55 ` Miles Chen 2022-12-30 5:55 ` Miles Chen 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 21/23] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:56 ` Miles Chen 2022-12-30 5:56 ` Miles Chen 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 22/23] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 6:04 ` Miles Chen 2022-12-30 6:04 ` Miles Chen 2022-12-23 9:42 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:18 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Miles Chen 2022-12-27 16:18 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-30 6:05 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() Miles Chen 2022-12-30 6:05 ` Miles Chen 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 6:13 ` [PATCH v2 00/23] MediaTek clocks cleanups and improvements Miles Chen 2022-12-30 6:13 ` Miles Chen 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 7:19 ` Miles Chen 2022-12-30 7:19 ` Miles Chen 2023-01-03 9:36 ` Chen-Yu Tsai 2023-01-03 9:36 ` Chen-Yu Tsai 2022-12-23 20:33 [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build kernel test robot 2022-12-24 7:13 ` Dan Carpenter 2022-12-24 7:13 ` Dan Carpenter
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