From: Chen-Yu Tsai <wenst@chromium.org> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops Date: Fri, 30 Dec 2022 13:19:21 +0800 [thread overview] Message-ID: <CAGXv+5H=eq0WRc=vvjD-xEKuc1tkM_t4GCHVwe8EZzSJPdEDOQ@mail.gmail.com> (raw) In-Reply-To: <20221223094259.87373-8-angelogioacchino.delregno@collabora.com> On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > In order to migrate some (few) old clock drivers to the common > mtk_clk_simple_probe() function, add dummy clock ops to be able > to insert a dummy clock with ID 0 at the beginning of the list. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/clk/mediatek/clk-mtk.c | 15 +++++++++++++++ > drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++ > 2 files changed, 34 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c > index a1ab34305b95..d05364e17e95 100644 > --- a/drivers/clk/mediatek/clk-mtk.c > +++ b/drivers/clk/mediatek/clk-mtk.c > @@ -18,6 +18,21 @@ > #include "clk-mtk.h" > #include "clk-gate.h" > > +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 }; You could probably just use an empty { }, since the contents don't matter. It would make any possible future changes to |struct mtk_gate_regs| touch one less place. Otherwise, Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> > + > +static int mtk_clk_dummy_enable(struct clk_hw *hw) > +{ > + return 0; > +} > + > +static void mtk_clk_dummy_disable(struct clk_hw *hw) { } > + > +const struct clk_ops mtk_clk_dummy_ops = { > + .enable = mtk_clk_dummy_enable, > + .disable = mtk_clk_dummy_disable, > +}; > +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops); > + > static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data, > unsigned int clk_num) > { > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index 15122504c02d..dd43235285db 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -22,6 +22,25 @@ > > struct platform_device; > > +/* > + * We need the clock IDs to start from zero but to maintain devicetree > + * backwards compatibility we can't change bindings to start from zero. > + * Only a few platforms are affected, so we solve issues given by the > + * commonized MTK clocks probe function(s) by adding a dummy clock at > + * the beginning where needed. > + */ > +#define CLK_DUMMY 0 > + > +extern const struct clk_ops mtk_clk_dummy_ops; > +extern const struct mtk_gate_regs cg_regs_dummy; > + > +#define GATE_DUMMY(_id, _name) { \ > + .id = _id, \ > + .name = _name, \ > + .regs = &cg_regs_dummy, \ > + .ops = &mtk_clk_dummy_ops, \ > + } > + > struct mtk_fixed_clk { > int id; > const char *name; > -- > 2.39.0 >
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wenst@chromium.org> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Subject: Re: [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops Date: Fri, 30 Dec 2022 13:19:21 +0800 [thread overview] Message-ID: <CAGXv+5H=eq0WRc=vvjD-xEKuc1tkM_t4GCHVwe8EZzSJPdEDOQ@mail.gmail.com> (raw) In-Reply-To: <20221223094259.87373-8-angelogioacchino.delregno@collabora.com> On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote: > > In order to migrate some (few) old clock drivers to the common > mtk_clk_simple_probe() function, add dummy clock ops to be able > to insert a dummy clock with ID 0 at the beginning of the list. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- > drivers/clk/mediatek/clk-mtk.c | 15 +++++++++++++++ > drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++ > 2 files changed, 34 insertions(+) > > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c > index a1ab34305b95..d05364e17e95 100644 > --- a/drivers/clk/mediatek/clk-mtk.c > +++ b/drivers/clk/mediatek/clk-mtk.c > @@ -18,6 +18,21 @@ > #include "clk-mtk.h" > #include "clk-gate.h" > > +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 }; You could probably just use an empty { }, since the contents don't matter. It would make any possible future changes to |struct mtk_gate_regs| touch one less place. Otherwise, Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> > + > +static int mtk_clk_dummy_enable(struct clk_hw *hw) > +{ > + return 0; > +} > + > +static void mtk_clk_dummy_disable(struct clk_hw *hw) { } > + > +const struct clk_ops mtk_clk_dummy_ops = { > + .enable = mtk_clk_dummy_enable, > + .disable = mtk_clk_dummy_disable, > +}; > +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops); > + > static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data, > unsigned int clk_num) > { > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index 15122504c02d..dd43235285db 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -22,6 +22,25 @@ > > struct platform_device; > > +/* > + * We need the clock IDs to start from zero but to maintain devicetree > + * backwards compatibility we can't change bindings to start from zero. > + * Only a few platforms are affected, so we solve issues given by the > + * commonized MTK clocks probe function(s) by adding a dummy clock at > + * the beginning where needed. > + */ > +#define CLK_DUMMY 0 > + > +extern const struct clk_ops mtk_clk_dummy_ops; > +extern const struct mtk_gate_regs cg_regs_dummy; > + > +#define GATE_DUMMY(_id, _name) { \ > + .id = _id, \ > + .name = _name, \ > + .regs = &cg_regs_dummy, \ > + .ops = &mtk_clk_dummy_ops, \ > + } > + > struct mtk_fixed_clk { > int id; > const char *name; > -- > 2.39.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-12-30 5:19 UTC|newest] Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-12-23 9:42 [PATCH v2 00/23] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 01/23] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:55 ` Chen-Yu Tsai 2022-12-26 6:55 ` Chen-Yu Tsai 2023-01-04 10:55 ` Markus Schneider-Pargmann 2023-01-04 10:55 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 02/23] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-26 6:56 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:05 ` Chen-Yu Tsai 2022-12-26 7:05 ` Chen-Yu Tsai 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-04 11:21 ` Markus Schneider-Pargmann 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2023-01-10 11:05 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 04/23] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-26 7:07 ` Chen-Yu Tsai 2022-12-26 7:07 ` Chen-Yu Tsai 2023-01-06 17:00 ` Markus Schneider-Pargmann 2023-01-06 17:00 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 05/23] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:37 ` Chen-Yu Tsai 2022-12-30 4:37 ` Chen-Yu Tsai 2023-01-06 17:09 ` Markus Schneider-Pargmann 2023-01-06 17:09 ` Markus Schneider-Pargmann 2022-12-23 9:42 ` [PATCH v2 06/23] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-30 4:43 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:24 ` Miles Chen 2022-12-28 7:24 ` Miles Chen 2022-12-30 5:19 ` Chen-Yu Tsai [this message] 2022-12-30 5:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 08/23] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-30 8:22 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 09/23] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 4:58 ` Chen-Yu Tsai 2022-12-30 4:58 ` Chen-Yu Tsai 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-10 12:32 ` AngeloGioacchino Del Regno 2023-01-11 2:27 ` Chen-Yu Tsai 2023-01-11 2:27 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-24 1:47 ` kernel test robot 2022-12-23 9:42 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:50 ` Miles Chen 2022-12-28 7:50 ` Miles Chen 2022-12-30 5:12 ` Chen-Yu Tsai 2022-12-30 5:12 ` Chen-Yu Tsai 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-10 13:31 ` AngeloGioacchino Del Regno 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 2:47 ` Chen-Yu Tsai 2023-01-11 8:56 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() Miles Chen 2023-01-11 8:56 ` Miles Chen 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2023-01-11 10:36 ` AngeloGioacchino Del Regno 2022-12-23 9:42 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:22 ` Miles Chen 2022-12-27 16:22 ` Miles Chen 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-30 7:14 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 13/23] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:54 ` Miles Chen 2022-12-28 7:54 ` Miles Chen 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-30 7:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 7:58 ` Miles Chen 2022-12-28 7:58 ` Miles Chen 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-30 5:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-28 8:31 ` Miles Chen 2022-12-28 8:31 ` Miles Chen 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:09 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-30 8:06 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 16/23] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-30 8:17 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-30 8:19 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 18/23] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-29 8:21 ` Miles Chen 2022-12-29 8:21 ` Miles Chen 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-30 8:12 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 19/23] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-30 8:18 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 20/23] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:55 ` Miles Chen 2022-12-30 5:55 ` Miles Chen 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-30 8:15 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 21/23] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:56 ` Miles Chen 2022-12-30 5:56 ` Miles Chen 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-30 8:13 ` Chen-Yu Tsai 2022-12-23 9:42 ` [PATCH v2 22/23] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 5:23 ` Chen-Yu Tsai 2022-12-30 6:04 ` Miles Chen 2022-12-30 6:04 ` Miles Chen 2022-12-23 9:42 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno 2022-12-23 9:42 ` AngeloGioacchino Del Regno 2022-12-27 16:18 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Miles Chen 2022-12-27 16:18 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-27 16:26 ` Miles Chen 2022-12-30 6:05 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() Miles Chen 2022-12-30 6:05 ` Miles Chen 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 8:14 ` Chen-Yu Tsai 2022-12-30 6:13 ` [PATCH v2 00/23] MediaTek clocks cleanups and improvements Miles Chen 2022-12-30 6:13 ` Miles Chen 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 6:42 ` Chen-Yu Tsai 2022-12-30 7:19 ` Miles Chen 2022-12-30 7:19 ` Miles Chen 2023-01-03 9:36 ` Chen-Yu Tsai 2023-01-03 9:36 ` Chen-Yu Tsai 2022-12-23 20:33 [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build kernel test robot 2022-12-24 7:13 ` Dan Carpenter 2022-12-24 7:13 ` Dan Carpenter
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