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From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@collabora.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	matthias.bgg@gmail.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, johnson.wang@mediatek.com,
	miles.chen@mediatek.com, fparent@baylibre.com,
	chun-jie.chen@mediatek.com, sam.shih@mediatek.com,
	y.oudjana@protonmail.com, nfraprado@collabora.com,
	rex-bc.chen@mediatek.com, ryder.lee@kernel.org,
	daniel@makrotopia.org, jose.exposito89@gmail.com,
	yangyingliang@huawei.com, pablo.sun@mediatek.com,
	msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible
Date: Tue, 10 Jan 2023 14:31:40 +0100	[thread overview]
Message-ID: <cba61b03-7e54-09e2-b1bd-8352f583a81b@collabora.com> (raw)
In-Reply-To: <CAGXv+5GYk2wr-UnnshT3R2uDUSn7-i5KifyJ4qDDZbptSQ9G7A@mail.gmail.com>

Il 30/12/22 06:12, Chen-Yu Tsai ha scritto:
> On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> mtk_clk_simple_probe() is a function that registers mtk gate clocks
>> and, if reset data is present, a reset controller and across all of
>> the MTK clock drivers, such a function is duplicated many times:
>> switch to the common mtk_clk_simple_probe() function for all of the
>> clock drivers that are registering as platform drivers.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   drivers/clk/mediatek/clk-mt2701-aud.c   | 26 +++----
>>   drivers/clk/mediatek/clk-mt2701-eth.c   | 34 +++------
>>   drivers/clk/mediatek/clk-mt2701-g3d.c   | 56 +++-----------
>>   drivers/clk/mediatek/clk-mt2701-hif.c   | 36 +++------
>>   drivers/clk/mediatek/clk-mt2712.c       | 83 ++++++++-------------
>>   drivers/clk/mediatek/clk-mt6779.c       | 42 ++++++-----
>>   drivers/clk/mediatek/clk-mt7622-aud.c   | 49 +++----------
>>   drivers/clk/mediatek/clk-mt7622-eth.c   | 82 ++++-----------------
>>   drivers/clk/mediatek/clk-mt7622-hif.c   | 85 ++++-----------------
>>   drivers/clk/mediatek/clk-mt7629-hif.c   | 85 ++++-----------------
>>   drivers/clk/mediatek/clk-mt8183-audio.c | 19 +++--
>>   drivers/clk/mediatek/clk-mt8183.c       | 75 ++++++++-----------
>>   drivers/clk/mediatek/clk-mt8192-aud.c   | 25 +++----
>>   drivers/clk/mediatek/clk-mt8192.c       | 98 ++++++++-----------------
>>   14 files changed, 236 insertions(+), 559 deletions(-)
> 
> This looks mostly good, however ...
> 
>> diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c
>> index ab13ab618fb5..1fd6d96b34dc 100644
>> --- a/drivers/clk/mediatek/clk-mt2701-aud.c
>> +++ b/drivers/clk/mediatek/clk-mt2701-aud.c
>> @@ -76,6 +76,7 @@ static const struct mtk_gate_regs audio3_cg_regs = {
>>   };
>>
>>   static const struct mtk_gate audio_clks[] = {
>> +       GATE_DUMMY(CLK_DUMMY, "aud_dummy"),
>>          /* AUDIO0 */
>>          GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2),
>>          GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20),
>> @@ -138,29 +139,26 @@ static const struct mtk_gate audio_clks[] = {
>>          GATE_AUDIO3(CLK_AUD_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14),
>>   };
>>
>> +static const struct mtk_clk_desc audio_desc = {
>> +       .clks = audio_clks,
>> +       .num_clks = ARRAY_SIZE(audio_clks),
>> +};
>> +
>>   static const struct of_device_id of_match_clk_mt2701_aud[] = {
>> -       { .compatible = "mediatek,mt2701-audsys", },
>> -       {}
>> +       { .compatible = "mediatek,mt2701-audsys", .data = &audio_desc },
>> +       { /* sentinel */ }
>>   };
>>
>>   static int clk_mt2701_aud_probe(struct platform_device *pdev)
>>   {
>> -       struct clk_hw_onecell_data *clk_data;
>> -       struct device_node *node = pdev->dev.of_node;
>>          int r;
>>
>> -       clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
>> -
>> -       mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
>> -                              clk_data, &pdev->dev);
>> -
>> -       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
>> +       r = mtk_clk_simple_probe(pdev);
>>          if (r) {
>>                  dev_err(&pdev->dev,
>>                          "could not register clock provider: %s: %d\n",
>>                          pdev->name, r);
>> -
>> -               goto err_clk_provider;
>> +               return r;
>>          }
>>
>>          r = devm_of_platform_populate(&pdev->dev);
>> @@ -170,13 +168,13 @@ static int clk_mt2701_aud_probe(struct platform_device *pdev)
>>          return 0;
>>
>>   err_plat_populate:
>> -       of_clk_del_provider(node);
>> -err_clk_provider:
>> +       mtk_clk_simple_remove(pdev);
>>          return r;
>>   }
>>
>>   static struct platform_driver clk_mt2701_aud_drv = {
>>          .probe = clk_mt2701_aud_probe,
>> +       .remove = mtk_clk_simple_remove,
> 
> I'm not a big fan of mixing devres and non-devres teardown code. Automatic
> devres teardown happens after the remove callback returns, so in this
> case you could have child devices being unregistered that touch clocks
> or resets that have already been unregistered and freed in the remove
> callback.
> 

I'll add a custom remove function that calls of_platform_depopulate() and
tears everything down manually in the correct order.

Thanks for catching this one, I didn't notice at all!

>>          .driver = {
>>                  .name = "clk-mt2701-aud",
>>                  .of_match_table = of_match_clk_mt2701_aud,
> 
> [...]
> 
>> --- a/drivers/clk/mediatek/clk-mt2712.c
>> +++ b/drivers/clk/mediatek/clk-mt2712.c
> 
> [...]
> 
>> @@ -1482,7 +1459,11 @@ static struct platform_driver clk_mt2712_drv = {
>>
>>   static int __init clk_mt2712_init(void)
>>   {
>> -       return platform_driver_register(&clk_mt2712_drv);
>> +       int ret = platform_driver_register(&clk_mt2712_drv);
>> +
>> +       if (ret)
>> +               return ret;
>> +       return platform_driver_register(&clk_mt2712_simple_drv);
>>   }
>>
>>   arch_initcall(clk_mt2712_init);
> 
> Would this get cleaned up even more? I.e. have just one driver left and
> we could have the nice *_platform_driver() macros.
> 

In the future, yes - granted that I find someone that can help with the testing,
as I don't have any MT2712 hardware here.

Not in this series though (please!).

Cheers,
Angelo


WARNING: multiple messages have this Message-ID (diff)
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Chen-Yu Tsai <wenst@chromium.org>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
	matthias.bgg@gmail.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, johnson.wang@mediatek.com,
	miles.chen@mediatek.com, fparent@baylibre.com,
	chun-jie.chen@mediatek.com, sam.shih@mediatek.com,
	y.oudjana@protonmail.com, nfraprado@collabora.com,
	rex-bc.chen@mediatek.com, ryder.lee@kernel.org,
	daniel@makrotopia.org, jose.exposito89@gmail.com,
	yangyingliang@huawei.com, pablo.sun@mediatek.com,
	msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
	kernel@collabora.com
Subject: Re: [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible
Date: Tue, 10 Jan 2023 14:31:40 +0100	[thread overview]
Message-ID: <cba61b03-7e54-09e2-b1bd-8352f583a81b@collabora.com> (raw)
In-Reply-To: <CAGXv+5GYk2wr-UnnshT3R2uDUSn7-i5KifyJ4qDDZbptSQ9G7A@mail.gmail.com>

Il 30/12/22 06:12, Chen-Yu Tsai ha scritto:
> On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> mtk_clk_simple_probe() is a function that registers mtk gate clocks
>> and, if reset data is present, a reset controller and across all of
>> the MTK clock drivers, such a function is duplicated many times:
>> switch to the common mtk_clk_simple_probe() function for all of the
>> clock drivers that are registering as platform drivers.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   drivers/clk/mediatek/clk-mt2701-aud.c   | 26 +++----
>>   drivers/clk/mediatek/clk-mt2701-eth.c   | 34 +++------
>>   drivers/clk/mediatek/clk-mt2701-g3d.c   | 56 +++-----------
>>   drivers/clk/mediatek/clk-mt2701-hif.c   | 36 +++------
>>   drivers/clk/mediatek/clk-mt2712.c       | 83 ++++++++-------------
>>   drivers/clk/mediatek/clk-mt6779.c       | 42 ++++++-----
>>   drivers/clk/mediatek/clk-mt7622-aud.c   | 49 +++----------
>>   drivers/clk/mediatek/clk-mt7622-eth.c   | 82 ++++-----------------
>>   drivers/clk/mediatek/clk-mt7622-hif.c   | 85 ++++-----------------
>>   drivers/clk/mediatek/clk-mt7629-hif.c   | 85 ++++-----------------
>>   drivers/clk/mediatek/clk-mt8183-audio.c | 19 +++--
>>   drivers/clk/mediatek/clk-mt8183.c       | 75 ++++++++-----------
>>   drivers/clk/mediatek/clk-mt8192-aud.c   | 25 +++----
>>   drivers/clk/mediatek/clk-mt8192.c       | 98 ++++++++-----------------
>>   14 files changed, 236 insertions(+), 559 deletions(-)
> 
> This looks mostly good, however ...
> 
>> diff --git a/drivers/clk/mediatek/clk-mt2701-aud.c b/drivers/clk/mediatek/clk-mt2701-aud.c
>> index ab13ab618fb5..1fd6d96b34dc 100644
>> --- a/drivers/clk/mediatek/clk-mt2701-aud.c
>> +++ b/drivers/clk/mediatek/clk-mt2701-aud.c
>> @@ -76,6 +76,7 @@ static const struct mtk_gate_regs audio3_cg_regs = {
>>   };
>>
>>   static const struct mtk_gate audio_clks[] = {
>> +       GATE_DUMMY(CLK_DUMMY, "aud_dummy"),
>>          /* AUDIO0 */
>>          GATE_AUDIO0(CLK_AUD_AFE, "audio_afe", "aud_intbus_sel", 2),
>>          GATE_AUDIO0(CLK_AUD_HDMI, "audio_hdmi", "audpll_sel", 20),
>> @@ -138,29 +139,26 @@ static const struct mtk_gate audio_clks[] = {
>>          GATE_AUDIO3(CLK_AUD_MEM_ASRC5, "audio_mem_asrc5", "asm_h_sel", 14),
>>   };
>>
>> +static const struct mtk_clk_desc audio_desc = {
>> +       .clks = audio_clks,
>> +       .num_clks = ARRAY_SIZE(audio_clks),
>> +};
>> +
>>   static const struct of_device_id of_match_clk_mt2701_aud[] = {
>> -       { .compatible = "mediatek,mt2701-audsys", },
>> -       {}
>> +       { .compatible = "mediatek,mt2701-audsys", .data = &audio_desc },
>> +       { /* sentinel */ }
>>   };
>>
>>   static int clk_mt2701_aud_probe(struct platform_device *pdev)
>>   {
>> -       struct clk_hw_onecell_data *clk_data;
>> -       struct device_node *node = pdev->dev.of_node;
>>          int r;
>>
>> -       clk_data = mtk_alloc_clk_data(CLK_AUD_NR);
>> -
>> -       mtk_clk_register_gates(node, audio_clks, ARRAY_SIZE(audio_clks),
>> -                              clk_data, &pdev->dev);
>> -
>> -       r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
>> +       r = mtk_clk_simple_probe(pdev);
>>          if (r) {
>>                  dev_err(&pdev->dev,
>>                          "could not register clock provider: %s: %d\n",
>>                          pdev->name, r);
>> -
>> -               goto err_clk_provider;
>> +               return r;
>>          }
>>
>>          r = devm_of_platform_populate(&pdev->dev);
>> @@ -170,13 +168,13 @@ static int clk_mt2701_aud_probe(struct platform_device *pdev)
>>          return 0;
>>
>>   err_plat_populate:
>> -       of_clk_del_provider(node);
>> -err_clk_provider:
>> +       mtk_clk_simple_remove(pdev);
>>          return r;
>>   }
>>
>>   static struct platform_driver clk_mt2701_aud_drv = {
>>          .probe = clk_mt2701_aud_probe,
>> +       .remove = mtk_clk_simple_remove,
> 
> I'm not a big fan of mixing devres and non-devres teardown code. Automatic
> devres teardown happens after the remove callback returns, so in this
> case you could have child devices being unregistered that touch clocks
> or resets that have already been unregistered and freed in the remove
> callback.
> 

I'll add a custom remove function that calls of_platform_depopulate() and
tears everything down manually in the correct order.

Thanks for catching this one, I didn't notice at all!

>>          .driver = {
>>                  .name = "clk-mt2701-aud",
>>                  .of_match_table = of_match_clk_mt2701_aud,
> 
> [...]
> 
>> --- a/drivers/clk/mediatek/clk-mt2712.c
>> +++ b/drivers/clk/mediatek/clk-mt2712.c
> 
> [...]
> 
>> @@ -1482,7 +1459,11 @@ static struct platform_driver clk_mt2712_drv = {
>>
>>   static int __init clk_mt2712_init(void)
>>   {
>> -       return platform_driver_register(&clk_mt2712_drv);
>> +       int ret = platform_driver_register(&clk_mt2712_drv);
>> +
>> +       if (ret)
>> +               return ret;
>> +       return platform_driver_register(&clk_mt2712_simple_drv);
>>   }
>>
>>   arch_initcall(clk_mt2712_init);
> 
> Would this get cleaned up even more? I.e. have just one driver left and
> we could have the nice *_platform_driver() macros.
> 

In the future, yes - granted that I find someone that can help with the testing,
as I don't have any MT2712 hardware here.

Not in this series though (please!).

Cheers,
Angelo


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-01-10 13:32 UTC|newest]

Thread overview: 154+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-23  9:42 [PATCH v2 00/23] MediaTek clocks cleanups and improvements AngeloGioacchino Del Regno
2022-12-23  9:42 ` AngeloGioacchino Del Regno
2022-12-23  9:42 ` [PATCH v2 01/23] clk: mediatek: mt8192: Correctly unregister and free clocks on failure AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-26  6:55   ` Chen-Yu Tsai
2022-12-26  6:55     ` Chen-Yu Tsai
2023-01-04 10:55   ` Markus Schneider-Pargmann
2023-01-04 10:55     ` Markus Schneider-Pargmann
2022-12-23  9:42 ` [PATCH v2 02/23] clk: mediatek: mt8192: Propagate struct device for gate clocks AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-26  6:56   ` Chen-Yu Tsai
2022-12-26  6:56     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 03/23] clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-26  7:05   ` Chen-Yu Tsai
2022-12-26  7:05     ` Chen-Yu Tsai
2023-01-04 11:21   ` Markus Schneider-Pargmann
2023-01-04 11:21     ` Markus Schneider-Pargmann
2023-01-10 11:05     ` AngeloGioacchino Del Regno
2023-01-10 11:05       ` AngeloGioacchino Del Regno
2022-12-23  9:42 ` [PATCH v2 04/23] clk: mediatek: cpumux: Propagate struct device where possible AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-26  7:07   ` Chen-Yu Tsai
2022-12-26  7:07     ` Chen-Yu Tsai
2023-01-06 17:00     ` Markus Schneider-Pargmann
2023-01-06 17:00       ` Markus Schneider-Pargmann
2022-12-23  9:42 ` [PATCH v2 05/23] clk: mediatek: clk-mtk: Propagate struct device for composites AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  4:37   ` Chen-Yu Tsai
2022-12-30  4:37     ` Chen-Yu Tsai
2023-01-06 17:09   ` Markus Schneider-Pargmann
2023-01-06 17:09     ` Markus Schneider-Pargmann
2022-12-23  9:42 ` [PATCH v2 06/23] clk: mediatek: clk-mux: Propagate struct device for mtk-mux AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  4:43   ` Chen-Yu Tsai
2022-12-30  4:43     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-28  7:24   ` Miles Chen
2022-12-28  7:24     ` Miles Chen
2022-12-30  5:19   ` Chen-Yu Tsai
2022-12-30  5:19     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 08/23] clk: mediatek: mt8173: Migrate to platform driver and common probe AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  8:22   ` Chen-Yu Tsai
2022-12-30  8:22     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 09/23] clk: mediatek: mt8173: Remove mtk_clk_enable_critical() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  4:58   ` Chen-Yu Tsai
2022-12-30  4:58     ` Chen-Yu Tsai
2023-01-10 12:32     ` AngeloGioacchino Del Regno
2023-01-10 12:32       ` AngeloGioacchino Del Regno
2023-01-11  2:27       ` Chen-Yu Tsai
2023-01-11  2:27         ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-24  1:47   ` kernel test robot
2022-12-23  9:42 ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() where possible AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-28  7:50   ` Miles Chen
2022-12-28  7:50     ` Miles Chen
2022-12-30  5:12   ` Chen-Yu Tsai
2022-12-30  5:12     ` Chen-Yu Tsai
2023-01-10 13:31     ` AngeloGioacchino Del Regno [this message]
2023-01-10 13:31       ` AngeloGioacchino Del Regno
2023-01-11  2:47       ` Chen-Yu Tsai
2023-01-11  2:47         ` Chen-Yu Tsai
2023-01-11  8:56         ` [PATCH v2 11/23] clk: mediatek: Switch to mtk_clk_simple_probe() Miles Chen
2023-01-11  8:56           ` Miles Chen
2023-01-11 10:36           ` AngeloGioacchino Del Regno
2023-01-11 10:36             ` AngeloGioacchino Del Regno
2022-12-23  9:42 ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-27 16:22   ` Miles Chen
2022-12-27 16:22     ` Miles Chen
2022-12-30  7:14   ` Chen-Yu Tsai
2022-12-30  7:14     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 13/23] clk: mediatek: mt8173: Migrate pericfg/topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-28  7:54   ` Miles Chen
2022-12-28  7:54     ` Miles Chen
2022-12-30  7:15   ` Chen-Yu Tsai
2022-12-30  7:15     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-28  7:58   ` Miles Chen
2022-12-28  7:58     ` Miles Chen
2022-12-30  5:17   ` Chen-Yu Tsai
2022-12-30  5:17     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-28  8:31   ` Miles Chen
2022-12-28  8:31     ` Miles Chen
2022-12-30  8:09     ` Chen-Yu Tsai
2022-12-30  8:09       ` Chen-Yu Tsai
2022-12-30  8:06   ` Chen-Yu Tsai
2022-12-30  8:06     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 16/23] clk: mediatek: mt8186: Join top_adj_div " AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  8:17   ` Chen-Yu Tsai
2022-12-30  8:17     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 17/23] clk: mediatek: clk-mt8183: Join top_aud_muxes and top_aud_divs AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  8:19   ` Chen-Yu Tsai
2022-12-30  8:19     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 18/23] clk: mediatek: clk-mtk: Register MFG notifier in mtk_clk_simple_probe() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-29  8:21   ` Miles Chen
2022-12-29  8:21     ` Miles Chen
2022-12-30  8:12     ` Chen-Yu Tsai
2022-12-30  8:12       ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 19/23] clk: mediatek: clk-mt8192: Migrate topckgen to mtk_clk_simple_probe() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  8:18   ` Chen-Yu Tsai
2022-12-30  8:18     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 20/23] clk: mediatek: clk-mt8186-topckgen: Migrate " AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  5:55   ` Miles Chen
2022-12-30  5:55     ` Miles Chen
2022-12-30  8:15   ` Chen-Yu Tsai
2022-12-30  8:15     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 21/23] clk: mediatek: clk-mt6795-topckgen: " AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  5:56   ` Miles Chen
2022-12-30  5:56     ` Miles Chen
2022-12-30  8:13   ` Chen-Yu Tsai
2022-12-30  8:13     ` Chen-Yu Tsai
2022-12-23  9:42 ` [PATCH v2 22/23] clk: mediatek: clk-mt7986-topckgen: Properly keep some clocks enabled AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-30  5:23   ` Chen-Yu Tsai
2022-12-30  5:23     ` Chen-Yu Tsai
2022-12-30  6:04   ` Miles Chen
2022-12-30  6:04     ` Miles Chen
2022-12-23  9:42 ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() AngeloGioacchino Del Regno
2022-12-23  9:42   ` AngeloGioacchino Del Regno
2022-12-27 16:18   ` [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() Miles Chen
2022-12-27 16:18     ` Miles Chen
2022-12-27 16:26     ` Miles Chen
2022-12-27 16:26       ` Miles Chen
2022-12-30  6:05   ` [PATCH v2 23/23] clk: mediatek: clk-mt7986-topckgen: Migrate to mtk_clk_simple_probe() Miles Chen
2022-12-30  6:05     ` Miles Chen
2022-12-30  8:14   ` Chen-Yu Tsai
2022-12-30  8:14     ` Chen-Yu Tsai
2022-12-30  6:13 ` [PATCH v2 00/23] MediaTek clocks cleanups and improvements Miles Chen
2022-12-30  6:13   ` Miles Chen
2022-12-30  6:42   ` Chen-Yu Tsai
2022-12-30  6:42     ` Chen-Yu Tsai
2022-12-30  7:19     ` Miles Chen
2022-12-30  7:19       ` Miles Chen
2023-01-03  9:36 ` Chen-Yu Tsai
2023-01-03  9:36   ` Chen-Yu Tsai
2022-12-23 20:33 [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build kernel test robot
2022-12-24  7:13 ` Dan Carpenter
2022-12-24  7:13 ` Dan Carpenter

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