From: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Akhil P Oommen <quic_akhilpo@quicinc.com>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark <robdclark@chromium.org>, Marijn Suijten <marijn.suijten@somainline.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH v8 02/18] dt-bindings: display/msm/gmu: Add GMU wrapper Date: Mon, 29 May 2023 15:52:21 +0200 [thread overview] Message-ID: <20230223-topic-gmuwrapper-v8-2-69c68206609e@linaro.org> (raw) In-Reply-To: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks we'd normally assign to the GMU as if they were a part of the GMU, even though they are not". It's a (good) software representation of the GMU_CX and GMU_GX register spaces within the GPUSS that helps us programatically treat these de-facto GMU-less parts in a way that's very similar to their GMU-equipped cousins, massively saving up on code duplication. The "wrapper" register space was specifically designed to mimic the layout of a real GMU, though it rather obviously does not have the M3 core et al. To sum it all up, the GMU wrapper is essentially a register space within the GPU, which Linux sees as a dumbed-down regular GMU: there's no clocks, interrupts, multiple reg spaces, iommus and OPP. Document it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- .../devicetree/bindings/display/msm/gmu.yaml | 50 ++++++++++++++++------ 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index f31a26305ca9..5fc4106110ad 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -19,16 +19,18 @@ description: | properties: compatible: - items: - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' - - const: qcom,adreno-gmu + oneOf: + - items: + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' + - const: qcom,adreno-gmu + - const: qcom,adreno-gmu-wrapper reg: - minItems: 3 + minItems: 1 maxItems: 4 reg-names: - minItems: 3 + minItems: 1 maxItems: 4 clocks: @@ -44,7 +46,6 @@ properties: - description: GMU HFI interrupt - description: GMU interrupt - interrupt-names: items: - const: hfi @@ -72,14 +73,8 @@ required: - compatible - reg - reg-names - - clocks - - clock-names - - interrupts - - interrupt-names - power-domains - power-domain-names - - iommus - - operating-points-v2 additionalProperties: false @@ -218,6 +213,28 @@ allOf: - const: axi - const: memnoc + - if: + properties: + compatible: + contains: + const: qcom,adreno-gmu-wrapper + then: + properties: + reg: + items: + - description: GMU wrapper register space + reg-names: + items: + - const: gmu + else: + required: + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - operating-points-v2 + examples: - | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> @@ -250,3 +267,12 @@ examples: iommus = <&adreno_smmu 5>; operating-points-v2 = <&gmu_opp_table>; }; + + gmu_wrapper: gmu@596a000 { + compatible = "qcom,adreno-gmu-wrapper"; + reg = <0x0596a000 0x30000>; + reg-names = "gmu"; + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + }; -- 2.40.1
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Akhil P Oommen <quic_akhilpo@quicinc.com>, Conor Dooley <conor+dt@kernel.org> Cc: Rob Clark <robdclark@chromium.org>, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Marijn Suijten <marijn.suijten@somainline.org>, freedreno@lists.freedesktop.org Subject: [PATCH v8 02/18] dt-bindings: display/msm/gmu: Add GMU wrapper Date: Mon, 29 May 2023 15:52:21 +0200 [thread overview] Message-ID: <20230223-topic-gmuwrapper-v8-2-69c68206609e@linaro.org> (raw) In-Reply-To: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks we'd normally assign to the GMU as if they were a part of the GMU, even though they are not". It's a (good) software representation of the GMU_CX and GMU_GX register spaces within the GPUSS that helps us programatically treat these de-facto GMU-less parts in a way that's very similar to their GMU-equipped cousins, massively saving up on code duplication. The "wrapper" register space was specifically designed to mimic the layout of a real GMU, though it rather obviously does not have the M3 core et al. To sum it all up, the GMU wrapper is essentially a register space within the GPU, which Linux sees as a dumbed-down regular GMU: there's no clocks, interrupts, multiple reg spaces, iommus and OPP. Document it. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- .../devicetree/bindings/display/msm/gmu.yaml | 50 ++++++++++++++++------ 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index f31a26305ca9..5fc4106110ad 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -19,16 +19,18 @@ description: | properties: compatible: - items: - - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' - - const: qcom,adreno-gmu + oneOf: + - items: + - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$' + - const: qcom,adreno-gmu + - const: qcom,adreno-gmu-wrapper reg: - minItems: 3 + minItems: 1 maxItems: 4 reg-names: - minItems: 3 + minItems: 1 maxItems: 4 clocks: @@ -44,7 +46,6 @@ properties: - description: GMU HFI interrupt - description: GMU interrupt - interrupt-names: items: - const: hfi @@ -72,14 +73,8 @@ required: - compatible - reg - reg-names - - clocks - - clock-names - - interrupts - - interrupt-names - power-domains - power-domain-names - - iommus - - operating-points-v2 additionalProperties: false @@ -218,6 +213,28 @@ allOf: - const: axi - const: memnoc + - if: + properties: + compatible: + contains: + const: qcom,adreno-gmu-wrapper + then: + properties: + reg: + items: + - description: GMU wrapper register space + reg-names: + items: + - const: gmu + else: + required: + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - operating-points-v2 + examples: - | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> @@ -250,3 +267,12 @@ examples: iommus = <&adreno_smmu 5>; operating-points-v2 = <&gmu_opp_table>; }; + + gmu_wrapper: gmu@596a000 { + compatible = "qcom,adreno-gmu-wrapper"; + reg = <0x0596a000 0x30000>; + reg-names = "gmu"; + power-domains = <&gpucc GPU_CX_GDSC>, + <&gpucc GPU_GX_GDSC>; + power-domain-names = "cx", "gx"; + }; -- 2.40.1
next prev parent reply other threads:[~2023-05-29 13:52 UTC|newest] Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-29 13:52 [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 01/18] dt-bindings: display/msm: gpu: Document GMU wrapper-equipped A6xx Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-30 12:26 ` Krzysztof Kozlowski 2023-05-30 12:26 ` Krzysztof Kozlowski 2023-05-30 13:35 ` Konrad Dybcio 2023-05-30 13:35 ` Konrad Dybcio 2023-06-08 20:58 ` Rob Herring 2023-06-08 20:58 ` Rob Herring 2023-06-09 9:12 ` Konrad Dybcio 2023-06-09 9:12 ` Konrad Dybcio 2023-06-08 21:00 ` Rob Herring 2023-06-08 21:00 ` Rob Herring 2023-05-29 13:52 ` Konrad Dybcio [this message] 2023-05-29 13:52 ` [PATCH v8 02/18] dt-bindings: display/msm/gmu: Add GMU wrapper Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 03/18] drm/msm/a6xx: Remove static keyword from sptprac en/disable functions Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 04/18] drm/msm/a6xx: Move force keepalive vote removal to a6xx_gmu_force_off() Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:30 ` Akhil P Oommen 2023-06-06 15:30 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 05/18] drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpu Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:35 ` Akhil P Oommen 2023-06-06 15:35 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 06/18] drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions() Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 17:09 ` Akhil P Oommen 2023-06-06 17:09 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 07/18] drm/msm/a6xx: Add a helper for software-resetting the GPU Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 17:18 ` Akhil P Oommen 2023-06-06 17:18 ` Akhil P Oommen 2023-06-15 10:34 ` Konrad Dybcio 2023-06-15 10:34 ` Konrad Dybcio 2023-06-15 20:11 ` Akhil P Oommen 2023-06-15 20:11 ` Akhil P Oommen 2023-06-15 20:59 ` Konrad Dybcio 2023-06-15 20:59 ` Konrad Dybcio 2023-06-15 21:17 ` Akhil P Oommen 2023-06-15 21:17 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 08/18] drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 18:25 ` Akhil P Oommen 2023-06-09 18:25 ` Akhil P Oommen 2023-06-09 18:35 ` Konrad Dybcio 2023-06-09 18:35 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 09/18] drm/msm/a6xx: Extend and explain UBWC config Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 18:41 ` Akhil P Oommen 2023-06-09 18:41 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 10/18] drm/msm/a6xx: Introduce GMU wrapper support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 22:06 ` Akhil P Oommen 2023-06-09 22:06 ` Akhil P Oommen 2023-06-15 21:43 ` Konrad Dybcio 2023-06-15 21:43 ` Konrad Dybcio 2023-06-16 17:54 ` [Freedreno] " Akhil P Oommen 2023-06-16 17:54 ` Akhil P Oommen 2023-06-17 0:00 ` Konrad Dybcio 2023-06-17 0:00 ` Konrad Dybcio 2023-06-17 16:07 ` Akhil P Oommen 2023-06-17 16:07 ` Akhil P Oommen 2023-06-19 13:10 ` Konrad Dybcio 2023-06-19 13:10 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 11/18] drm/msm/adreno: Disable has_cached_coherent in GMU wrapper configurations Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:39 ` [Freedreno] " Akhil P Oommen 2023-06-06 15:39 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 12/18] drm/msm/a6xx: Add support for A619_holi Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 13/18] drm/msm/a6xx: Add A610 support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:41 ` Akhil P Oommen 2023-06-14 19:41 ` Akhil P Oommen 2023-06-15 10:02 ` Konrad Dybcio 2023-06-15 10:02 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 14/18] drm/msm/a6xx: Fix some A619 tunables Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:44 ` Akhil P Oommen 2023-06-14 19:44 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 15/18] drm/msm/a6xx: Use "else if" in GPU speedbin rev matching Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:46 ` Akhil P Oommen 2023-06-14 19:46 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 16/18] drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matching Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:50 ` Akhil P Oommen 2023-06-14 19:50 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 17/18] drm/msm/a6xx: Add A619_holi speedbin support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 20:15 ` Akhil P Oommen 2023-06-14 20:15 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 18/18] drm/msm/a6xx: Add A610 " Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 20:18 ` Akhil P Oommen 2023-06-14 20:18 ` Akhil P Oommen 2023-06-15 10:04 ` Konrad Dybcio 2023-06-15 10:04 ` Konrad Dybcio 2023-05-31 12:14 ` [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio 2023-05-31 12:14 ` Konrad Dybcio
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