From: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Akhil P Oommen <quic_akhilpo@quicinc.com>, Conor Dooley <conor+dt@kernel.org> Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark <robdclark@chromium.org>, Marijn Suijten <marijn.suijten@somainline.org>, Konrad Dybcio <konrad.dybcio@linaro.org> Subject: [PATCH v8 07/18] drm/msm/a6xx: Add a helper for software-resetting the GPU Date: Mon, 29 May 2023 15:52:26 +0200 [thread overview] Message-ID: <20230223-topic-gmuwrapper-v8-7-69c68206609e@linaro.org> (raw) In-Reply-To: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> Introduce a6xx_gpu_sw_reset() in preparation for adding GMU wrapper GPUs and reuse it in a6xx_gmu_force_off(). This helper, contrary to the original usage in GMU code paths, adds a write memory barrier which together with the necessary delay should ensure that the reset is never deasserted too quickly due to e.g. OoO execution going crazy. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 3 +-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++++++++ drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index b86be123ecd0..5ba8cba69383 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -899,8 +899,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu) a6xx_bus_clear_pending_transactions(adreno_gpu, true); /* Reset GPU core blocks */ - gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, 1); - udelay(100); + a6xx_gpu_sw_reset(gpu, true); } static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index e3ac3f045665..083ccb5bcb4e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1634,6 +1634,17 @@ void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_ gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0); } +void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert) +{ + gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, assert); + /* Add a barrier to avoid bad surprises */ + mb(); + + /* The reset line needs to be asserted for at least 100 us */ + if (assert) + udelay(100); +} + static int a6xx_pm_resume(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index 9580def06d45..aa70390ee1c6 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -89,5 +89,6 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu); int a6xx_gpu_state_put(struct msm_gpu_state *state); void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_off); +void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert); #endif /* __A6XX_GPU_H__ */ -- 2.40.1
WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org> To: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@somainline.org>, Akhil P Oommen <quic_akhilpo@quicinc.com>, Conor Dooley <conor+dt@kernel.org> Cc: Rob Clark <robdclark@chromium.org>, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Marijn Suijten <marijn.suijten@somainline.org>, freedreno@lists.freedesktop.org Subject: [PATCH v8 07/18] drm/msm/a6xx: Add a helper for software-resetting the GPU Date: Mon, 29 May 2023 15:52:26 +0200 [thread overview] Message-ID: <20230223-topic-gmuwrapper-v8-7-69c68206609e@linaro.org> (raw) In-Reply-To: <20230223-topic-gmuwrapper-v8-0-69c68206609e@linaro.org> Introduce a6xx_gpu_sw_reset() in preparation for adding GMU wrapper GPUs and reuse it in a6xx_gmu_force_off(). This helper, contrary to the original usage in GMU code paths, adds a write memory barrier which together with the necessary delay should ensure that the reset is never deasserted too quickly due to e.g. OoO execution going crazy. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 3 +-- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++++++++++ drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 + 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index b86be123ecd0..5ba8cba69383 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -899,8 +899,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu) a6xx_bus_clear_pending_transactions(adreno_gpu, true); /* Reset GPU core blocks */ - gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, 1); - udelay(100); + a6xx_gpu_sw_reset(gpu, true); } static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index e3ac3f045665..083ccb5bcb4e 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1634,6 +1634,17 @@ void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_ gpu_write(gpu, REG_A6XX_GBIF_HALT, 0x0); } +void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert) +{ + gpu_write(gpu, REG_A6XX_RBBM_SW_RESET_CMD, assert); + /* Add a barrier to avoid bad surprises */ + mb(); + + /* The reset line needs to be asserted for at least 100 us */ + if (assert) + udelay(100); +} + static int a6xx_pm_resume(struct msm_gpu *gpu) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index 9580def06d45..aa70390ee1c6 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -89,5 +89,6 @@ struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu); int a6xx_gpu_state_put(struct msm_gpu_state *state); void a6xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_off); +void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert); #endif /* __A6XX_GPU_H__ */ -- 2.40.1
next prev parent reply other threads:[~2023-05-29 13:52 UTC|newest] Thread overview: 102+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-29 13:52 [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 01/18] dt-bindings: display/msm: gpu: Document GMU wrapper-equipped A6xx Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-30 12:26 ` Krzysztof Kozlowski 2023-05-30 12:26 ` Krzysztof Kozlowski 2023-05-30 13:35 ` Konrad Dybcio 2023-05-30 13:35 ` Konrad Dybcio 2023-06-08 20:58 ` Rob Herring 2023-06-08 20:58 ` Rob Herring 2023-06-09 9:12 ` Konrad Dybcio 2023-06-09 9:12 ` Konrad Dybcio 2023-06-08 21:00 ` Rob Herring 2023-06-08 21:00 ` Rob Herring 2023-05-29 13:52 ` [PATCH v8 02/18] dt-bindings: display/msm/gmu: Add GMU wrapper Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 03/18] drm/msm/a6xx: Remove static keyword from sptprac en/disable functions Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 04/18] drm/msm/a6xx: Move force keepalive vote removal to a6xx_gmu_force_off() Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:30 ` Akhil P Oommen 2023-06-06 15:30 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 05/18] drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpu Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:35 ` Akhil P Oommen 2023-06-06 15:35 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 06/18] drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions() Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 17:09 ` Akhil P Oommen 2023-06-06 17:09 ` Akhil P Oommen 2023-05-29 13:52 ` Konrad Dybcio [this message] 2023-05-29 13:52 ` [PATCH v8 07/18] drm/msm/a6xx: Add a helper for software-resetting the GPU Konrad Dybcio 2023-06-06 17:18 ` Akhil P Oommen 2023-06-06 17:18 ` Akhil P Oommen 2023-06-15 10:34 ` Konrad Dybcio 2023-06-15 10:34 ` Konrad Dybcio 2023-06-15 20:11 ` Akhil P Oommen 2023-06-15 20:11 ` Akhil P Oommen 2023-06-15 20:59 ` Konrad Dybcio 2023-06-15 20:59 ` Konrad Dybcio 2023-06-15 21:17 ` Akhil P Oommen 2023-06-15 21:17 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 08/18] drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 18:25 ` Akhil P Oommen 2023-06-09 18:25 ` Akhil P Oommen 2023-06-09 18:35 ` Konrad Dybcio 2023-06-09 18:35 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 09/18] drm/msm/a6xx: Extend and explain UBWC config Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 18:41 ` Akhil P Oommen 2023-06-09 18:41 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 10/18] drm/msm/a6xx: Introduce GMU wrapper support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-09 22:06 ` Akhil P Oommen 2023-06-09 22:06 ` Akhil P Oommen 2023-06-15 21:43 ` Konrad Dybcio 2023-06-15 21:43 ` Konrad Dybcio 2023-06-16 17:54 ` [Freedreno] " Akhil P Oommen 2023-06-16 17:54 ` Akhil P Oommen 2023-06-17 0:00 ` Konrad Dybcio 2023-06-17 0:00 ` Konrad Dybcio 2023-06-17 16:07 ` Akhil P Oommen 2023-06-17 16:07 ` Akhil P Oommen 2023-06-19 13:10 ` Konrad Dybcio 2023-06-19 13:10 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 11/18] drm/msm/adreno: Disable has_cached_coherent in GMU wrapper configurations Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-06 15:39 ` [Freedreno] " Akhil P Oommen 2023-06-06 15:39 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 12/18] drm/msm/a6xx: Add support for A619_holi Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 13/18] drm/msm/a6xx: Add A610 support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:41 ` Akhil P Oommen 2023-06-14 19:41 ` Akhil P Oommen 2023-06-15 10:02 ` Konrad Dybcio 2023-06-15 10:02 ` Konrad Dybcio 2023-05-29 13:52 ` [PATCH v8 14/18] drm/msm/a6xx: Fix some A619 tunables Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:44 ` Akhil P Oommen 2023-06-14 19:44 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 15/18] drm/msm/a6xx: Use "else if" in GPU speedbin rev matching Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:46 ` Akhil P Oommen 2023-06-14 19:46 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 16/18] drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matching Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 19:50 ` Akhil P Oommen 2023-06-14 19:50 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 17/18] drm/msm/a6xx: Add A619_holi speedbin support Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 20:15 ` Akhil P Oommen 2023-06-14 20:15 ` Akhil P Oommen 2023-05-29 13:52 ` [PATCH v8 18/18] drm/msm/a6xx: Add A610 " Konrad Dybcio 2023-05-29 13:52 ` Konrad Dybcio 2023-06-14 20:18 ` Akhil P Oommen 2023-06-14 20:18 ` Akhil P Oommen 2023-06-15 10:04 ` Konrad Dybcio 2023-06-15 10:04 ` Konrad Dybcio 2023-05-31 12:14 ` [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio 2023-05-31 12:14 ` Konrad Dybcio
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