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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc: Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Rob Clark <robdclark@chromium.org>,
	Marijn Suijten <marijn.suijten@somainline.org>
Subject: Re: [PATCH v8 18/18] drm/msm/a6xx: Add A610 speedbin support
Date: Thu, 15 Jun 2023 12:04:53 +0200	[thread overview]
Message-ID: <f0261f2a-76d9-fcbf-2a3e-edae14f77604@linaro.org> (raw)
In-Reply-To: <ab2yzsjp65t53wp5nytjuc7eb74zklkb6i342bc5edhm45j3qm@kpyq52is7tde>

On 14.06.2023 22:18, Akhil P Oommen wrote:
> On Mon, May 29, 2023 at 03:52:37PM +0200, Konrad Dybcio wrote:
>>
>> A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
>> (trinket) and SM6225 (khaje). Trinket does not support speed binning
>> (only a single SKU exists) and we don't yet support khaje upstream.
>> Hence, add a fuse mapping table for bengal to allow for per-chip
>> frequency limiting.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 +++++++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> index d046af5f6de2..c304fa118cff 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> @@ -2098,6 +2098,30 @@ static bool a6xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
>>  	return progress;
>>  }
>>  
>> +static u32 a610_get_speed_bin(u32 fuse)
>> +{
>> +	/*
>> +	 * There are (at least) three SoCs implementing A610: SM6125 (trinket),
>> +	 * SM6115 (bengal) and SM6225 (khaje). Trinket does not have speedbinning,
>> +	 * as only a single SKU exists and we don't support khaje upstream yet.
>> +	 * Hence, this matching table is only valid for bengal and can be easily
>> +	 * expanded if need be.
>> +	 */
>> +
>> +	if (fuse == 0)
>> +		return 0;
>> +	else if (fuse == 206)
>> +		return 1;
>> +	else if (fuse == 200)
>> +		return 2;
>> +	else if (fuse == 157)
>> +		return 3;
>> +	else if (fuse == 127)
>> +		return 4;
>> +
>> +	return UINT_MAX;
>> +}
>> +
>>  static u32 a618_get_speed_bin(u32 fuse)
>>  {
>>  	if (fuse == 0)
>> @@ -2195,6 +2219,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3
>>  {
>>  	u32 val = UINT_MAX;
>>  
>> +	if (adreno_is_a610(adreno_gpu))
>> +		val = a610_get_speed_bin(fuse);
>> +
> 
> Didn't you update here to convert to 'else if' in one of the earlier
> patches??
Right, missed this one!

Konrad
> 
> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
> 
> -Akhil.
>>  	if (adreno_is_a618(adreno_gpu))
>>  		val = a618_get_speed_bin(fuse);
>>  
>>
>> -- 
>> 2.40.1
>>

WARNING: multiple messages have this Message-ID (diff)
From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Akhil P Oommen <quic_akhilpo@quicinc.com>
Cc: Rob Clark <robdclark@chromium.org>,
	freedreno@lists.freedesktop.org,
	Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	devicetree@vger.kernel.org, Sean Paul <sean@poorly.run>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-msm@vger.kernel.org,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Marijn Suijten <marijn.suijten@somainline.org>
Subject: Re: [PATCH v8 18/18] drm/msm/a6xx: Add A610 speedbin support
Date: Thu, 15 Jun 2023 12:04:53 +0200	[thread overview]
Message-ID: <f0261f2a-76d9-fcbf-2a3e-edae14f77604@linaro.org> (raw)
In-Reply-To: <ab2yzsjp65t53wp5nytjuc7eb74zklkb6i342bc5edhm45j3qm@kpyq52is7tde>

On 14.06.2023 22:18, Akhil P Oommen wrote:
> On Mon, May 29, 2023 at 03:52:37PM +0200, Konrad Dybcio wrote:
>>
>> A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
>> (trinket) and SM6225 (khaje). Trinket does not support speed binning
>> (only a single SKU exists) and we don't yet support khaje upstream.
>> Hence, add a fuse mapping table for bengal to allow for per-chip
>> frequency limiting.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>  drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 27 +++++++++++++++++++++++++++
>>  1 file changed, 27 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> index d046af5f6de2..c304fa118cff 100644
>> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
>> @@ -2098,6 +2098,30 @@ static bool a6xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
>>  	return progress;
>>  }
>>  
>> +static u32 a610_get_speed_bin(u32 fuse)
>> +{
>> +	/*
>> +	 * There are (at least) three SoCs implementing A610: SM6125 (trinket),
>> +	 * SM6115 (bengal) and SM6225 (khaje). Trinket does not have speedbinning,
>> +	 * as only a single SKU exists and we don't support khaje upstream yet.
>> +	 * Hence, this matching table is only valid for bengal and can be easily
>> +	 * expanded if need be.
>> +	 */
>> +
>> +	if (fuse == 0)
>> +		return 0;
>> +	else if (fuse == 206)
>> +		return 1;
>> +	else if (fuse == 200)
>> +		return 2;
>> +	else if (fuse == 157)
>> +		return 3;
>> +	else if (fuse == 127)
>> +		return 4;
>> +
>> +	return UINT_MAX;
>> +}
>> +
>>  static u32 a618_get_speed_bin(u32 fuse)
>>  {
>>  	if (fuse == 0)
>> @@ -2195,6 +2219,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3
>>  {
>>  	u32 val = UINT_MAX;
>>  
>> +	if (adreno_is_a610(adreno_gpu))
>> +		val = a610_get_speed_bin(fuse);
>> +
> 
> Didn't you update here to convert to 'else if' in one of the earlier
> patches??
Right, missed this one!

Konrad
> 
> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
> 
> -Akhil.
>>  	if (adreno_is_a618(adreno_gpu))
>>  		val = a618_get_speed_bin(fuse);
>>  
>>
>> -- 
>> 2.40.1
>>

  reply	other threads:[~2023-06-15 10:05 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-29 13:52 [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio
2023-05-29 13:52 ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 01/18] dt-bindings: display/msm: gpu: Document GMU wrapper-equipped A6xx Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-05-30 12:26   ` Krzysztof Kozlowski
2023-05-30 12:26     ` Krzysztof Kozlowski
2023-05-30 13:35     ` Konrad Dybcio
2023-05-30 13:35       ` Konrad Dybcio
2023-06-08 20:58       ` Rob Herring
2023-06-08 20:58         ` Rob Herring
2023-06-09  9:12         ` Konrad Dybcio
2023-06-09  9:12           ` Konrad Dybcio
2023-06-08 21:00   ` Rob Herring
2023-06-08 21:00     ` Rob Herring
2023-05-29 13:52 ` [PATCH v8 02/18] dt-bindings: display/msm/gmu: Add GMU wrapper Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 03/18] drm/msm/a6xx: Remove static keyword from sptprac en/disable functions Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 04/18] drm/msm/a6xx: Move force keepalive vote removal to a6xx_gmu_force_off() Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-06 15:30   ` Akhil P Oommen
2023-06-06 15:30     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 05/18] drm/msm/a6xx: Move a6xx_bus_clear_pending_transactions to a6xx_gpu Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-06 15:35   ` Akhil P Oommen
2023-06-06 15:35     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 06/18] drm/msm/a6xx: Improve a6xx_bus_clear_pending_transactions() Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-06 17:09   ` Akhil P Oommen
2023-06-06 17:09     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 07/18] drm/msm/a6xx: Add a helper for software-resetting the GPU Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-06 17:18   ` Akhil P Oommen
2023-06-06 17:18     ` Akhil P Oommen
2023-06-15 10:34     ` Konrad Dybcio
2023-06-15 10:34       ` Konrad Dybcio
2023-06-15 20:11       ` Akhil P Oommen
2023-06-15 20:11         ` Akhil P Oommen
2023-06-15 20:59         ` Konrad Dybcio
2023-06-15 20:59           ` Konrad Dybcio
2023-06-15 21:17           ` Akhil P Oommen
2023-06-15 21:17             ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 08/18] drm/msm/a6xx: Remove both GBIF and RBBM GBIF halt on hw init Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-09 18:25   ` Akhil P Oommen
2023-06-09 18:25     ` Akhil P Oommen
2023-06-09 18:35     ` Konrad Dybcio
2023-06-09 18:35       ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 09/18] drm/msm/a6xx: Extend and explain UBWC config Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-09 18:41   ` Akhil P Oommen
2023-06-09 18:41     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 10/18] drm/msm/a6xx: Introduce GMU wrapper support Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-09 22:06   ` Akhil P Oommen
2023-06-09 22:06     ` Akhil P Oommen
2023-06-15 21:43     ` Konrad Dybcio
2023-06-15 21:43       ` Konrad Dybcio
2023-06-16 17:54       ` [Freedreno] " Akhil P Oommen
2023-06-16 17:54         ` Akhil P Oommen
2023-06-17  0:00         ` Konrad Dybcio
2023-06-17  0:00           ` Konrad Dybcio
2023-06-17 16:07           ` Akhil P Oommen
2023-06-17 16:07             ` Akhil P Oommen
2023-06-19 13:10             ` Konrad Dybcio
2023-06-19 13:10               ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 11/18] drm/msm/adreno: Disable has_cached_coherent in GMU wrapper configurations Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-06 15:39   ` [Freedreno] " Akhil P Oommen
2023-06-06 15:39     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 12/18] drm/msm/a6xx: Add support for A619_holi Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 13/18] drm/msm/a6xx: Add A610 support Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 19:41   ` Akhil P Oommen
2023-06-14 19:41     ` Akhil P Oommen
2023-06-15 10:02     ` Konrad Dybcio
2023-06-15 10:02       ` Konrad Dybcio
2023-05-29 13:52 ` [PATCH v8 14/18] drm/msm/a6xx: Fix some A619 tunables Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 19:44   ` Akhil P Oommen
2023-06-14 19:44     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 15/18] drm/msm/a6xx: Use "else if" in GPU speedbin rev matching Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 19:46   ` Akhil P Oommen
2023-06-14 19:46     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 16/18] drm/msm/a6xx: Use adreno_is_aXYZ macros in speedbin matching Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 19:50   ` Akhil P Oommen
2023-06-14 19:50     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 17/18] drm/msm/a6xx: Add A619_holi speedbin support Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 20:15   ` Akhil P Oommen
2023-06-14 20:15     ` Akhil P Oommen
2023-05-29 13:52 ` [PATCH v8 18/18] drm/msm/a6xx: Add A610 " Konrad Dybcio
2023-05-29 13:52   ` Konrad Dybcio
2023-06-14 20:18   ` Akhil P Oommen
2023-06-14 20:18     ` Akhil P Oommen
2023-06-15 10:04     ` Konrad Dybcio [this message]
2023-06-15 10:04       ` Konrad Dybcio
2023-05-31 12:14 ` [PATCH v8 00/18] GMU-less A6xx support (A610, A619_holi) Konrad Dybcio
2023-05-31 12:14   ` Konrad Dybcio

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