From: Thomas Gleixner <tglx@linutronix.de> To: Fenghua Yu <fenghua.yu@intel.com>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, H Peter Anvin <hpa@zytor.com>, David Woodhouse <dwmw2@infradead.org>, Lu Baolu <baolu.lu@linux.intel.com>, Dave Hansen <dave.hansen@intel.com>, Tony Luck <tony.luck@intel.com>, Ashok Raj <ashok.raj@intel.com>, Jacob Jun Pan <jacob.jun.pan@intel.com>, Dave Jiang <dave.jiang@intel.com>, Sohil Mehta <sohil.mehta@intel.com>, Ravi V Shankar <ravi.v.shankar@intel.com> Cc: linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>, iommu@lists.linux-foundation.org, Fenghua Yu <fenghua.yu@intel.com> Subject: Re: [PATCH 1/7] docs: x86: Add a documentation for ENQCMD Date: Sun, 26 Apr 2020 13:02:12 +0200 [thread overview] Message-ID: <87368qtsqz.fsf@nanos.tec.linutronix.de> (raw) In-Reply-To: <1585596788-193989-2-git-send-email-fenghua.yu@intel.com> Fenghua Yu <fenghua.yu@intel.com> writes: s/Add a documentation/Add documentation/ > From: Ashok Raj <ashok.raj@intel.com> > > ENQCMD and Data Streaming Accelerator (DSA) and all of their associated > features are a complicated stack with lots of interconnected pieces. > This documentation provides a big picture overview for all of the > features. > > Signed-off-by: Ashok Raj <ashok.raj@intel.com> > Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> > Reviewed-by: Tony Luck <tony.luck@intel.com> > --- > Documentation/x86/enqcmd.rst | 185 +++++++++++++++++++++++++++++++++++ How is that hooked up into the Documentation index? Documentation/x86/enqcmd.rst: WARNING: document isn't included in any toctree > +++ b/Documentation/x86/enqcmd.rst > @@ -0,0 +1,185 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +Improved Device Interaction Overview So the document is about ENQCMD, right? Can you please make that in some way consistently named? > + > +== Background == This lacks any docbook formatting.... The resulting HTML looks like ... > + > +Shared Virtual Addressing (SVA) allows the processor and device to use the > +same virtual addresses avoiding the need for software to translate virtual > +addresses to physical addresses. ENQCMD is a new instruction on Intel > +platforms that allows user applications to directly notify hardware of new > +work, much like doorbells are used in some hardware, but carries a payload > +that carries the PASID and some additional device specific commands > +along with it. Sorry that's not background information, that's an agglomeration of words. Can you please explain properly what's the background of SVA, how it differs from regular device addressing and what kind of requirements it has? ENQCMD is not related to background. It's part of the new technology. > +== Address Space Tagging == > + > +A new MSR (MSR_IA32_PASID) allows an application address space to be > +associated with what the PCIe spec calls a Process Address Space ID > +(PASID). This PASID tag is carried along with all requests between > +applications and devices and allows devices to interact with the process > +address space. Sigh. The important part here is not the MSR. The important part is to explain what PASID is and where it comes from. Documentation has similar rules as changelogs: 1) Provide context 2) Explain requirements 3) Explain implementation The pile you provided is completely backwards and unstructured. Thanks, tglx
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de> To: Fenghua Yu <fenghua.yu@intel.com>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, H Peter Anvin <hpa@zytor.com>, David Woodhouse <dwmw2@infradead.org>, Lu Baolu <baolu.lu@linux.intel.com>, Dave Hansen <dave.hansen@intel.com>, Tony Luck <tony.luck@intel.com>, Ashok Raj <ashok.raj@intel.com>, Jacob Jun Pan <jacob.jun.pan@intel.com>, Dave Jiang <dave.jiang@intel.com>, Sohil Mehta <sohil.mehta@intel.com>, Ravi V Shankar <ravi.v.shankar@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com>, iommu@lists.linux-foundation.org, x86 <x86@kernel.org>, linux-kernel <linux-kernel@vger.kernel.org> Subject: Re: [PATCH 1/7] docs: x86: Add a documentation for ENQCMD Date: Sun, 26 Apr 2020 13:02:12 +0200 [thread overview] Message-ID: <87368qtsqz.fsf@nanos.tec.linutronix.de> (raw) In-Reply-To: <1585596788-193989-2-git-send-email-fenghua.yu@intel.com> Fenghua Yu <fenghua.yu@intel.com> writes: s/Add a documentation/Add documentation/ > From: Ashok Raj <ashok.raj@intel.com> > > ENQCMD and Data Streaming Accelerator (DSA) and all of their associated > features are a complicated stack with lots of interconnected pieces. > This documentation provides a big picture overview for all of the > features. > > Signed-off-by: Ashok Raj <ashok.raj@intel.com> > Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> > Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> > Reviewed-by: Tony Luck <tony.luck@intel.com> > --- > Documentation/x86/enqcmd.rst | 185 +++++++++++++++++++++++++++++++++++ How is that hooked up into the Documentation index? Documentation/x86/enqcmd.rst: WARNING: document isn't included in any toctree > +++ b/Documentation/x86/enqcmd.rst > @@ -0,0 +1,185 @@ > +.. SPDX-License-Identifier: GPL-2.0 > + > +Improved Device Interaction Overview So the document is about ENQCMD, right? Can you please make that in some way consistently named? > + > +== Background == This lacks any docbook formatting.... The resulting HTML looks like ... > + > +Shared Virtual Addressing (SVA) allows the processor and device to use the > +same virtual addresses avoiding the need for software to translate virtual > +addresses to physical addresses. ENQCMD is a new instruction on Intel > +platforms that allows user applications to directly notify hardware of new > +work, much like doorbells are used in some hardware, but carries a payload > +that carries the PASID and some additional device specific commands > +along with it. Sorry that's not background information, that's an agglomeration of words. Can you please explain properly what's the background of SVA, how it differs from regular device addressing and what kind of requirements it has? ENQCMD is not related to background. It's part of the new technology. > +== Address Space Tagging == > + > +A new MSR (MSR_IA32_PASID) allows an application address space to be > +associated with what the PCIe spec calls a Process Address Space ID > +(PASID). This PASID tag is carried along with all requests between > +applications and devices and allows devices to interact with the process > +address space. Sigh. The important part here is not the MSR. The important part is to explain what PASID is and where it comes from. Documentation has similar rules as changelogs: 1) Provide context 2) Explain requirements 3) Explain implementation The pile you provided is completely backwards and unstructured. Thanks, tglx _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-04-26 11:02 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-30 19:33 [PATCH 0/7] x86: tag application address space for devices Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 1/7] docs: x86: Add a documentation for ENQCMD Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 11:02 ` Thomas Gleixner [this message] 2020-04-26 11:02 ` Thomas Gleixner 2020-04-27 20:13 ` Fenghua Yu 2020-04-27 20:13 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 2/7] x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 11:06 ` Thomas Gleixner 2020-04-26 11:06 ` Thomas Gleixner 2020-04-27 20:17 ` Fenghua Yu 2020-04-27 20:17 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 3/7] x86/fpu/xstate: Add supervisor PASID state for ENQCMD feature Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 11:17 ` Thomas Gleixner 2020-04-26 11:17 ` Thomas Gleixner 2020-04-27 20:33 ` Fenghua Yu 2020-04-27 20:33 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 4/7] x86/msr-index: Define IA32_PASID MSR Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 11:22 ` Thomas Gleixner 2020-04-26 11:22 ` Thomas Gleixner 2020-04-27 20:50 ` Fenghua Yu 2020-04-27 20:50 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 5/7] x86/mmu: Allocate/free PASID Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 14:55 ` Thomas Gleixner 2020-04-26 14:55 ` Thomas Gleixner 2020-04-27 22:18 ` Fenghua Yu 2020-04-27 22:18 ` Fenghua Yu 2020-04-27 23:44 ` Thomas Gleixner 2020-04-27 23:44 ` Thomas Gleixner 2020-04-28 18:21 ` Jacob Pan (Jun) 2020-04-28 18:21 ` Jacob Pan (Jun) 2020-04-28 18:54 ` Thomas Gleixner 2020-04-28 18:54 ` Thomas Gleixner 2020-04-28 19:07 ` Luck, Tony 2020-04-28 19:07 ` Luck, Tony 2020-04-28 20:42 ` Jacob Pan (Jun) 2020-04-28 20:42 ` Jacob Pan (Jun) 2020-04-28 20:59 ` Luck, Tony 2020-04-28 20:59 ` Luck, Tony 2020-04-28 22:13 ` Jacob Pan (Jun) 2020-04-28 22:13 ` Jacob Pan (Jun) 2020-04-28 22:32 ` Luck, Tony 2020-04-28 22:32 ` Luck, Tony 2020-04-28 20:40 ` Jacob Pan (Jun) 2020-04-28 20:40 ` Jacob Pan (Jun) 2020-04-28 20:57 ` Fenghua Yu 2020-04-28 20:57 ` Fenghua Yu 2020-03-30 19:33 ` [PATCH 6/7] x86/traps: Fix up invalid PASID Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-26 15:25 ` Thomas Gleixner 2020-04-26 15:25 ` Thomas Gleixner 2020-04-27 20:11 ` Fenghua Yu 2020-04-27 20:11 ` Fenghua Yu 2020-04-28 0:13 ` Thomas Gleixner 2020-04-28 0:13 ` Thomas Gleixner 2020-04-27 22:46 ` Raj, Ashok 2020-04-27 22:46 ` Raj, Ashok 2020-04-27 23:08 ` Luck, Tony 2020-04-27 23:08 ` Luck, Tony 2020-04-28 0:20 ` Thomas Gleixner 2020-04-28 0:20 ` Thomas Gleixner 2020-04-28 0:54 ` Thomas Gleixner 2020-04-28 0:54 ` Thomas Gleixner 2020-04-28 1:08 ` Raj, Ashok 2020-04-28 1:08 ` Raj, Ashok 2020-03-30 19:33 ` [PATCH 7/7] x86/process: Clear PASID state for a newly forked/cloned thread Fenghua Yu 2020-03-30 19:33 ` Fenghua Yu 2020-04-22 20:41 ` [PATCH 0/7] x86: tag application address space for devices Fenghua Yu 2020-04-22 20:41 ` Fenghua Yu
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