[PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error

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* [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
@ 2022-04-29 18:27 ` Pali Rohár
  2022-05-06  9:32   ` Jaehoon Chung
                     ` (2 more replies)
  0 siblings, 3 replies; 9+ messages in thread
From: Pali Rohár @ 2022-04-29 18:27 UTC (permalink / raw)
  To: Peng Fan, Priyanka Jain, Jaehoon Chung, Sinan Akman; +Cc: u-boot

Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
fixed amount of time like it was before commit 6f883e501b65 ("mmc:
fsl_esdhc: Add emmc hs200 support").

This change fixes error 'Internal clock never stabilised.' which is printed
on P2020 board at every access to SD card.

Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index fdf2cc290e06..3b3587bd8d72 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 	u32 time_out;
 	u32 value;
 	uint clk;
+	u32 hostver;
 
 	if (clock < mmc->cfg->f_min)
 		clock = mmc->cfg->f_min;
@@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
 
+	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
+	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
+	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
+		udelay(10000);
+		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
+		return;
+	}
+
 	time_out = 20;
 	value = PRSSTAT_SDSTB;
 	while (!(esdhc_read32(&regs->prsstat) & value)) {
@@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
 	struct fsl_esdhc *regs = priv->esdhc_regs;
 	u32 value;
 	u32 time_out;
+	u32 hostver;
 
 	value = esdhc_read32(&regs->sysctl);
 
@@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
 
 	esdhc_write32(&regs->sysctl, value);
 
+	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
+	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
+	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
+		udelay(10000);
+		return;
+	}
+
 	time_out = 20;
 	value = PRSSTAT_SDSTB;
 	while (!(esdhc_read32(&regs->prsstat) & value)) {
-- 
2.20.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-04-29 18:27 ` [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error Pali Rohár
@ 2022-05-06  9:32   ` Jaehoon Chung
  2022-05-06  9:40     ` Pali Rohár
  2022-05-09  5:36   ` Peng Fan (OSS)
  2022-06-12  9:12   ` Pali Rohár
  2 siblings, 1 reply; 9+ messages in thread
From: Jaehoon Chung @ 2022-05-06  9:32 UTC (permalink / raw)
  To: Pali Rohár, Peng Fan, Priyanka Jain, Sinan Akman; +Cc: u-boot

On 4/30/22 03:27, Pali Rohár wrote:
> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> fsl_esdhc: Add emmc hs200 support").
> 
> This change fixes error 'Internal clock never stabilised.' which is printed
> on P2020 board at every access to SD card.
> 
> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Just add minor question. 

> ---
>  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index fdf2cc290e06..3b3587bd8d72 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>  	u32 time_out;
>  	u32 value;
>  	uint clk;
> +	u32 hostver;
>  
>  	if (clock < mmc->cfg->f_min)
>  		clock = mmc->cfg->f_min;
> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>  
>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
>  
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);

Is there any reason to use 10000?

Best Regards,
Jaehoon Chung

> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> +		return;
> +	}
> +
>  	time_out = 20;
>  	value = PRSSTAT_SDSTB;
>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>  	struct fsl_esdhc *regs = priv->esdhc_regs;
>  	u32 value;
>  	u32 time_out;
> +	u32 hostver;
>  
>  	value = esdhc_read32(&regs->sysctl);
>  
> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>  
>  	esdhc_write32(&regs->sysctl, value);
>  
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);
> +		return;
> +	}
> +
>  	time_out = 20;
>  	value = PRSSTAT_SDSTB;
>  	while (!(esdhc_read32(&regs->prsstat) & value)) {


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-05-06  9:32   ` Jaehoon Chung
@ 2022-05-06  9:40     ` Pali Rohár
  0 siblings, 0 replies; 9+ messages in thread
From: Pali Rohár @ 2022-05-06  9:40 UTC (permalink / raw)
  To: Jaehoon Chung; +Cc: Peng Fan, Priyanka Jain, Sinan Akman, u-boot

On Friday 06 May 2022 18:32:18 Jaehoon Chung wrote:
> On 4/30/22 03:27, Pali Rohár wrote:
> > Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> > flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> > fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> > fsl_esdhc: Add emmc hs200 support").
> > 
> > This change fixes error 'Internal clock never stabilised.' which is printed
> > on P2020 board at every access to SD card.
> > 
> > Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> 
> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
> 
> Just add minor question. 
> 
> > ---
> >  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> > 
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> > index fdf2cc290e06..3b3587bd8d72 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> >  	u32 time_out;
> >  	u32 value;
> >  	uint clk;
> > +	u32 hostver;
> >  
> >  	if (clock < mmc->cfg->f_min)
> >  		clock = mmc->cfg->f_min;
> > @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> >  
> >  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
> >  
> > +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > +		udelay(10000);
> 
> Is there any reason to use 10000?

Hello! I really do not know. This value was there before commit
6f883e501b65. This is probably question for Freescale/NXP people.

> Best Regards,
> Jaehoon Chung
> 
> > +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> > +		return;
> > +	}
> > +
> >  	time_out = 20;
> >  	value = PRSSTAT_SDSTB;
> >  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> > @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> >  	struct fsl_esdhc *regs = priv->esdhc_regs;
> >  	u32 value;
> >  	u32 time_out;
> > +	u32 hostver;
> >  
> >  	value = esdhc_read32(&regs->sysctl);
> >  
> > @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> >  
> >  	esdhc_write32(&regs->sysctl, value);
> >  
> > +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > +		udelay(10000);
> > +		return;
> > +	}
> > +
> >  	time_out = 20;
> >  	value = PRSSTAT_SDSTB;
> >  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> 

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-04-29 18:27 ` [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error Pali Rohár
  2022-05-06  9:32   ` Jaehoon Chung
@ 2022-05-09  5:36   ` Peng Fan (OSS)
  2022-05-09  6:21     ` Bough Chen
  2022-06-12  9:12   ` Pali Rohár
  2 siblings, 1 reply; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-05-09  5:36 UTC (permalink / raw)
  To: Pali Rohár, Peng Fan, Priyanka Jain, Jaehoon Chung,
	Sinan Akman, haibo.chen
  Cc: u-boot

+Haibo

On 2022/4/30 2:27, Pali Rohár wrote:
> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> fsl_esdhc: Add emmc hs200 support").
> 
> This change fixes error 'Internal clock never stabilised.' which is printed
> on P2020 board at every access to SD card.
> 
> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>   drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index fdf2cc290e06..3b3587bd8d72 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>   	u32 time_out;
>   	u32 value;
>   	uint clk;
> +	u32 hostver;
>   
>   	if (clock < mmc->cfg->f_min)
>   		clock = mmc->cfg->f_min;
> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>   
>   	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
>   
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);
> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> +		return;
> +	}
> +
>   	time_out = 20;
>   	value = PRSSTAT_SDSTB;
>   	while (!(esdhc_read32(&regs->prsstat) & value)) {
> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>   	struct fsl_esdhc *regs = priv->esdhc_regs;
>   	u32 value;
>   	u32 time_out;
> +	u32 hostver;
>   
>   	value = esdhc_read32(&regs->sysctl);
>   
> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>   
>   	esdhc_write32(&regs->sysctl, value);
>   
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);
> +		return;
> +	}
> +
>   	time_out = 20;
>   	value = PRSSTAT_SDSTB;
>   	while (!(esdhc_read32(&regs->prsstat) & value)) {
> 

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-05-09  5:36   ` Peng Fan (OSS)
@ 2022-05-09  6:21     ` Bough Chen
  0 siblings, 0 replies; 9+ messages in thread
From: Bough Chen @ 2022-05-09  6:21 UTC (permalink / raw)
  To: Peng Fan (OSS),
	Pali Rohár, Peng Fan, Priyanka Jain, Jaehoon Chung,
	Sinan Akman, Y.B. Lu
  Cc: u-boot

+Yangbo

> -----Original Message-----
> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: 2022年5月9日 13:37
> To: Pali Rohár <pali@kernel.org>; Peng Fan <peng.fan@nxp.com>; Priyanka Jain
> <priyanka.jain@nxp.com>; Jaehoon Chung <jh80.chung@samsung.com>; Sinan
> Akman <sinan@writeme.com>; Bough Chen <haibo.chen@nxp.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
> 
> +Haibo
> 
> On 2022/4/30 2:27, Pali Rohár wrote:
> > Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait
> > until flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead
> > sleep for fixed amount of time like it was before commit 6f883e501b65
> ("mmc:
> > fsl_esdhc: Add emmc hs200 support").
> >
> > This change fixes error 'Internal clock never stabilised.' which is
> > printed on P2020 board at every access to SD card.
> >
> > Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > ---
> >   drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
> >   1 file changed, 17 insertions(+)
> >
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> > fdf2cc290e06..3b3587bd8d72 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct
> mmc *mmc, uint clock)
> >   	u32 time_out;
> >   	u32 value;
> >   	uint clk;
> > +	u32 hostver;
> >
> >   	if (clock < mmc->cfg->f_min)
> >   		clock = mmc->cfg->f_min;
> > @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv
> > *priv, struct mmc *mmc, uint clock)
> >
> >   	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
> >
> > +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > +		udelay(10000);
> > +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> > +		return;
> > +	}
> > +
> >   	time_out = 20;
> >   	value = PRSSTAT_SDSTB;
> >   	while (!(esdhc_read32(&regs->prsstat) & value)) { @@ -562,6 +571,7
> > @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> >   	struct fsl_esdhc *regs = priv->esdhc_regs;
> >   	u32 value;
> >   	u32 time_out;
> > +	u32 hostver;
> >
> >   	value = esdhc_read32(&regs->sysctl);
> >
> > @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct
> > fsl_esdhc_priv *priv, bool enable)
> >
> >   	esdhc_write32(&regs->sysctl, value);
> >
> > +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > +		udelay(10000);
> > +		return;
> > +	}
> > +
> >   	time_out = 20;
> >   	value = PRSSTAT_SDSTB;
> >   	while (!(esdhc_read32(&regs->prsstat) & value)) {
> >

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-04-29 18:27 ` [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error Pali Rohár
  2022-05-06  9:32   ` Jaehoon Chung
  2022-05-09  5:36   ` Peng Fan (OSS)
@ 2022-06-12  9:12   ` Pali Rohár
  2022-06-14  2:25     ` Jaehoon Chung
  2 siblings, 1 reply; 9+ messages in thread
From: Pali Rohár @ 2022-06-12  9:12 UTC (permalink / raw)
  To: Peng Fan, Priyanka Jain, Jaehoon Chung, Sinan Akman; +Cc: u-boot

PING?

On Friday 29 April 2022 20:27:34 Pali Rohár wrote:
> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> fsl_esdhc: Add emmc hs200 support").
> 
> This change fixes error 'Internal clock never stabilised.' which is printed
> on P2020 board at every access to SD card.
> 
> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index fdf2cc290e06..3b3587bd8d72 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>  	u32 time_out;
>  	u32 value;
>  	uint clk;
> +	u32 hostver;
>  
>  	if (clock < mmc->cfg->f_min)
>  		clock = mmc->cfg->f_min;
> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>  
>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
>  
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);
> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> +		return;
> +	}
> +
>  	time_out = 20;
>  	value = PRSSTAT_SDSTB;
>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>  	struct fsl_esdhc *regs = priv->esdhc_regs;
>  	u32 value;
>  	u32 time_out;
> +	u32 hostver;
>  
>  	value = esdhc_read32(&regs->sysctl);
>  
> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>  
>  	esdhc_write32(&regs->sysctl, value);
>  
> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> +		udelay(10000);
> +		return;
> +	}
> +
>  	time_out = 20;
>  	value = PRSSTAT_SDSTB;
>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> -- 
> 2.20.1
> 

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-06-12  9:12   ` Pali Rohár
@ 2022-06-14  2:25     ` Jaehoon Chung
  2022-06-23 16:11       ` Pali Rohár
  0 siblings, 1 reply; 9+ messages in thread
From: Jaehoon Chung @ 2022-06-14  2:25 UTC (permalink / raw)
  To: Pali Rohár, Peng Fan, Priyanka Jain, Sinan Akman; +Cc: u-boot

Hi,

On 6/12/22 18:12, Pali Rohár wrote:
> PING?

Sorry for too late. 

> 
> On Friday 29 April 2022 20:27:34 Pali Rohár wrote:
>> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
>> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
>> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
>> fsl_esdhc: Add emmc hs200 support").
>>
>> This change fixes error 'Internal clock never stabilised.' which is printed
>> on P2020 board at every access to SD card.
>>
>> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
>> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

Best Regards,
Jaehoon Chung

>> ---
>>  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
>> index fdf2cc290e06..3b3587bd8d72 100644
>> --- a/drivers/mmc/fsl_esdhc.c
>> +++ b/drivers/mmc/fsl_esdhc.c
>> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>>  	u32 time_out;
>>  	u32 value;
>>  	uint clk;
>> +	u32 hostver;
>>  
>>  	if (clock < mmc->cfg->f_min)
>>  		clock = mmc->cfg->f_min;
>> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
>>  
>>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
>>  
>> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
>> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
>> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
>> +		udelay(10000);
>> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
>> +		return;
>> +	}
>> +
>>  	time_out = 20;
>>  	value = PRSSTAT_SDSTB;
>>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
>> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>>  	struct fsl_esdhc *regs = priv->esdhc_regs;
>>  	u32 value;
>>  	u32 time_out;
>> +	u32 hostver;
>>  
>>  	value = esdhc_read32(&regs->sysctl);
>>  
>> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
>>  
>>  	esdhc_write32(&regs->sysctl, value);
>>  
>> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
>> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
>> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
>> +		udelay(10000);
>> +		return;
>> +	}
>> +
>>  	time_out = 20;
>>  	value = PRSSTAT_SDSTB;
>>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
>> -- 
>> 2.20.1
>>
> 


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-06-14  2:25     ` Jaehoon Chung
@ 2022-06-23 16:11       ` Pali Rohár
  2022-07-10 10:32         ` Pali Rohár
  0 siblings, 1 reply; 9+ messages in thread
From: Pali Rohár @ 2022-06-23 16:11 UTC (permalink / raw)
  To: Jaehoon Chung; +Cc: Peng Fan, Priyanka Jain, Sinan Akman, u-boot

On Tuesday 14 June 2022 11:25:18 Jaehoon Chung wrote:
> Hi,
> 
> On 6/12/22 18:12, Pali Rohár wrote:
> > PING?
> 
> Sorry for too late. 

When will be this fix patch processed and merged?

> > 
> > On Friday 29 April 2022 20:27:34 Pali Rohár wrote:
> >> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> >> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> >> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> >> fsl_esdhc: Add emmc hs200 support").
> >>
> >> This change fixes error 'Internal clock never stabilised.' which is printed
> >> on P2020 board at every access to SD card.
> >>
> >> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> >> Signed-off-by: Pali Rohár <pali@kernel.org>
> 
> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
> 
> Best Regards,
> Jaehoon Chung
> 
> >> ---
> >>  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
> >>  1 file changed, 17 insertions(+)
> >>
> >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> >> index fdf2cc290e06..3b3587bd8d72 100644
> >> --- a/drivers/mmc/fsl_esdhc.c
> >> +++ b/drivers/mmc/fsl_esdhc.c
> >> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> >>  	u32 time_out;
> >>  	u32 value;
> >>  	uint clk;
> >> +	u32 hostver;
> >>  
> >>  	if (clock < mmc->cfg->f_min)
> >>  		clock = mmc->cfg->f_min;
> >> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> >>  
> >>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
> >>  
> >> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> >> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> >> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> >> +		udelay(10000);
> >> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> >> +		return;
> >> +	}
> >> +
> >>  	time_out = 20;
> >>  	value = PRSSTAT_SDSTB;
> >>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> >> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> >>  	struct fsl_esdhc *regs = priv->esdhc_regs;
> >>  	u32 value;
> >>  	u32 time_out;
> >> +	u32 hostver;
> >>  
> >>  	value = esdhc_read32(&regs->sysctl);
> >>  
> >> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> >>  
> >>  	esdhc_write32(&regs->sysctl, value);
> >>  
> >> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> >> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> >> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> >> +		udelay(10000);
> >> +		return;
> >> +	}
> >> +
> >>  	time_out = 20;
> >>  	value = PRSSTAT_SDSTB;
> >>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> >> -- 
> >> 2.20.1
> >>
> > 
> 

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error
  2022-06-23 16:11       ` Pali Rohár
@ 2022-07-10 10:32         ` Pali Rohár
  0 siblings, 0 replies; 9+ messages in thread
From: Pali Rohár @ 2022-07-10 10:32 UTC (permalink / raw)
  To: Jaehoon Chung; +Cc: Peng Fan, Priyanka Jain, Sinan Akman, u-boot

PING?

On Thursday 23 June 2022 18:11:37 Pali Rohár wrote:
> On Tuesday 14 June 2022 11:25:18 Jaehoon Chung wrote:
> > Hi,
> > 
> > On 6/12/22 18:12, Pali Rohár wrote:
> > > PING?
> > 
> > Sorry for too late. 
> 
> When will be this fix patch processed and merged?
> 
> > > 
> > > On Friday 29 April 2022 20:27:34 Pali Rohár wrote:
> > >> Only newer eSDHC controllers set PRSSTAT_SDSTB flag. So do not wait until
> > >> flag PRSSTAT_SDSTB is set on old pre-2.2 controllers. Instead sleep for
> > >> fixed amount of time like it was before commit 6f883e501b65 ("mmc:
> > >> fsl_esdhc: Add emmc hs200 support").
> > >>
> > >> This change fixes error 'Internal clock never stabilised.' which is printed
> > >> on P2020 board at every access to SD card.
> > >>
> > >> Fixes: 6f883e501b65 ("mmc: fsl_esdhc: Add emmc hs200 support")
> > >> Signed-off-by: Pali Rohár <pali@kernel.org>
> > 
> > Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
> > 
> > Best Regards,
> > Jaehoon Chung
> > 
> > >> ---
> > >>  drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++
> > >>  1 file changed, 17 insertions(+)
> > >>
> > >> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> > >> index fdf2cc290e06..3b3587bd8d72 100644
> > >> --- a/drivers/mmc/fsl_esdhc.c
> > >> +++ b/drivers/mmc/fsl_esdhc.c
> > >> @@ -503,6 +503,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> > >>  	u32 time_out;
> > >>  	u32 value;
> > >>  	uint clk;
> > >> +	u32 hostver;
> > >>  
> > >>  	if (clock < mmc->cfg->f_min)
> > >>  		clock = mmc->cfg->f_min;
> > >> @@ -543,6 +544,14 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
> > >>  
> > >>  	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
> > >>  
> > >> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > >> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > >> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > >> +		udelay(10000);
> > >> +		esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
> > >> +		return;
> > >> +	}
> > >> +
> > >>  	time_out = 20;
> > >>  	value = PRSSTAT_SDSTB;
> > >>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> > >> @@ -562,6 +571,7 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> > >>  	struct fsl_esdhc *regs = priv->esdhc_regs;
> > >>  	u32 value;
> > >>  	u32 time_out;
> > >> +	u32 hostver;
> > >>  
> > >>  	value = esdhc_read32(&regs->sysctl);
> > >>  
> > >> @@ -572,6 +582,13 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable)
> > >>  
> > >>  	esdhc_write32(&regs->sysctl, value);
> > >>  
> > >> +	/* Only newer eSDHC controllers set PRSSTAT_SDSTB flag */
> > >> +	hostver = esdhc_read32(&priv->esdhc_regs->hostver);
> > >> +	if (HOSTVER_VENDOR(hostver) <= VENDOR_V_22) {
> > >> +		udelay(10000);
> > >> +		return;
> > >> +	}
> > >> +
> > >>  	time_out = 20;
> > >>  	value = PRSSTAT_SDSTB;
> > >>  	while (!(esdhc_read32(&regs->prsstat) & value)) {
> > >> -- 
> > >> 2.20.1
> > >>
> > > 
> > 

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-07-10 10:32 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <CGME20220429182750epcas1p178c23eafab50ed4382fee7471e54bf43@epcas1p1.samsung.com>
2022-04-29 18:27 ` [PATCH] mmc: fsl_esdhc: Fix 'Internal clock never stabilised.' error Pali Rohár
2022-05-06  9:32   ` Jaehoon Chung
2022-05-06  9:40     ` Pali Rohár
2022-05-09  5:36   ` Peng Fan (OSS)
2022-05-09  6:21     ` Bough Chen
2022-06-12  9:12   ` Pali Rohár
2022-06-14  2:25     ` Jaehoon Chung
2022-06-23 16:11       ` Pali Rohár
2022-07-10 10:32         ` Pali Rohár

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