From: Linus Torvalds <torvalds@linux-foundation.org>
To: Andi Kleen <ak@linux.intel.com>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Ingo Molnar <mingo@kernel.org>,
Dan Williams <dan.j.williams@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andrew Lutomirski <luto@kernel.org>,
"the arch/x86 maintainers" <x86@kernel.org>
Subject: Re: [PATCH tip-pti 2/2] x86/entry: interleave XOR register clearing with PUSH/MOV instructions
Date: Tue, 6 Feb 2018 17:30:40 -0800 [thread overview]
Message-ID: <CA+55aFzRMn6+tFFkAbMT_iDcMphDZFU9+OALEn+ecqa7=RqvUA@mail.gmail.com> (raw)
In-Reply-To: <20180206235402.GN30338@tassilo.jf.intel.com>
On Tue, Feb 6, 2018 at 3:54 PM, Andi Kleen <ak@linux.intel.com> wrote:
>
> But for push, on older CPUs (older AMD, most Atoms, really old Intel big core)
> sub+mov is a lot faster than push because push has additional dependencies
> causing pipeline bubbles. So you would make these cases slower if you
> use PUSH.
I refuse to optimize for old CPU's.
Also, even for old CPU's, the push sequence is *much* smaller than the
mov sequence. And really, just a single extra cache miss more than
eats up any advantage you get from decoding.
> PS it was never fully clear to me why we removed the fast path. After all it
> could still be useful on the future CPUs with Spectre hardware fixes.
The fastpath really messes up all these cleanups, and forced that
"mov" sequence and illegible code.
Plus the fastpath couldn't clear those registers anyway, since it
didn't even _save_ them - exactly because the whole point of the
fastpath was that not all registers are clobbered by the calling
conventions.
We can try to see if it's worth re-instating in a few years when
hopefully fixed CPU's will be the norm. Right now the fast path
definitely made no sense.
Linus
next prev parent reply other threads:[~2018-02-07 1:30 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-06 1:18 [PATCH v3 0/3] x86/entry: Clear registers to sanitize speculative usages Dan Williams
2018-02-06 1:18 ` [PATCH v3 1/3] x86/entry: Clear extra registers beyond syscall arguments for 64bit kernels Dan Williams
2018-02-06 11:52 ` [tip:x86/pti] x86/entry/64: Clear extra registers beyond syscall arguments, to reduce speculation attack surface tip-bot for Dan Williams
2018-02-06 1:18 ` [PATCH v3 2/3] x86/entry: Clear registers for 64bit exceptions/interrupts Dan Williams
2018-02-06 9:04 ` Dominik Brodowski
2018-02-06 10:48 ` Ingo Molnar
2018-02-06 9:17 ` Dominik Brodowski
2018-02-06 10:51 ` Ingo Molnar
2018-02-06 10:57 ` Dominik Brodowski
2018-02-06 21:25 ` [PATCH tip-pti 1/2] x86/entry: remove SAVE_C_REGS_EXCEPT_* macros Dominik Brodowski
2018-02-06 22:56 ` Linus Torvalds
2018-02-06 21:32 ` [PATCH tip-pti 2/2] x86/entry: interleave XOR register clearing with PUSH/MOV instructions Dominik Brodowski
2018-02-06 22:30 ` Dan Williams
2018-02-06 22:48 ` Linus Torvalds
2018-02-06 23:05 ` Andy Lutomirski
2018-02-06 23:54 ` Andi Kleen
2018-02-07 1:30 ` Linus Torvalds [this message]
2018-02-07 15:18 ` Andi Kleen
2018-02-07 17:05 ` Linus Torvalds
2018-02-07 17:37 ` Linus Torvalds
2018-02-06 12:00 ` [tip:x86/pti] x86/entry/64: Clear registers for exceptions/interrupts, to reduce speculation attack surface tip-bot for Dan Williams
2018-02-06 1:18 ` [PATCH v3 3/3] x86/entry: Clear registers for compat syscalls Dan Williams
2018-02-06 7:26 ` Ingo Molnar
2018-02-06 7:53 ` Dan Williams
2018-02-06 12:00 ` [tip:x86/pti] x86/entry/64/compat: Clear registers for compat syscalls, to reduce speculation attack surface tip-bot for Dan Williams
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