From: Huacai Chen <chenhuacai@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Huacai Chen <chenhuacai@loongson.cn>,
Arnd Bergmann <arnd@arndb.de>, Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Morton <akpm@linux-foundation.org>,
David Airlie <airlied@linux.ie>,
Linus Torvalds <torvalds@linux-foundation.org>,
linux-arch <linux-arch@vger.kernel.org>,
Xuefeng Li <lixuefeng@loongson.cn>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH 17/19] LoongArch: Add multi-processor (SMP) support
Date: Thu, 12 Aug 2021 19:39:23 +0800 [thread overview]
Message-ID: <CAAhV-H47zeE5mHD6Yv0oEWp_=JkHO_uyc6j+MRCovOtJeL-37Q@mail.gmail.com> (raw)
In-Reply-To: <YOQ/P/C7yfgCeKct@hirez.programming.kicks-ass.net>
Hi, Peter,
On Tue, Jul 6, 2021 at 7:32 PM Peter Zijlstra <peterz@infradead.org> wrote:
>
> On Tue, Jul 06, 2021 at 12:18:18PM +0800, Huacai Chen wrote:
> > diff --git a/arch/loongarch/include/asm/barrier.h b/arch/loongarch/include/asm/barrier.h
> > index 8ab8d8f15b88..ad09a3b31cba 100644
> > --- a/arch/loongarch/include/asm/barrier.h
> > +++ b/arch/loongarch/include/asm/barrier.h
> > @@ -20,6 +20,19 @@
> > #define mb() fast_mb()
> > #define iob() fast_iob()
> >
> > +#define __smp_mb() __asm__ __volatile__("dbar 0" : : : "memory")
> > +#define __smp_rmb() __asm__ __volatile__("dbar 0" : : : "memory")
> > +#define __smp_wmb() __asm__ __volatile__("dbar 0" : : : "memory")
>
> :-(
>
> > +
> > +#ifdef CONFIG_SMP
> > +#define __WEAK_LLSC_MB " dbar 0 \n"
> > +#else
> > +#define __WEAK_LLSC_MB " \n"
> > +#endif
>
> Isn't that spelled smp_mb() ?
Yes, but __WEAK_LLSC_MB is used in inline asm.
>
> > +
> > +#define __smp_mb__before_atomic() barrier()
> > +#define __smp_mb__after_atomic() __smp_mb()
>
> Clarification please.
>
> Does this imply LL is sequentially consistent, while SC is not?
I'm wrong here, no mb() is needed after atomic operations.
Huacai
>
> > +
> > /**
> > * array_index_mask_nospec() - generate a ~0 mask when index < size, 0 otherwise
> > * @index: array element index
> > @@ -48,6 +61,112 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
> > return mask;
> > }
> >
> > +#define __smp_load_acquire(p) \
> > +({ \
> > + union { typeof(*p) __val; char __c[1]; } __u; \
> > + unsigned long __tmp = 0; \
> > + compiletime_assert_atomic_type(*p); \
> > + switch (sizeof(*p)) { \
> > + case 1: \
> > + *(__u8 *)__u.__c = *(volatile __u8 *)p; \
> > + __smp_mb(); \
> > + break; \
> > + case 2: \
> > + *(__u16 *)__u.__c = *(volatile __u16 *)p; \
> > + __smp_mb(); \
> > + break; \
> > + case 4: \
> > + __asm__ __volatile__( \
> > + "amor.w %[val], %[tmp], %[mem] \n" \
> > + : [val] "=&r" (*(__u32 *)__u.__c) \
> > + : [mem] "ZB" (*(u32 *) p), [tmp] "r" (__tmp) \
> > + : "memory"); \
> > + break; \
> > + case 8: \
> > + __asm__ __volatile__( \
> > + "amor.d %[val], %[tmp], %[mem] \n" \
> > + : [val] "=&r" (*(__u64 *)__u.__c) \
> > + : [mem] "ZB" (*(u64 *) p), [tmp] "r" (__tmp) \
> > + : "memory"); \
> > + break; \
> > + default: \
> > + barrier(); \
> > + __builtin_memcpy((void *)__u.__c, (const void *)p, sizeof(*p)); \
> > + __smp_mb(); \
> > + } \
> > + __u.__val; \
> > +})
> > +
> > +#define __smp_store_release(p, v) \
> > +do { \
> > + union { typeof(*p) __val; char __c[1]; } __u = \
> > + { .__val = (__force typeof(*p)) (v) }; \
> > + unsigned long __tmp; \
> > + compiletime_assert_atomic_type(*p); \
> > + switch (sizeof(*p)) { \
> > + case 1: \
> > + __smp_mb(); \
> > + *(volatile __u8 *)p = *(__u8 *)__u.__c; \
> > + break; \
> > + case 2: \
> > + __smp_mb(); \
> > + *(volatile __u16 *)p = *(__u16 *)__u.__c; \
> > + break; \
> > + case 4: \
> > + __asm__ __volatile__( \
> > + "amswap.w %[tmp], %[val], %[mem] \n" \
> > + : [mem] "+ZB" (*(u32 *)p), [tmp] "=&r" (__tmp) \
> > + : [val] "r" (*(__u32 *)__u.__c) \
> > + : ); \
> > + break; \
> > + case 8: \
> > + __asm__ __volatile__( \
> > + "amswap.d %[tmp], %[val], %[mem] \n" \
> > + : [mem] "+ZB" (*(u64 *)p), [tmp] "=&r" (__tmp) \
> > + : [val] "r" (*(__u64 *)__u.__c) \
> > + : ); \
> > + break; \
> > + default: \
> > + __smp_mb(); \
> > + __builtin_memcpy((void *)p, (const void *)__u.__c, sizeof(*p)); \
> > + barrier(); \
> > + } \
> > +} while (0)
>
> What's the actual ordering of those AMO things?
>
next prev parent reply other threads:[~2021-08-12 11:39 UTC|newest]
Thread overview: 131+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-06 4:18 [PATCH 00/19] arch: Add basic LoongArch support Huacai Chen
2021-07-06 4:18 ` [PATCH 01/19] LoongArch: Add elf-related definitions Huacai Chen
2021-07-06 4:18 ` [PATCH 02/19] LoongArch: Add writecombine support for drm Huacai Chen
2021-07-06 4:18 ` [PATCH 03/19] LoongArch: Add build infrastructure Huacai Chen
2021-07-06 10:12 ` Arnd Bergmann
2021-07-19 1:26 ` Huacai Chen
2021-07-19 7:43 ` Arnd Bergmann
2021-07-19 13:02 ` Huacai Chen
2021-07-06 10:35 ` Arnd Bergmann
2021-07-07 0:00 ` Randy Dunlap
2021-07-19 1:28 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 05/19] LoongArch: Add boot and setup routines Huacai Chen
2021-07-06 10:16 ` Arnd Bergmann
2021-07-27 11:53 ` Huacai Chen
2021-07-27 12:40 ` Arnd Bergmann
2021-07-27 12:51 ` Ard Biesheuvel
2021-07-27 13:14 ` Arnd Bergmann
2021-07-27 16:22 ` Ard Biesheuvel
2021-07-27 17:53 ` Arnd Bergmann
2021-07-28 10:24 ` Huacai Chen
2021-07-06 10:55 ` Arnd Bergmann
2021-07-06 4:18 ` [PATCH 06/19] LoongArch: Add exception/interrupt handling Huacai Chen
2021-07-06 10:16 ` Arnd Bergmann
2021-07-06 10:56 ` Arnd Bergmann
2021-07-06 11:06 ` Peter Zijlstra
2021-07-07 13:56 ` Nicholas Piggin
2021-07-27 14:10 ` Peter Zijlstra
2021-07-27 15:08 ` Arnd Bergmann
2021-07-28 10:16 ` Huacai Chen
2021-07-28 12:23 ` Arnd Bergmann
2021-07-06 4:18 ` [PATCH 07/19] LoongArch: Add process management Huacai Chen
2021-07-06 10:16 ` Arnd Bergmann
2021-07-06 10:57 ` Arnd Bergmann
2021-07-06 11:09 ` Peter Zijlstra
2021-08-12 11:17 ` Huacai Chen
2021-08-12 12:29 ` Arnd Bergmann
2021-08-12 12:51 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 08/19] LoongArch: Add memory management Huacai Chen
2021-07-06 10:16 ` Arnd Bergmann
2021-07-06 10:57 ` Arnd Bergmann
2021-08-12 11:20 ` Huacai Chen
2021-08-16 1:57 ` Guo Ren
2021-08-16 3:31 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 09/19] LoongArch: Add system call support Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 10:58 ` Arnd Bergmann
2021-07-07 4:24 ` Huacai Chen
2021-07-07 6:44 ` Arnd Bergmann
2021-07-07 7:00 ` Huacai Chen
2021-07-09 8:44 ` Huacai Chen
2021-07-06 13:51 ` Thomas Gleixner
2021-07-07 4:27 ` Huacai Chen
2021-08-12 12:40 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 10/19] LoongArch: Add signal handling support Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 10:59 ` Arnd Bergmann
2021-07-08 13:04 ` Huacai Chen
2021-07-08 13:23 ` Arnd Bergmann
2021-07-09 9:24 ` Huacai Chen
2021-07-09 10:22 ` Arnd Bergmann
2021-07-09 14:49 ` Eric W. Biederman
2021-07-09 15:59 ` Arnd Bergmann
2021-08-26 16:43 ` Xi Ruoyao
2021-08-27 4:23 ` Huacai Chen
2021-08-27 4:27 ` Xi Ruoyao
2021-07-06 4:18 ` [PATCH 11/19] LoongArch: Add elf and module support Huacai Chen
2021-07-06 4:18 ` [PATCH 12/19] LoongArch: Add misc common routines Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 11:00 ` Arnd Bergmann
2021-07-23 10:41 ` Huacai Chen
2021-07-23 11:43 ` Arnd Bergmann
2021-07-24 12:53 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 13/19] LoongArch: Add some library functions Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 11:00 ` Arnd Bergmann
2021-08-12 11:22 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 14/19] LoongArch: Add 64-bit Loongson platform Huacai Chen
2021-07-06 4:18 ` [PATCH 15/19] LoongArch: Add PCI controller support Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 11:01 ` Arnd Bergmann
2021-08-12 11:29 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 16/19] LoongArch: Add VDSO and VSYSCALL support Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 11:02 ` Arnd Bergmann
2021-08-12 11:31 ` Huacai Chen
2021-07-06 4:18 ` [PATCH 17/19] LoongArch: Add multi-processor (SMP) support Huacai Chen
2021-07-06 10:17 ` Arnd Bergmann
2021-07-06 11:03 ` Arnd Bergmann
2021-07-06 11:32 ` Peter Zijlstra
2021-08-12 11:39 ` Huacai Chen [this message]
2021-07-06 11:56 ` Peter Zijlstra
2021-07-06 13:48 ` Peter Zijlstra
2021-08-12 11:41 ` Huacai Chen
2021-07-06 13:52 ` Peter Zijlstra
2021-07-06 4:18 ` [PATCH 18/19] LoongArch: Add Non-Uniform Memory Access (NUMA) support Huacai Chen
2021-07-06 10:18 ` Arnd Bergmann
2021-07-06 11:03 ` Arnd Bergmann
2021-08-12 11:46 ` Huacai Chen
2021-08-12 12:48 ` Arnd Bergmann
2021-07-06 4:18 ` [PATCH 19/19] LoongArch: Add Loongson-3 default config file Huacai Chen
2021-07-06 10:18 ` Arnd Bergmann
2021-07-06 11:04 ` Arnd Bergmann
2021-08-12 11:58 ` Huacai Chen
2021-08-12 12:50 ` Arnd Bergmann
2021-07-06 10:11 ` [PATCH 00/19] arch: Add basic LoongArch support Arnd Bergmann
2021-07-07 3:04 ` Huacai Chen
2021-07-07 7:28 ` Arnd Bergmann
2021-07-29 16:48 ` Huacai Chen
2021-07-30 20:50 ` Arnd Bergmann
2021-07-06 10:33 ` Arnd Bergmann
[not found] ` <20210706041820.1536502-5-chenhuacai@loongson.cn>
2021-07-06 10:16 ` [PATCH 04/19] LoongArch: Add common headers Arnd Bergmann
2021-08-12 11:05 ` Huacai Chen
2021-08-12 12:45 ` Arnd Bergmann
2021-08-13 3:30 ` Huacai Chen
2021-08-13 7:05 ` Arnd Bergmann
2021-08-13 8:14 ` Huacai Chen
2021-08-13 9:08 ` Arnd Bergmann
2021-08-14 2:50 ` Huacai Chen
2021-08-15 8:56 ` Arnd Bergmann
2021-08-16 4:10 ` Huacai Chen
2021-08-18 9:38 ` Arnd Bergmann
2021-08-20 4:00 ` Huacai Chen
2021-08-20 7:55 ` Arnd Bergmann
2021-08-21 8:16 ` Huacai Chen
2021-07-06 10:54 ` Arnd Bergmann
2021-07-06 10:57 ` Peter Zijlstra
2021-07-06 11:23 ` Peter Zijlstra
2021-07-06 12:59 ` Arnd Bergmann
2021-07-06 13:20 ` Peter Zijlstra
2021-07-06 13:37 ` Peter Zijlstra
2021-07-06 11:59 ` Peter Zijlstra
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