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From: Andy Chiu <andy.chiu@sifive.com>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Vineet Gupta <vineetg@rivosinc.com>,
	linux-riscv@lists.infradead.org, palmer@dabbelt.com,
	anup@brainfault.org, atishp@atishpatra.org,
	kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
	greentime.hu@sifive.com, guoren@linux.alibaba.com,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	Andrew Jones <ajones@ventanamicro.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Jisheng Zhang <jszhang@kernel.org>,
	Vincent Chen <vincent.chen@sifive.com>,
	Guo Ren <guoren@kernel.org>, Li Zhengyu <lizhengyu3@huawei.com>,
	Masahiro Yamada <masahiroy@kernel.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH -next v13 10/19] riscv: Allocate user's vector context in the first-use trap
Date: Wed, 15 Feb 2023 22:39:36 +0800	[thread overview]
Message-ID: <CABgGipVvDXdeEfaUivevQJ+dphayPbFh0X3TNCKhHCyFZakZ1Q@mail.gmail.com> (raw)
In-Reply-To: <87wn4jjt8f.fsf@all.your.base.are.belong.to.us>

On Wed, Feb 15, 2023 at 3:14 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Vineet Gupta <vineetg@rivosinc.com> writes:
>
> > On 2/14/23 08:50, Björn Töpel wrote:
> >> Andy Chiu <andy.chiu@sifive.com> writes:
> >>
> >>> Hey Björn,
> >>>
> >>> On Tue, Feb 14, 2023 at 2:43 PM Björn Töpel <bjorn@kernel.org> wrote:
> >>>> So, two changes:
> >>>>
> >>>> 1. Disallow V-enablement if the existing altstack does not fit a V-sized
> >>>>     frame.
> >>> This could potentially break old programs (non-V) that load new system
> >>> libraries (with V), If the program sets a small alt stack and takes
> >>> the fault in some libraries that use V. However, existing
> >>> implementation will also kill the process when the signal arrives,
> >>> finding insufficient stack frame in such cases. I'd choose the second
> >>> one if we only have these two options, because there is a chance that
> >>> the signal handler may not even run.
> >> I think we might have different views here. A process has a pre-V, a and
> >> post-V state. Is allowing a process to enter V without the correct
> >> preconditions a good idea? Allow to run with V turned on, but not able
> >> to correctly handle a signal (the stack is too small)?
> >
> > The requirement is sane, but the issue is user experience: User trying
> > to bring up some V code has no clue that deep in some startup code some
> > alt stack had been setup and causing his process to be terminated on
> > first V code.
> >
> >>
> >> This was the same argument that the Intel folks had when enabling
> >> AMX. Sure, AMX requires *explicit* enablement, but same rules should
> >> apply, no?
> >>
> >>>> 2. Sanitize altstack changes when V is enabled.
> >>> Yes, I'd like to have this. But it may be tricky when it comes to
> >>> deciding whether V is enabled, due to the first-use trap. If V is
> >>> commonly used in system libraries then it is likely that V will be
> >>> enabled before an user set an altstack. Sanitizing this case would be
> >>> easy and straightforward.
> >
> > Good. Lets have this in v14 as it seems reasonably easy to implement.
> >
> >>> But what if the user sets an altstack before
> >>> enabling V in the first-use trap? This could happen on a statically
> >>> program that has hand-written V routines. This takes us to the 1st
> >>> question above, should we fail the user program immediately if the
> >>> altstack is set too small?
> >
> > Please lets not cross threads. We discussed this already at top. While
> > ideally required, seems tricky so lets start with post-V alt stack check.
> >
> >> For me it's obvious to fail (always) "if the altstack is too small to
> >> enable V", because it allows to execute V without proper preconditions.
> >>
> >> Personally, I prefer a stricter model. Only enter V if you can, and
> >> after entering it disallow changing the altstack.
> >>
> >> Then again, this is *my* opinion and concern. What do other people
> >> think? I don't want to stall the series.
> >
> > I concur that the alt stack checking requirements are sensible in the
> > long run. We can add the obvious check for post-V case and see if there
> > is a sane way to flag pre-V case to.
>
> Reasonable. @Andy does this resonate with you as well?
Yes, it makes sense to me. I am making this happen on v14 :)

Thanks,
Andy

WARNING: multiple messages have this Message-ID (diff)
From: Andy Chiu <andy.chiu@sifive.com>
To: "Björn Töpel" <bjorn@kernel.org>
Cc: Vineet Gupta <vineetg@rivosinc.com>,
	linux-riscv@lists.infradead.org,  palmer@dabbelt.com,
	anup@brainfault.org, atishp@atishpatra.org,
	 kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
	greentime.hu@sifive.com,  guoren@linux.alibaba.com,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	Heiko Stuebner <heiko.stuebner@vrull.eu>,
	 Andrew Jones <ajones@ventanamicro.com>,
	 Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	 Conor Dooley <conor.dooley@microchip.com>,
	Jisheng Zhang <jszhang@kernel.org>,
	 Vincent Chen <vincent.chen@sifive.com>,
	Guo Ren <guoren@kernel.org>,  Li Zhengyu <lizhengyu3@huawei.com>,
	Masahiro Yamada <masahiroy@kernel.org>,
	 Richard Henderson <richard.henderson@linaro.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH -next v13 10/19] riscv: Allocate user's vector context in the first-use trap
Date: Wed, 15 Feb 2023 22:39:36 +0800	[thread overview]
Message-ID: <CABgGipVvDXdeEfaUivevQJ+dphayPbFh0X3TNCKhHCyFZakZ1Q@mail.gmail.com> (raw)
In-Reply-To: <87wn4jjt8f.fsf@all.your.base.are.belong.to.us>

On Wed, Feb 15, 2023 at 3:14 PM Björn Töpel <bjorn@kernel.org> wrote:
>
> Vineet Gupta <vineetg@rivosinc.com> writes:
>
> > On 2/14/23 08:50, Björn Töpel wrote:
> >> Andy Chiu <andy.chiu@sifive.com> writes:
> >>
> >>> Hey Björn,
> >>>
> >>> On Tue, Feb 14, 2023 at 2:43 PM Björn Töpel <bjorn@kernel.org> wrote:
> >>>> So, two changes:
> >>>>
> >>>> 1. Disallow V-enablement if the existing altstack does not fit a V-sized
> >>>>     frame.
> >>> This could potentially break old programs (non-V) that load new system
> >>> libraries (with V), If the program sets a small alt stack and takes
> >>> the fault in some libraries that use V. However, existing
> >>> implementation will also kill the process when the signal arrives,
> >>> finding insufficient stack frame in such cases. I'd choose the second
> >>> one if we only have these two options, because there is a chance that
> >>> the signal handler may not even run.
> >> I think we might have different views here. A process has a pre-V, a and
> >> post-V state. Is allowing a process to enter V without the correct
> >> preconditions a good idea? Allow to run with V turned on, but not able
> >> to correctly handle a signal (the stack is too small)?
> >
> > The requirement is sane, but the issue is user experience: User trying
> > to bring up some V code has no clue that deep in some startup code some
> > alt stack had been setup and causing his process to be terminated on
> > first V code.
> >
> >>
> >> This was the same argument that the Intel folks had when enabling
> >> AMX. Sure, AMX requires *explicit* enablement, but same rules should
> >> apply, no?
> >>
> >>>> 2. Sanitize altstack changes when V is enabled.
> >>> Yes, I'd like to have this. But it may be tricky when it comes to
> >>> deciding whether V is enabled, due to the first-use trap. If V is
> >>> commonly used in system libraries then it is likely that V will be
> >>> enabled before an user set an altstack. Sanitizing this case would be
> >>> easy and straightforward.
> >
> > Good. Lets have this in v14 as it seems reasonably easy to implement.
> >
> >>> But what if the user sets an altstack before
> >>> enabling V in the first-use trap? This could happen on a statically
> >>> program that has hand-written V routines. This takes us to the 1st
> >>> question above, should we fail the user program immediately if the
> >>> altstack is set too small?
> >
> > Please lets not cross threads. We discussed this already at top. While
> > ideally required, seems tricky so lets start with post-V alt stack check.
> >
> >> For me it's obvious to fail (always) "if the altstack is too small to
> >> enable V", because it allows to execute V without proper preconditions.
> >>
> >> Personally, I prefer a stricter model. Only enter V if you can, and
> >> after entering it disallow changing the altstack.
> >>
> >> Then again, this is *my* opinion and concern. What do other people
> >> think? I don't want to stall the series.
> >
> > I concur that the alt stack checking requirements are sensible in the
> > long run. We can add the obvious check for post-V case and see if there
> > is a sane way to flag pre-V case to.
>
> Reasonable. @Andy does this resonate with you as well?
Yes, it makes sense to me. I am making this happen on v14 :)

Thanks,
Andy

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linux-riscv mailing list
linux-riscv@lists.infradead.org
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  reply	other threads:[~2023-02-15 14:40 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-25 14:20 [PATCH -next v13 00/19] riscv: Add vector ISA support Andy Chiu
2023-01-25 14:20 ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 01/19] riscv: Rename __switch_to_aux -> fpu Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 21:15   ` Conor Dooley
2023-01-25 21:15     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 02/19] riscv: Extending cpufeature.c to detect V-extension Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 21:33   ` Conor Dooley
2023-01-25 21:33     ` Conor Dooley
2023-01-28  7:09     ` Guo Ren
2023-01-28  7:09       ` Guo Ren
2023-01-28 10:28       ` Conor Dooley
2023-01-28 10:28         ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 03/19] riscv: Add new csr defines related to vector extension Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 22:16   ` Conor Dooley
2023-01-25 22:16     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 04/19] riscv: Clear vector regfile on bootup Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 21:54   ` Conor Dooley
2023-01-25 21:54     ` Conor Dooley
2023-01-25 21:57     ` Vineet Gupta
2023-01-25 21:57       ` Vineet Gupta
2023-01-25 22:18       ` Conor Dooley
2023-01-25 22:18         ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 05/19] riscv: Disable Vector Instructions for kernel itself Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 21:51   ` Conor Dooley
2023-01-25 21:51     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 06/19] riscv: Introduce Vector enable/disable helpers Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 21:06   ` Conor Dooley
2023-01-26 21:06     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 07/19] riscv: Introduce riscv_vsize to record size of Vector context Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 21:24   ` Conor Dooley
2023-01-26 21:24     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 08/19] riscv: Introduce struct/helpers to save/restore per-task Vector state Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 21:32   ` Conor Dooley
2023-01-26 21:32     ` Conor Dooley
2023-01-25 14:20 ` [PATCH -next v13 09/19] riscv: Add task switch support for vector Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 21:44   ` Conor Dooley
2023-01-26 21:44     ` Conor Dooley
2023-01-31  2:55   ` Vineet Gupta
2023-01-31  2:55     ` Vineet Gupta
2023-01-25 14:20 ` [PATCH -next v13 10/19] riscv: Allocate user's vector context in the first-use trap Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 23:11   ` Conor Dooley
2023-01-26 23:11     ` Conor Dooley
2023-02-06 12:00     ` Andy Chiu
2023-02-06 12:00       ` Andy Chiu
2023-02-06 13:40       ` Conor Dooley
2023-02-06 13:40         ` Conor Dooley
2023-02-10 12:00         ` Andy Chiu
2023-02-10 12:00           ` Andy Chiu
2023-02-07 14:36   ` Björn Töpel
2023-02-07 14:36     ` Björn Töpel
2023-02-13 22:54     ` Vineet Gupta
2023-02-13 22:54       ` Vineet Gupta
2023-02-14  6:43       ` Björn Töpel
2023-02-14  6:43         ` Björn Töpel
2023-02-14 15:36         ` Andy Chiu
2023-02-14 15:36           ` Andy Chiu
2023-02-14 16:50           ` Björn Töpel
2023-02-14 16:50             ` Björn Töpel
2023-02-14 17:24             ` Vineet Gupta
2023-02-14 17:24               ` Vineet Gupta
2023-02-15  7:14               ` Björn Töpel
2023-02-15  7:14                 ` Björn Töpel
2023-02-15 14:39                 ` Andy Chiu [this message]
2023-02-15 14:39                   ` Andy Chiu
2023-02-07 21:18   ` Vineet Gupta
2023-02-07 21:18     ` Vineet Gupta
2023-02-08  9:20     ` Björn Töpel
2023-02-08  9:20       ` Björn Töpel
2023-01-25 14:20 ` [PATCH -next v13 11/19] riscv: Add ptrace vector support Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 12/19] riscv: signal: check fp-reserved words unconditionally Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 13/19] riscv: signal: Add sigcontext save/restore for vector Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 14/19] riscv: signal: Report signal frame size to userspace via auxv Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-26 23:19   ` Conor Dooley
2023-01-26 23:19     ` Conor Dooley
2023-01-31 12:34     ` Andy Chiu
2023-01-31 12:34       ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 15/19] riscv: Fix a kernel panic issue if $s2 is set to a specific value before entering Linux Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-27 20:31   ` Conor Dooley
2023-01-27 20:31     ` Conor Dooley
2023-01-31 12:34     ` Andy Chiu
2023-01-31 12:34       ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 16/19] riscv: Add V extension to KVM ISA Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-27 20:43   ` Conor Dooley
2023-01-27 20:43     ` Conor Dooley
2023-01-30  9:58     ` Andy Chiu
2023-01-30  9:58       ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 17/19] riscv: KVM: Add vector lazy save/restore support Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 18/19] riscv: kvm: redirect illegal instruction traps to guests Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-27 11:28   ` Anup Patel
2023-01-27 11:28     ` Anup Patel
2023-01-30  8:18     ` Andy Chiu
2023-01-30  8:18       ` Andy Chiu
2023-01-25 14:20 ` [PATCH -next v13 19/19] riscv: Enable Vector code to be built Andy Chiu
2023-01-25 14:20   ` Andy Chiu
2023-01-25 21:04   ` Conor Dooley
2023-01-25 21:04     ` Conor Dooley
2023-01-25 21:38     ` Jessica Clarke
2023-01-25 21:38       ` Jessica Clarke
2023-01-25 22:24       ` Conor Dooley
2023-01-25 22:24         ` Conor Dooley
2023-01-30  6:38     ` Andy Chiu
2023-01-30  6:38       ` Andy Chiu
2023-01-30 18:38       ` Vineet Gupta
2023-01-30 18:38         ` Vineet Gupta
2023-01-30  7:46     ` Andy Chiu
2023-01-30  7:46       ` Andy Chiu
2023-01-30  8:13       ` Conor Dooley
2023-01-30  8:13         ` Conor Dooley
2023-02-08 18:19         ` Conor Dooley
2023-02-08 18:19           ` Conor Dooley

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