[U-Boot] [PATCH v5 4/4] riscv: Remove redundant a2 store on DRAM base in start.S

[Bin Meng <bmeng.cn@gmail.com>]

On Tue, Nov 27, 2018 at 11:28 AM Anup Patel <anup@brainfault.org> wrote:
>
> On Tue, Nov 27, 2018 at 8:50 AM Rick Chen <rickchen36@gmail.com> wrote:
> >
> > > > > > Currently, the RISC-V U-Boot is saving a2 register at
> > > > > > CONFIG_SYS_DRAM_BASE in start.S which does not make sense because
> > > > > > there is no information passed by previous booting stage in a2
> > > > > > register.
> > > > > >
> > > > > > This patch removes redundant a2 store on DRAM base.
> > > > > >
> > > > > > Signed-off-by: Anup Patel <anup@brainfault.org>
> > > > > > ---
> > > > > >  arch/riscv/cpu/start.S | 2 --
> > > > > >  1 file changed, 2 deletions(-)
> > > > > >
> > > > > > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index
> > > > > > 704190f946..e4276e8e19 100644
> > > > > > --- a/arch/riscv/cpu/start.S
> > > > > > +++ b/arch/riscv/cpu/start.S
> > > > > > @@ -38,8 +38,6 @@ _start:
> > > > > >         mv      s0, a0
> > > > > >         mv      s1, a1
> > > > > >
> > > > > > -       li      t0, CONFIG_SYS_SDRAM_BASE
> > > > > > -       SREG    a2, 0(t0)
> > > > > >         la      t0, trap_entry
> > > > > >  #ifdef CONFIG_RISCV_SMODE
> > > > > >         csrw    stvec, t0
> > > > > > --
> > > > >
> > > > > This is weird. I remember these two lines were already removed by
> > > > > Lukas's patch series before? Did not have time to dig out the history
> > > > > though.
> > > > >
> >
> > > > > Regards,
> > > > > Bin
> > > >
> > > > You are correct, however I removed it again, because I did not want to break
> > > > Rick's board. He did add a commit to the last pull request that removes these
> > > > two lines and adjusts his board accordingly, but it is not in the current one.
> > > >
> >
> > Hi Likas
> >
> > Thanks for your explanation.
> >
> > RIck's commit as below
> > https://www.mail-archive.com/u-boot at lists.denx.de/msg305880.html
>
> When we run U-Boot in S-mode the BBL runs from 0x80000000 so this
> two lines corrupts BBL instructions.
>
> If this is important for some board then please have it around #ifdef.
>

Please don't do any #ifdef here. That codes should be removed, and we
should figure out a way that does not break the ax25-ae350 board.

> My apologies for the noise.

Regards,
Bin