From: Olof Johansson <olof@lixom.net>
To: "Turquette, Mike" <mturquette@ti.com>
Cc: Aneesh V <aneesh@ti.com>, "Cousson, Benoit" <b-cousson@ti.com>,
Tony Lindgren <tony@atomide.com>,
Rob Herring <robherring2@gmail.com>,
devicetree-discuss@lists.ozlabs.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Vishwanath Sripathy <vishwanath.bs@ti.com>
Subject: Re: [RFC v2 PATCH 0/3] dt: device tree bindings and data for EMIF and DDR
Date: Thu, 19 Jan 2012 11:26:55 -0800 [thread overview]
Message-ID: <CAOesGMgrfZpGhKx1yHir6WEELm5ntG5GJD3YccOvVO+HhZc6NQ@mail.gmail.com> (raw)
In-Reply-To: <CAJOA=zNuVQ9zjhmA5Uc=ksOM2Q7AE4g9ddPDJ3e+QPnUfui4wA@mail.gmail.com>
Hi,
On Mon, Jan 16, 2012 at 11:15 AM, Turquette, Mike <mturquette@ti.com> wrote:
> And delaying DVFS (at least for the parts affecting mem) until
> userspace is loaded doesn't seem great to me either. We're basically
> pushing back feature readiness (with respect to boot sequence) in the
> name of organizing data in a pretty way... but it's not a pretty
> solution since the data will have to be "split" as shown above.
Ok, so let's put the JEDEC SPD data in the device tree then. But I
fail to see how that changes the "split"? There's still two sources of
configuration, one from firmware used at boot and one from a data
structure that the kernel uses.
I do think sticking to an existing well-defined data structure such as
SPD data is to be preferred over doing an open-coded new binding. This
way, some platforms that might or might not have SPD in hardware can
use the same code paths (i.e. a board that has memory on a DIMM
instead of soldered down, or that uses soldered-down SPD).
-Olof
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WARNING: multiple messages have this Message-ID (diff)
From: olof@lixom.net (Olof Johansson)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC v2 PATCH 0/3] dt: device tree bindings and data for EMIF and DDR
Date: Thu, 19 Jan 2012 11:26:55 -0800 [thread overview]
Message-ID: <CAOesGMgrfZpGhKx1yHir6WEELm5ntG5GJD3YccOvVO+HhZc6NQ@mail.gmail.com> (raw)
In-Reply-To: <CAJOA=zNuVQ9zjhmA5Uc=ksOM2Q7AE4g9ddPDJ3e+QPnUfui4wA@mail.gmail.com>
Hi,
On Mon, Jan 16, 2012 at 11:15 AM, Turquette, Mike <mturquette@ti.com> wrote:
> And delaying DVFS (at least for the parts affecting mem) until
> userspace is loaded doesn't seem great to me either. ?We're basically
> pushing back feature readiness (with respect to boot sequence) in the
> name of organizing data in a pretty way... but it's not a pretty
> solution since the data will have to be "split" as shown above.
Ok, so let's put the JEDEC SPD data in the device tree then. But I
fail to see how that changes the "split"? There's still two sources of
configuration, one from firmware used at boot and one from a data
structure that the kernel uses.
I do think sticking to an existing well-defined data structure such as
SPD data is to be preferred over doing an open-coded new binding. This
way, some platforms that might or might not have SPD in hardware can
use the same code paths (i.e. a board that has memory on a DIMM
instead of soldered down, or that uses soldered-down SPD).
-Olof
next prev parent reply other threads:[~2012-01-19 19:26 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-19 14:05 [RFC v2 PATCH 0/3] dt: device tree bindings and data for EMIF and DDR Aneesh V
2011-12-19 14:05 ` Aneesh V
2011-12-19 14:05 ` [RFC v2 PATCH 1/3] dt: device tree bindings for DDR memories Aneesh V
2011-12-19 14:05 ` Aneesh V
2011-12-19 16:52 ` Olof Johansson
2011-12-19 16:52 ` Olof Johansson
2011-12-20 7:09 ` Aneesh V
2011-12-20 7:09 ` Aneesh V
2012-01-19 12:18 ` Aneesh V
2012-01-19 12:18 ` Aneesh V
2011-12-19 14:05 ` [RFC v2 PATCH 2/3] dt: device tree bindings for TI's EMIF sdram controller Aneesh V
2011-12-19 14:05 ` Aneesh V
2011-12-19 16:56 ` Olof Johansson
2011-12-19 16:56 ` Olof Johansson
2011-12-20 7:12 ` Aneesh V
2011-12-20 7:12 ` Aneesh V
2011-12-19 16:59 ` Olof Johansson
2011-12-19 16:59 ` Olof Johansson
2011-12-20 7:19 ` Aneesh V
2011-12-20 7:19 ` Aneesh V
2011-12-19 14:05 ` [RFC v2 PATCH 3/3] arm/dts: EMIF and lpddr2 device tree data for OMAP4 boards Aneesh V
2011-12-19 14:05 ` Aneesh V
2011-12-19 23:01 ` [RFC v2 PATCH 0/3] dt: device tree bindings and data for EMIF and DDR Rob Herring
2011-12-19 23:01 ` Rob Herring
2011-12-19 23:35 ` Tony Lindgren
2011-12-19 23:35 ` Tony Lindgren
2011-12-20 10:44 ` Aneesh V
2011-12-20 10:44 ` Aneesh V
2011-12-20 12:40 ` Cousson, Benoit
2011-12-20 12:40 ` Cousson, Benoit
2011-12-20 14:08 ` Aneesh V
2011-12-20 14:08 ` Aneesh V
2012-01-08 17:23 ` Aneesh V
2012-01-08 17:23 ` Aneesh V
2012-01-09 5:42 ` Olof Johansson
2012-01-09 5:42 ` Olof Johansson
2012-01-13 19:36 ` Aneesh V
2012-01-13 19:36 ` Aneesh V
2012-01-16 19:15 ` Turquette, Mike
2012-01-16 19:15 ` Turquette, Mike
2012-01-19 19:26 ` Olof Johansson [this message]
2012-01-19 19:26 ` Olof Johansson
2012-01-17 12:06 ` Aneesh V
2012-01-17 12:06 ` Aneesh V
2011-12-20 10:16 ` Aneesh V
2011-12-20 10:16 ` Aneesh V
2012-01-19 14:28 ` Aneesh V
2012-01-19 14:28 ` Aneesh V
2012-01-19 14:31 ` Aneesh V
2012-01-19 14:31 ` Aneesh V
2012-01-19 14:28 ` [PATCH 1/3] dt: device tree bindings for DDR memories Aneesh V
2012-01-19 14:28 ` Aneesh V
2012-01-19 14:28 ` [PATCH 2/3] dt: device tree bindings for TI's EMIF sdram controller Aneesh V
2012-01-19 14:28 ` Aneesh V
2012-01-19 14:28 ` [PATCH 3/3] arm/dts: EMIF and lpddr2 device tree data for OMAP4 boards Aneesh V
2012-01-19 14:28 ` Aneesh V
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