Re: [PATCH 00/12] riscv: Allwinner D1 platform support

From: "Arnd Bergmann" <arnd@arndb.de>
To: "Geert Uytterhoeven" <geert@linux-m68k.org>,
	"Conor.Dooley" <Conor.Dooley@microchip.com>
Cc: "Jernej Skrabec" <jernej.skrabec@gmail.com>,
	"Samuel Holland" <samuel@sholland.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Chen-Yu Tsai" <wens@csie.org>,
	linux-sunxi@lists.linux.dev,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Olof Johansson" <olof@lixom.net>
Subject: Re: [PATCH 00/12] riscv: Allwinner D1 platform support
Date: Thu, 08 Sep 2022 11:04:45 +0200	[thread overview]
Message-ID: <d03941e4-5ea6-4ff3-887a-423f5caedf4c@www.fastmail.com> (raw)
In-Reply-To: <CAMuHMdWVcoHqPa5AqoPqvw=ZuHdqG7p5HWOHUx9ecNZvzUG4Xw@mail.gmail.com>

On Thu, Sep 8, 2022, at 9:00 AM, Geert Uytterhoeven wrote:
> On Wed, Sep 7, 2022 at 10:43 PM <Conor.Dooley@microchip.com> wrote:
>> On 06/09/2022 21:29, Jernej Škrabec wrote:
>> > Dne četrtek, 01. september 2022 ob 20:10:13 CEST je Palmer Dabbelt napisal(a):
>> >> On Sun, 14 Aug 2022 22:08:03 PDT (-0700), samuel@sholland.org wrote:
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts create
>> >>>  mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi create
>> >>>  mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
>> >>>  create mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts create
>> >>>  mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts
>> >>>  create mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts
>> >>>  create mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi create
>> >>>  mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts
>> >>>  create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts
>> >>>  create mode 100644
>> >>>  arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dts create mode
>> >>>  100644 arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts create mode
>> >>>  100644 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
>> >>
>> >> I'm assuming these are aimed at the RISC-V tree?  I'm generally OK with
>> >> that, though the DT folks have pointed out a handful of issues that look
>> >> pretty reasonable to me.
>> >
>> > DT changes for Allwinner ARM SoCs go trough sunxi tree. Should this be handled
>> > differently for RISC-V?
>>
>> Microchip RISC-V DT go via a Microchip tree to Palmer. The other stuff gets
>> picked directly by him as it has no clear "owner". I think it would be nice
>> to be consistent for the new {renesas,sunxi} stuff and send those via vendor
>> trees to Palmer too. Just my 2 cents...
>
> Wasn't the intention behind the rename s/arm-soc/soc/ to start
> accepting PRs for non-arm DT, too?
> Especially if we start having dependencies due to riscv DTS files
> including arm64 DTS snippets through scripts/dtc/include-prefixes/arm64/.

Yes, absolutely. My impression was that most architecture
maintainers prefer to handle the SoC support themselves, and
I would not want to step on anyone's toes with this, but I'm
definitely happy to take pull requests for dts files etc on
any architecture if that helps.

    Arnd