From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 10/16] drm/i915/guc/slpc: Add debugfs for slpc info
Date: Sat, 10 Jul 2021 20:08:12 +0200 [thread overview]
Message-ID: <181d8958-362d-5c00-9e0b-858275272f8f@intel.com> (raw)
In-Reply-To: <20210710012026.19705-11-vinay.belgaumkar@intel.com>
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
> This prints out relevant SLPC info from the SLPC shared structure.
>
> We will send a h2g message which forces SLPC to update the
> shared data structure with latest information before reading it.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 16 ++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 53 +++++++++++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 3 ++
> 3 files changed, 72 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> index 9a03ff56e654..bef749e54601 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> @@ -12,6 +12,7 @@
> #include "gt/uc/intel_guc_ct.h"
> #include "gt/uc/intel_guc_ads.h"
> #include "gt/uc/intel_guc_submission.h"
> +#include "gt/uc/intel_guc_slpc.h"
>
> static int guc_info_show(struct seq_file *m, void *data)
> {
> @@ -50,11 +51,26 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
> }
> DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
>
> +static int guc_slpc_info_show(struct seq_file *m, void *unused)
> +{
> + struct intel_guc *guc = m->private;
> + struct intel_guc_slpc *slpc = &guc->slpc;
> + struct drm_printer p = drm_seq_file_printer(m);
> +
> + if (!intel_guc_slpc_is_used(guc))
> + return -ENODEV;
> +
> + return intel_guc_slpc_info(slpc, &p);
> +}
> +
other entries don't have empty line here
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
> +
> void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
> {
> static const struct debugfs_gt_file files[] = {
> { "guc_info", &guc_info_fops, NULL },
> { "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
> + { "guc_slpc_info", &guc_slpc_info_fops, NULL},
IIRC last field is "eval" where maybe you could add your own to check if
intel_guc_slpc_is_used() to avoid exposing this info if N/A
> };
>
> if (!intel_guc_is_supported(guc))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index 98a283d31734..d179ba14ece6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -432,6 +432,59 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
> return 0;
> }
>
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p)
> +{
> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
> + struct slpc_shared_data *data;
> + struct slpc_platform_info *platform_info;
> + struct slpc_task_state_data *task_state_data;
> + intel_wakeref_t wakeref;
> + int ret = 0;
> +
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> + if (slpc_read_task_state(slpc)) {
> + ret = -EIO;
> + goto done;
> + }
> +
> + GEM_BUG_ON(!slpc->vma);
> +
> + drm_clflush_virt_range(slpc->vaddr, sizeof(struct slpc_shared_data));
likely will go away if integrated into slpc_read_task_state
> + data = slpc->vaddr;
> +
> + platform_info = &data->platform_info;
is this used ?
> + task_state_data = &data->task_state_data;
as it looks that you treat these sections separately, then maybe it
would be cleaner to have:
static void print_global_data(*global_data, *p) {}
static void print_platform_info(*platform_info, *p) {}
static void print_task_state_data(*task_state_data, *p) {}
> +
> + drm_printf(p, "SLPC state: %s\n", slpc_state_stringify(data->global_state));
> + drm_printf(p, "\tgtperf task active: %d\n",
> + task_state_data->gtperf_task_active);
> + drm_printf(p, "\tdcc task active: %d\n",
> + task_state_data->dcc_task_active);
> + drm_printf(p, "\tin dcc: %d\n",
> + task_state_data->in_dcc);
> + drm_printf(p, "\tfreq switch active: %d\n",
> + task_state_data->freq_switch_active);
> + drm_printf(p, "\tibc enabled: %d\n",
> + task_state_data->ibc_enabled);
> + drm_printf(p, "\tibc active: %d\n",
> + task_state_data->ibc_active);
> + drm_printf(p, "\tpg1 enabled: %s\n",
> + yesno(task_state_data->pg1_enabled));
> + drm_printf(p, "\tpg1 active: %s\n",
> + yesno(task_state_data->pg1_active));
> + drm_printf(p, "\tmax freq: %dMHz\n",
> + DIV_ROUND_CLOSEST(data->task_state_data.max_unslice_freq *
> + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER));
> + drm_printf(p, "\tmin freq: %dMHz\n",
> + DIV_ROUND_CLOSEST(data->task_state_data.min_unslice_freq *
> + GT_FREQUENCY_MULTIPLIER, GEN9_FREQ_SCALER));
you defined task_state_data but in above 2 you're accessing it from data
Michal
> +
> +done:
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> + return ret;
> +}
> +
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
> {
> if (!slpc->vma)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> index 2cb830cdacb5..cd12c5f19f4b 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> @@ -10,6 +10,8 @@
> #include <linux/mutex.h>
> #include "intel_guc_slpc_fwif.h"
>
> +struct drm_printer;
> +
> struct intel_guc_slpc {
> /*Protects access to vma and SLPC actions */
> struct i915_vma *vma;
> @@ -38,5 +40,6 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
> int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
>
> #endif
>
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next prev parent reply other threads:[~2021-07-10 18:08 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-10 1:20 [Intel-gfx] [PATCH 00/16] Enable GuC based power management features Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 01/16] drm/i915/guc: Squashed patch - DO NOT REVIEW Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc Vinay Belgaumkar
2021-07-10 14:27 ` Michal Wajdeczko
2021-07-12 18:40 ` Belgaumkar, Vinay
2021-07-12 23:43 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 03/16] drm/i915/guc/slpc: Gate Host RPS when slpc is enabled Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 04/16] drm/i915/guc/slpc: Lay out slpc init/enable/disable/fini Vinay Belgaumkar
2021-07-10 14:35 ` Michal Wajdeczko
2021-07-13 0:37 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 05/16] drm/i915/guc/slpc: Adding slpc communication interfaces Vinay Belgaumkar
2021-07-10 15:52 ` Michal Wajdeczko
2021-07-13 23:22 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc Vinay Belgaumkar
2021-07-10 16:05 ` Michal Wajdeczko
2021-07-14 1:40 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 07/16] drm/i915/guc/slpc: Enable slpc and add related H2G events Vinay Belgaumkar
2021-07-10 17:37 ` Michal Wajdeczko
2021-07-15 1:58 ` Belgaumkar, Vinay
2021-07-21 17:36 ` Michal Wajdeczko
2021-07-10 1:20 ` [Intel-gfx] [PATCH 08/16] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-10 3:07 ` kernel test robot
2021-07-10 5:17 ` kernel test robot
2021-07-10 17:47 ` Michal Wajdeczko
2021-07-16 18:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 09/16] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-10 17:52 ` Michal Wajdeczko
2021-07-20 22:08 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 10/16] drm/i915/guc/slpc: Add debugfs for slpc info Vinay Belgaumkar
2021-07-10 18:08 ` Michal Wajdeczko [this message]
2021-07-20 23:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 11/16] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 12/16] drm/i915/guc/slpc: Cache platform frequency limits for slpc Vinay Belgaumkar
2021-07-10 18:15 ` Michal Wajdeczko
2021-07-17 19:30 ` Belgaumkar, Vinay
2021-07-20 23:05 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 13/16] drm/i915/guc/slpc: Update slpc to use platform min/max Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc Vinay Belgaumkar
2021-07-10 6:18 ` kernel test robot
2021-07-10 7:30 ` kernel test robot
2021-07-10 7:30 ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: intel_rps_read_punit_req() can be static kernel test robot
2021-07-10 13:54 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc kernel test robot
2021-07-10 18:20 ` Michal Wajdeczko
2021-07-20 23:38 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 15/16] drm/i915/guc/slpc: slpc selftest Vinay Belgaumkar
2021-07-10 18:29 ` Michal Wajdeczko
2021-07-21 1:06 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 16/16] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-10 18:41 ` Michal Wajdeczko
2021-07-21 1:11 ` Belgaumkar, Vinay
2021-07-10 1:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC based power management features Patchwork
2021-07-10 1:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-10 2:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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