From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc
Date: Sat, 10 Jul 2021 18:05:11 +0200 [thread overview]
Message-ID: <d561e568-5e4e-f038-9d99-75d75a43951a@intel.com> (raw)
In-Reply-To: <20210710012026.19705-7-vinay.belgaumkar@intel.com>
On 10.07.2021 03:20, Vinay Belgaumkar wrote:
> Allocate data structures for SLPC and functions for
> initializing on host side.
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 11 +++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 36 ++++++++++++++++++++-
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 20 ++++++++++++
> 3 files changed, 66 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 9d61b2d54de4..82863a9bc8e8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -336,6 +336,12 @@ int intel_guc_init(struct intel_guc *guc)
> goto err_ct;
> }
>
> + if (intel_guc_slpc_is_used(guc)) {
> + ret = intel_guc_slpc_init(&guc->slpc);
> + if (ret)
> + goto err_submission;
> + }
> +
> /* now that everything is perma-pinned, initialize the parameters */
> guc_init_params(guc);
>
> @@ -346,6 +352,8 @@ int intel_guc_init(struct intel_guc *guc)
>
> return 0;
>
> +err_submission:
> + intel_guc_submission_fini(guc);
> err_ct:
> intel_guc_ct_fini(&guc->ct);
> err_ads:
> @@ -368,6 +376,9 @@ void intel_guc_fini(struct intel_guc *guc)
>
> i915_ggtt_disable_guc(gt->ggtt);
>
> + if (intel_guc_slpc_is_used(guc))
> + intel_guc_slpc_fini(&guc->slpc);
> +
> if (intel_guc_submission_is_used(guc))
> intel_guc_submission_fini(guc);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index c1f569d2300d..94e2f19951aa 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -4,11 +4,41 @@
> * Copyright © 2020 Intel Corporation
> */
>
> +#include <asm/msr-index.h>
hmm, what exactly is needed from this header ?
> +
> +#include "gt/intel_gt.h"
> +#include "gt/intel_rps.h"
> +
> +#include "i915_drv.h"
> #include "intel_guc_slpc.h"
> +#include "intel_pm.h"
> +
> +static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
> +{
> + return container_of(slpc, struct intel_guc, slpc);
> +}
> +
> +static int slpc_shared_data_init(struct intel_guc_slpc *slpc)
> +{
> + struct intel_guc *guc = slpc_to_guc(slpc);
> + int err;
> + u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
move err decl here
> +
> + err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, &slpc->vaddr);
> + if (unlikely(err)) {
> + DRM_ERROR("Failed to allocate slpc struct (err=%d)\n", err);
s/slpc/SLPC
and use drm_err instead
and you may also want to print error as %pe
> + i915_vma_unpin_and_release(&slpc->vma, I915_VMA_RELEASE_MAP);
do you really need this ?
> + return err;
> + }
> +
> + return err;
> +}
>
> int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
> {
> - return 0;
> + GEM_BUG_ON(slpc->vma);
> +
> + return slpc_shared_data_init(slpc);
> }
>
> /*
> @@ -31,4 +61,8 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
>
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
> {
> + if (!slpc->vma)
> + return;
> +
> + i915_vma_unpin_and_release(&slpc->vma, I915_VMA_RELEASE_MAP);
> }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> index 98036459a1a3..a2643b904165 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> @@ -3,12 +3,32 @@
> *
> * Copyright © 2020 Intel Corporation
> */
> +
should be fixed in earlier patch
> #ifndef _INTEL_GUC_SLPC_H_
> #define _INTEL_GUC_SLPC_H_
>
> +#include <linux/mutex.h>
> #include "intel_guc_slpc_fwif.h"
>
> struct intel_guc_slpc {
> + /*Protects access to vma and SLPC actions */
hmm, missing mutex ;)
> + struct i915_vma *vma;
> + void *vaddr;
no need to be void, define it as ptr to slpc_shared_data
> +
> + /* platform frequency limits */
> + u32 min_freq;
> + u32 rp0_freq;
> + u32 rp1_freq;
> +
> + /* frequency softlimits */
> + u32 min_freq_softlimit;
> + u32 max_freq_softlimit;
> +
> + struct {
> + u32 param_id;
> + u32 param_value;
> + u32 param_override;
> + } debug;
can you add all these extra fields in patches which will need them?
Michal
> };
>
> int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
>
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next prev parent reply other threads:[~2021-07-10 16:05 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-10 1:20 [Intel-gfx] [PATCH 00/16] Enable GuC based power management features Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 01/16] drm/i915/guc: Squashed patch - DO NOT REVIEW Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc Vinay Belgaumkar
2021-07-10 14:27 ` Michal Wajdeczko
2021-07-12 18:40 ` Belgaumkar, Vinay
2021-07-12 23:43 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 03/16] drm/i915/guc/slpc: Gate Host RPS when slpc is enabled Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 04/16] drm/i915/guc/slpc: Lay out slpc init/enable/disable/fini Vinay Belgaumkar
2021-07-10 14:35 ` Michal Wajdeczko
2021-07-13 0:37 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 05/16] drm/i915/guc/slpc: Adding slpc communication interfaces Vinay Belgaumkar
2021-07-10 15:52 ` Michal Wajdeczko
2021-07-13 23:22 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc Vinay Belgaumkar
2021-07-10 16:05 ` Michal Wajdeczko [this message]
2021-07-14 1:40 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 07/16] drm/i915/guc/slpc: Enable slpc and add related H2G events Vinay Belgaumkar
2021-07-10 17:37 ` Michal Wajdeczko
2021-07-15 1:58 ` Belgaumkar, Vinay
2021-07-21 17:36 ` Michal Wajdeczko
2021-07-10 1:20 ` [Intel-gfx] [PATCH 08/16] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-10 3:07 ` kernel test robot
2021-07-10 5:17 ` kernel test robot
2021-07-10 17:47 ` Michal Wajdeczko
2021-07-16 18:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 09/16] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-10 17:52 ` Michal Wajdeczko
2021-07-20 22:08 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 10/16] drm/i915/guc/slpc: Add debugfs for slpc info Vinay Belgaumkar
2021-07-10 18:08 ` Michal Wajdeczko
2021-07-20 23:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 11/16] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 12/16] drm/i915/guc/slpc: Cache platform frequency limits for slpc Vinay Belgaumkar
2021-07-10 18:15 ` Michal Wajdeczko
2021-07-17 19:30 ` Belgaumkar, Vinay
2021-07-20 23:05 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 13/16] drm/i915/guc/slpc: Update slpc to use platform min/max Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc Vinay Belgaumkar
2021-07-10 6:18 ` kernel test robot
2021-07-10 7:30 ` kernel test robot
2021-07-10 7:30 ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: intel_rps_read_punit_req() can be static kernel test robot
2021-07-10 13:54 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc kernel test robot
2021-07-10 18:20 ` Michal Wajdeczko
2021-07-20 23:38 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 15/16] drm/i915/guc/slpc: slpc selftest Vinay Belgaumkar
2021-07-10 18:29 ` Michal Wajdeczko
2021-07-21 1:06 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 16/16] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-10 18:41 ` Michal Wajdeczko
2021-07-21 1:11 ` Belgaumkar, Vinay
2021-07-10 1:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC based power management features Patchwork
2021-07-10 1:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-10 2:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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