From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc
Date: Mon, 12 Jul 2021 16:43:20 -0700 [thread overview]
Message-ID: <ade31c78-8e49-cd22-75f1-1ef3910013d3@intel.com> (raw)
In-Reply-To: <1e1debcc-3439-10ac-6c58-8be5f56340da@intel.com>
On 7/10/2021 7:27 AM, Michal Wajdeczko wrote:
> Hi Vinay,
>
> On 10.07.2021 03:20, Vinay Belgaumkar wrote:
>> Add macros to check for slpc support. This feature is currently supported
>> for gen12+ and enabled whenever guc submission is enabled/selected.
>
> please try to use consistent names across all patches:
>
> s/slpc/SLPC
> s/gen12/Gen12
> s/guc/GuC
Ok.
>
>>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 +
>> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 2 ++
>> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 21 +++++++++++++++++++
>> .../gpu/drm/i915/gt/uc/intel_guc_submission.h | 16 ++++++++++++++
>> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 6 ++++--
>> drivers/gpu/drm/i915/gt/uc/intel_uc.h | 1 +
>> 6 files changed, 45 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> index 979128e28372..b9a809f2d221 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>> @@ -157,6 +157,7 @@ void intel_guc_init_early(struct intel_guc *guc)
>> intel_guc_ct_init_early(&guc->ct);
>> intel_guc_log_init_early(&guc->log);
>> intel_guc_submission_init_early(guc);
>> + intel_guc_slpc_init_early(guc);
>>
>> mutex_init(&guc->send_mutex);
>> spin_lock_init(&guc->irq_lock);
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> index 5d94cf482516..e5a456918b88 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
>> @@ -57,6 +57,8 @@ struct intel_guc {
>>
>> bool submission_supported;
>> bool submission_selected;
>> + bool slpc_supported;
>> + bool slpc_selected;
>>
>> struct i915_vma *ads_vma;
>> struct __guc_ads_blob *ads_blob;
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> index 9c102bf0c8e3..e2644a05f298 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
>> @@ -2351,6 +2351,27 @@ void intel_guc_submission_init_early(struct intel_guc *guc)
>> guc->submission_selected = __guc_submission_selected(guc);
>> }
>>
>> +static bool __guc_slpc_supported(struct intel_guc *guc)
>
> hmm, easy to confuse with intel_guc_slpc_is_supported, so maybe:
>
> __detect_slpc_supported()
>
> (yes, I know you were following code above)
>
>> +{
>> + /* GuC slpc is unavailable for pre-Gen12 */
>
> s/slpc/SLPC
Ok.
>
>> + return guc->submission_supported &&
>> + GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12;
>> +}
>> +
>> +static bool __guc_slpc_selected(struct intel_guc *guc)
>> +{
>> + if (!intel_guc_slpc_is_supported(guc))
>> + return false;
>> +
>> + return guc->submission_selected;
>> +}
>> +
>> +void intel_guc_slpc_init_early(struct intel_guc *guc)
>> +{
>> + guc->slpc_supported = __guc_slpc_supported(guc);
>> + guc->slpc_selected = __guc_slpc_selected(guc);
>> +}
>
> in patch 4/16 you are introducing intel_guc_slpc.c|h so to have proper
> encapsulation better to define this function as
>
> void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc) { }
>
> and move it to intel_guc_slpc.c
done.
>
>> +
>> static inline struct intel_context *
>> g2h_context_lookup(struct intel_guc *guc, u32 desc_idx)
>> {
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> index be767eb6ff71..7ae5fd052faf 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
>> @@ -13,6 +13,7 @@
>> struct drm_printer;
>> struct intel_engine_cs;
>>
>> +void intel_guc_slpc_init_early(struct intel_guc *guc);
>
> it really does not belong to this .h
>
>> void intel_guc_submission_init_early(struct intel_guc *guc);
>> int intel_guc_submission_init(struct intel_guc *guc);
>> void intel_guc_submission_enable(struct intel_guc *guc);
>> @@ -50,4 +51,19 @@ static inline bool intel_guc_submission_is_used(struct intel_guc *guc)
>> return intel_guc_is_used(guc) && intel_guc_submission_is_wanted(guc);
>> }
>>
>> +static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
>> +{
>> + return guc->slpc_supported;
>> +}
>> +
>> +static inline bool intel_guc_slpc_is_wanted(struct intel_guc *guc)
>> +{
>> + return guc->slpc_selected;
>> +}
>> +
>> +static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
>> +{
>> + return intel_guc_submission_is_used(guc) && intel_guc_slpc_is_wanted(guc);
>> +}
>
> did you try to define them in intel_guc_slpc.h ?
>
> note that to avoid circular dependencies you can define slpc struct in
> intel_guc_slpc_types.h and then
>
> in intel_guc.h:
> #include "intel_guc_slpc_types.h" instead of intel_guc_slpc.h
>
> in intel_guc_slpc.h:
> #include "intel_guc.h"
> #include "intel_guc_slpc_types.h"
> #include "intel_guc_submission.h"
>
that worked.
Thanks,
Vinay.
>> +
>> #endif
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> index 61be0aa81492..dca5f6d0641b 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
>> @@ -76,16 +76,18 @@ static void __confirm_options(struct intel_uc *uc)
>> struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
>>
>> drm_dbg(&i915->drm,
>> - "enable_guc=%d (guc:%s submission:%s huc:%s)\n",
>> + "enable_guc=%d (guc:%s submission:%s huc:%s slpc:%s)\n",
>> i915->params.enable_guc,
>> yesno(intel_uc_wants_guc(uc)),
>> yesno(intel_uc_wants_guc_submission(uc)),
>> - yesno(intel_uc_wants_huc(uc)));
>> + yesno(intel_uc_wants_huc(uc)),
>> + yesno(intel_uc_wants_guc_slpc(uc)));
>>
>> if (i915->params.enable_guc == 0) {
>> GEM_BUG_ON(intel_uc_wants_guc(uc));
>> GEM_BUG_ON(intel_uc_wants_guc_submission(uc));
>> GEM_BUG_ON(intel_uc_wants_huc(uc));
>> + GEM_BUG_ON(intel_uc_wants_guc_slpc(uc));
>> return;
>> }
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> index e2da2b6e76e1..38e465fd8a0c 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
>> @@ -83,6 +83,7 @@ __uc_state_checker(x, func, uses, used)
>> uc_state_checkers(guc, guc);
>> uc_state_checkers(huc, huc);
>> uc_state_checkers(guc, guc_submission);
>> +uc_state_checkers(guc, guc_slpc);
>>
>> #undef uc_state_checkers
>> #undef __uc_state_checker
>>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-12 23:43 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-10 1:20 [Intel-gfx] [PATCH 00/16] Enable GuC based power management features Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 01/16] drm/i915/guc: Squashed patch - DO NOT REVIEW Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc Vinay Belgaumkar
2021-07-10 14:27 ` Michal Wajdeczko
2021-07-12 18:40 ` Belgaumkar, Vinay
2021-07-12 23:43 ` Belgaumkar, Vinay [this message]
2021-07-10 1:20 ` [Intel-gfx] [PATCH 03/16] drm/i915/guc/slpc: Gate Host RPS when slpc is enabled Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 04/16] drm/i915/guc/slpc: Lay out slpc init/enable/disable/fini Vinay Belgaumkar
2021-07-10 14:35 ` Michal Wajdeczko
2021-07-13 0:37 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 05/16] drm/i915/guc/slpc: Adding slpc communication interfaces Vinay Belgaumkar
2021-07-10 15:52 ` Michal Wajdeczko
2021-07-13 23:22 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc Vinay Belgaumkar
2021-07-10 16:05 ` Michal Wajdeczko
2021-07-14 1:40 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 07/16] drm/i915/guc/slpc: Enable slpc and add related H2G events Vinay Belgaumkar
2021-07-10 17:37 ` Michal Wajdeczko
2021-07-15 1:58 ` Belgaumkar, Vinay
2021-07-21 17:36 ` Michal Wajdeczko
2021-07-10 1:20 ` [Intel-gfx] [PATCH 08/16] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-10 3:07 ` kernel test robot
2021-07-10 5:17 ` kernel test robot
2021-07-10 17:47 ` Michal Wajdeczko
2021-07-16 18:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 09/16] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-10 17:52 ` Michal Wajdeczko
2021-07-20 22:08 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 10/16] drm/i915/guc/slpc: Add debugfs for slpc info Vinay Belgaumkar
2021-07-10 18:08 ` Michal Wajdeczko
2021-07-20 23:00 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 11/16] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 12/16] drm/i915/guc/slpc: Cache platform frequency limits for slpc Vinay Belgaumkar
2021-07-10 18:15 ` Michal Wajdeczko
2021-07-17 19:30 ` Belgaumkar, Vinay
2021-07-20 23:05 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 13/16] drm/i915/guc/slpc: Update slpc to use platform min/max Vinay Belgaumkar
2021-07-10 1:20 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc Vinay Belgaumkar
2021-07-10 6:18 ` kernel test robot
2021-07-10 7:30 ` kernel test robot
2021-07-10 7:30 ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: intel_rps_read_punit_req() can be static kernel test robot
2021-07-10 13:54 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc kernel test robot
2021-07-10 18:20 ` Michal Wajdeczko
2021-07-20 23:38 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 15/16] drm/i915/guc/slpc: slpc selftest Vinay Belgaumkar
2021-07-10 18:29 ` Michal Wajdeczko
2021-07-21 1:06 ` Belgaumkar, Vinay
2021-07-10 1:20 ` [Intel-gfx] [PATCH 16/16] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-10 18:41 ` Michal Wajdeczko
2021-07-21 1:11 ` Belgaumkar, Vinay
2021-07-10 1:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC based power management features Patchwork
2021-07-10 1:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-10 2:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ade31c78-8e49-cd22-75f1-1ef3910013d3@intel.com \
--to=vinay.belgaumkar@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michal.wajdeczko@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).