intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: kernel test robot <lkp@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: kbuild-all@lists.01.org
Subject: Re: [Intel-gfx] [PATCH 08/16] drm/i915/guc/slpc: Add methods to set min/max frequency
Date: Sat, 10 Jul 2021 11:07:45 +0800	[thread overview]
Message-ID: <202107101016.LJecNCQB-lkp@intel.com> (raw)
In-Reply-To: <20210710012026.19705-9-vinay.belgaumkar@intel.com>

[-- Attachment #1: Type: text/plain, Size: 4028 bytes --]

Hi Vinay,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]
[cannot apply to drm-intel/for-linux-next drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next drm/drm-next v5.13 next-20210709]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
        # https://github.com/0day-ci/linux/commit/ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Vinay-Belgaumkar/Enable-GuC-based-power-management-features/20210710-092520
        git checkout ce93ba218ad070e0b1ae6f9823820fb4d2e14a8b
        # save the attached .config to linux build tree
        mkdir build_dir
        make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:258: warning: expecting prototype for intel_guc_slpc_max_freq_set(). Prototype was for intel_guc_slpc_set_max_freq() instead
>> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c:292: warning: expecting prototype for intel_guc_slpc_min_freq_set(). Prototype was for intel_guc_slpc_set_min_freq() instead


vim +258 drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c

   246	
   247	/**
   248	 * intel_guc_slpc_max_freq_set() - Set max frequency limit for SLPC.
   249	 * @slpc: pointer to intel_guc_slpc.
   250	 * @val: encoded frequency
   251	 *
   252	 * This function will invoke GuC SLPC action to update the max frequency
   253	 * limit for slice and unslice.
   254	 *
   255	 * Return: 0 on success, non-zero error code on failure.
   256	 */
   257	int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val)
 > 258	{
   259		int ret;
   260		struct drm_i915_private *i915 = slpc_to_i915(slpc);
   261		intel_wakeref_t wakeref;
   262	
   263		wakeref = intel_runtime_pm_get(&i915->runtime_pm);
   264	
   265		ret = slpc_set_param(slpc,
   266			       SLPC_PARAM_GLOBAL_MAX_GT_UNSLICE_FREQ_MHZ,
   267			       val);
   268	
   269		if (ret) {
   270			drm_err(&i915->drm,
   271				"Set max frequency unslice returned %d", ret);
   272			ret = -EIO;
   273			goto done;
   274		}
   275	
   276	done:
   277		intel_runtime_pm_put(&i915->runtime_pm, wakeref);
   278		return ret;
   279	}
   280	
   281	/**
   282	 * intel_guc_slpc_min_freq_set() - Set min frequency limit for SLPC.
   283	 * @slpc: pointer to intel_guc_slpc.
   284	 * @val: encoded frequency
   285	 *
   286	 * This function will invoke GuC SLPC action to update the min frequency
   287	 * limit.
   288	 *
   289	 * Return: 0 on success, non-zero error code on failure.
   290	 */
   291	int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val)
 > 292	{
   293		int ret;
   294		struct intel_guc *guc = slpc_to_guc(slpc);
   295		struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
   296		intel_wakeref_t wakeref;
   297	
   298		wakeref = intel_runtime_pm_get(&i915->runtime_pm);
   299	
   300		ret = slpc_set_param(slpc,
   301			       SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ,
   302			       val);
   303		if (ret) {
   304			drm_err(&i915->drm,
   305				"Set min frequency for unslice returned %d", ret);
   306			ret = -EIO;
   307			goto done;
   308		}
   309	
   310	done:
   311		intel_runtime_pm_put(&i915->runtime_pm, wakeref);
   312		return ret;
   313	}
   314	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 66092 bytes --]

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-10  3:08 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-10  1:20 [Intel-gfx] [PATCH 00/16] Enable GuC based power management features Vinay Belgaumkar
2021-07-10  1:20 ` [Intel-gfx] [PATCH 01/16] drm/i915/guc: Squashed patch - DO NOT REVIEW Vinay Belgaumkar
2021-07-10  1:20 ` [Intel-gfx] [PATCH 02/16] drm/i915/guc/slpc: Initial definitions for slpc Vinay Belgaumkar
2021-07-10 14:27   ` Michal Wajdeczko
2021-07-12 18:40     ` Belgaumkar, Vinay
2021-07-12 23:43     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 03/16] drm/i915/guc/slpc: Gate Host RPS when slpc is enabled Vinay Belgaumkar
2021-07-10  1:20 ` [Intel-gfx] [PATCH 04/16] drm/i915/guc/slpc: Lay out slpc init/enable/disable/fini Vinay Belgaumkar
2021-07-10 14:35   ` Michal Wajdeczko
2021-07-13  0:37     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 05/16] drm/i915/guc/slpc: Adding slpc communication interfaces Vinay Belgaumkar
2021-07-10 15:52   ` Michal Wajdeczko
2021-07-13 23:22     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 06/16] drm/i915/guc/slpc: Allocate, initialize and release slpc Vinay Belgaumkar
2021-07-10 16:05   ` Michal Wajdeczko
2021-07-14  1:40     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 07/16] drm/i915/guc/slpc: Enable slpc and add related H2G events Vinay Belgaumkar
2021-07-10 17:37   ` Michal Wajdeczko
2021-07-15  1:58     ` Belgaumkar, Vinay
2021-07-21 17:36       ` Michal Wajdeczko
2021-07-10  1:20 ` [Intel-gfx] [PATCH 08/16] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-10  3:07   ` kernel test robot [this message]
2021-07-10  5:17   ` kernel test robot
2021-07-10 17:47   ` Michal Wajdeczko
2021-07-16 18:00     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 09/16] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-10 17:52   ` Michal Wajdeczko
2021-07-20 22:08     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 10/16] drm/i915/guc/slpc: Add debugfs for slpc info Vinay Belgaumkar
2021-07-10 18:08   ` Michal Wajdeczko
2021-07-20 23:00     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 11/16] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-10  1:20 ` [Intel-gfx] [PATCH 12/16] drm/i915/guc/slpc: Cache platform frequency limits for slpc Vinay Belgaumkar
2021-07-10 18:15   ` Michal Wajdeczko
2021-07-17 19:30     ` Belgaumkar, Vinay
2021-07-20 23:05     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 13/16] drm/i915/guc/slpc: Update slpc to use platform min/max Vinay Belgaumkar
2021-07-10  1:20 ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc Vinay Belgaumkar
2021-07-10  6:18   ` kernel test robot
2021-07-10  7:30   ` kernel test robot
2021-07-10  7:30   ` [Intel-gfx] [RFC PATCH] drm/i915/guc/slpc: intel_rps_read_punit_req() can be static kernel test robot
2021-07-10 13:54   ` [Intel-gfx] [PATCH 14/16] drm/i915/guc/slpc: Sysfs hooks for slpc kernel test robot
2021-07-10 18:20   ` Michal Wajdeczko
2021-07-20 23:38     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 15/16] drm/i915/guc/slpc: slpc selftest Vinay Belgaumkar
2021-07-10 18:29   ` Michal Wajdeczko
2021-07-21  1:06     ` Belgaumkar, Vinay
2021-07-10  1:20 ` [Intel-gfx] [PATCH 16/16] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-10 18:41   ` Michal Wajdeczko
2021-07-21  1:11     ` Belgaumkar, Vinay
2021-07-10  1:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable GuC based power management features Patchwork
2021-07-10  1:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-10  2:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=202107101016.LJecNCQB-lkp@intel.com \
    --to=lkp@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=kbuild-all@lists.01.org \
    --cc=vinay.belgaumkar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).