* [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible
@ 2020-02-10 9:55 Maxime Ripard
2020-02-10 9:56 ` [PATCH 2/2] arm64: dts: allwinner: h6: " Maxime Ripard
2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara
0 siblings, 2 replies; 6+ messages in thread
From: Maxime Ripard @ 2020-02-10 9:55 UTC (permalink / raw)
To: Chen-Yu Tsai, Maxime Ripard
Cc: andre.przywara, Maxime Ripard, linux-arm-kernel
The commit c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node")
introduced support for the PMU found on the Allwinner H5. However, the
binding only allows for a single compatible, while the patch was adding
two.
Make sure we follow the binding.
Fixes: c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 9893aa64dd0b..4462a68c0681 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -38,8 +38,7 @@ cpu3: cpu@3 {
};
pmu {
- compatible = "arm,cortex-a53-pmu",
- "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
--
2.24.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH 2/2] arm64: dts: allwinner: h6: Fix PMU compatible 2020-02-10 9:55 [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible Maxime Ripard @ 2020-02-10 9:56 ` Maxime Ripard 2020-02-25 9:03 ` Maxime Ripard 2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara 1 sibling, 1 reply; 6+ messages in thread From: Maxime Ripard @ 2020-02-10 9:56 UTC (permalink / raw) To: Chen-Yu Tsai, Maxime Ripard Cc: andre.przywara, Maxime Ripard, linux-arm-kernel The commit 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") introduced support for the PMU found on the Allwinner H6. However, the binding only allows for a single compatible, while the patch was adding two. Make sure we follow the binding. Fixes: 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 3329283e38ab..06363c1bea3f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -70,8 +70,7 @@ ext_osc32k: ext_osc32k_clk { }; pmu { - compatible = "arm,cortex-a53-pmu", - "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, -- 2.24.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: allwinner: h6: Fix PMU compatible 2020-02-10 9:56 ` [PATCH 2/2] arm64: dts: allwinner: h6: " Maxime Ripard @ 2020-02-25 9:03 ` Maxime Ripard 0 siblings, 0 replies; 6+ messages in thread From: Maxime Ripard @ 2020-02-25 9:03 UTC (permalink / raw) To: Chen-Yu Tsai; +Cc: andre.przywara, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 465 bytes --] On Mon, Feb 10, 2020 at 10:56:00AM +0100, Maxime Ripard wrote: > The commit 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") > introduced support for the PMU found on the Allwinner H6. However, the > binding only allows for a single compatible, while the patch was adding > two. > > Make sure we follow the binding. > > Fixes: 7aa9b9eb7d6a ("arm64: dts: allwinner: H6: Add PMU mode") > Signed-off-by: Maxime Ripard <maxime@cerno.tech> Applied both Maxime [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible 2020-02-10 9:55 [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible Maxime Ripard 2020-02-10 9:56 ` [PATCH 2/2] arm64: dts: allwinner: h6: " Maxime Ripard @ 2020-02-14 18:04 ` Andre Przywara 2020-02-14 18:18 ` Robin Murphy 2020-02-17 17:49 ` Maxime Ripard 1 sibling, 2 replies; 6+ messages in thread From: Andre Przywara @ 2020-02-14 18:04 UTC (permalink / raw) To: Maxime Ripard, Mark Rutland, Rob Herring Cc: Chen-Yu Tsai, linux-arm-kernel, Maxime Ripard On Mon, 10 Feb 2020 10:55:59 +0100 Maxime Ripard <maxime@cerno.tech> wrote: Hi, > The commit c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node") > introduced support for the PMU found on the Allwinner H5. However, the > binding only allows for a single compatible, while the patch was adding > two. Maxime, thanks for bringing this up, was that found by some validation tool? And while this is true, I wonder if this was intentional? I see several other combinations of PMU compatibles in the tree. Mark, Rob, can you shed any light on this? Actually I am wondering why we would need the PMU type in the first place, isn't that discoverable via the MIDR? And all we actually need from the DT is the interrupts and maybe some quirk info? It looks like ACPI is always using the generic PMUv3 map, so wouldn't it actually be better to replace the compatible string matching with MIDR matching? Or are those core specific maps somewhat obsolete anyway? Since I don't see any newer cores in there? Cheers, Andre > Make sure we follow the binding. > > Fixes: c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node") > Signed-off-by: Maxime Ripard <maxime@cerno.tech> > --- > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi > index 9893aa64dd0b..4462a68c0681 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi > @@ -38,8 +38,7 @@ cpu3: cpu@3 { > }; > > pmu { > - compatible = "arm,cortex-a53-pmu", > - "arm,armv8-pmuv3"; > + compatible = "arm,cortex-a53-pmu"; > interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible 2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara @ 2020-02-14 18:18 ` Robin Murphy 2020-02-17 17:49 ` Maxime Ripard 1 sibling, 0 replies; 6+ messages in thread From: Robin Murphy @ 2020-02-14 18:18 UTC (permalink / raw) To: Andre Przywara, Maxime Ripard, Mark Rutland, Rob Herring Cc: Chen-Yu Tsai, Maxime Ripard, linux-arm-kernel On 14/02/2020 6:04 pm, Andre Przywara wrote: > On Mon, 10 Feb 2020 10:55:59 +0100 > Maxime Ripard <maxime@cerno.tech> wrote: > > Hi, > >> The commit c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node") >> introduced support for the PMU found on the Allwinner H5. However, the >> binding only allows for a single compatible, while the patch was adding >> two. > > Maxime, thanks for bringing this up, was that found by some validation tool? > > And while this is true, I wonder if this was intentional? > I see several other combinations of PMU compatibles in the tree. > > Mark, Rob, can you shed any light on this? > > Actually I am wondering why we would need the PMU type in the first place, isn't that discoverable via the MIDR? "the" MIDR... ;) Usual big.LITTLE vs. CPU hotplug rules apply. > And all we actually need from the DT is the interrupts and maybe some quirk info? > > It looks like ACPI is always using the generic PMUv3 map, so wouldn't it actually be better to replace the compatible string matching with MIDR matching? Or are those core specific maps somewhat obsolete anyway? Since I don't see any newer cores in there? Mostly they're just long overdue for an update (and somewhat mitigated by the userspace JSON stuff in perf tools, but in principle there are still other users of perf_events). IIRC, the generic PMUv3 compatible was only ever meant to be for things like the AEM without a specific microarchitecture (cf. the "arm,armv8" CPU binding). Robin. > > Cheers, > Andre > >> Make sure we follow the binding. > > >> >> Fixes: c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node") >> Signed-off-by: Maxime Ripard <maxime@cerno.tech> >> --- >> arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi >> index 9893aa64dd0b..4462a68c0681 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi >> @@ -38,8 +38,7 @@ cpu3: cpu@3 { >> }; >> >> pmu { >> - compatible = "arm,cortex-a53-pmu", >> - "arm,armv8-pmuv3"; >> + compatible = "arm,cortex-a53-pmu"; >> interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, >> <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, >> <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible 2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara 2020-02-14 18:18 ` Robin Murphy @ 2020-02-17 17:49 ` Maxime Ripard 1 sibling, 0 replies; 6+ messages in thread From: Maxime Ripard @ 2020-02-17 17:49 UTC (permalink / raw) To: Andre Przywara; +Cc: Mark Rutland, Rob Herring, Chen-Yu Tsai, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 1048 bytes --] Hi Andre, On Fri, Feb 14, 2020 at 06:04:04PM +0000, Andre Przywara wrote: > > The commit c35a516a4618 ("arm64: dts: allwinner: H5: Add PMU node") > > introduced support for the PMU found on the Allwinner H5. However, the > > binding only allows for a single compatible, while the patch was adding > > two. > > Maxime, thanks for bringing this up, was that found by some > validation tool? Indeed. > And while this is true, I wonder if this was intentional? Either the YAML file: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/pmu.yaml Or the text file that was there before it: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/pmu.txt?id=v5.0 Make it pretty clear that only a single entry is expected > I see several other combinations of PMU compatibles in the tree. I've probably sent around 50-100 patches for DT not following the binding on Allwinner platforms alone, so it doesn't really surprise me :) Maxime [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-02-25 9:04 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-10 9:55 [PATCH 1/2] arm64: dts: allwinner: h5: Fix PMU compatible Maxime Ripard 2020-02-10 9:56 ` [PATCH 2/2] arm64: dts: allwinner: h6: " Maxime Ripard 2020-02-25 9:03 ` Maxime Ripard 2020-02-14 18:04 ` [PATCH 1/2] arm64: dts: allwinner: h5: " Andre Przywara 2020-02-14 18:18 ` Robin Murphy 2020-02-17 17:49 ` Maxime Ripard
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