From: Thierry Reding <thierry.reding@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Jon Hunter <jonathanh@nvidia.com>,
Vidya Sagar <vidyas@nvidia.com>,
linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: [PATCH 6/9] pinctrl: tegra: Pass struct tegra_pmx for pin range check
Date: Thu, 19 Mar 2020 13:27:34 +0100 [thread overview]
Message-ID: <20200319122737.3063291-7-thierry.reding@gmail.com> (raw)
In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Pass the struct tegra_pmx when checking for the pin range in device
tree. This makes the call site a bit easier to read and will help keep
that readability in a subsequent patch.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
drivers/pinctrl/tegra/pinctrl-tegra.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index cefbbb8d1a68..c8246cc2c4fd 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -689,12 +689,12 @@ const struct dev_pm_ops tegra_pinctrl_pm = {
.resume = &tegra_pinctrl_resume
};
-static bool gpio_node_has_range(const char *compatible)
+static bool tegra_pinctrl_gpio_node_has_range(struct tegra_pmx *pmx)
{
struct device_node *np;
bool has_prop = false;
- np = of_find_compatible_node(NULL, NULL, compatible);
+ np = of_find_compatible_node(NULL, NULL, pmx->soc->gpio_compatible);
if (!np)
return has_prop;
@@ -794,7 +794,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev,
tegra_pinctrl_clear_parked_bits(pmx);
- if (!gpio_node_has_range(pmx->soc->gpio_compatible))
+ if (!tegra_pinctrl_gpio_node_has_range(pmx))
pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
platform_set_drvdata(pdev, pmx);
--
2.24.1
next prev parent reply other threads:[~2020-03-19 12:28 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-19 12:27 [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Thierry Reding
2020-03-19 12:27 ` [PATCH 1/9] gpio: Support GPIO controllers without pin-ranges Thierry Reding
2020-03-19 17:05 ` Vidya Sagar
2020-03-27 10:37 ` Linus Walleij
2020-03-27 12:13 ` Thierry Reding
2020-03-19 12:27 ` [PATCH 2/9] gpio: tegra186: Add support for pin ranges Thierry Reding
2020-03-19 17:05 ` Vidya Sagar
2020-03-27 10:39 ` Linus Walleij
2020-03-31 20:53 ` Thierry Reding
2020-03-19 12:27 ` [PATCH 3/9] gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 Thierry Reding
2020-03-19 17:06 ` Vidya Sagar
2020-03-27 10:39 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 4/9] pinctrl: tegra: Fix whitespace issues for improved readability Thierry Reding
2020-03-19 17:06 ` Vidya Sagar
2020-03-27 10:40 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 5/9] pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo Thierry Reding
2020-03-19 17:07 ` Vidya Sagar
2020-03-27 10:42 ` Linus Walleij
2020-03-19 12:27 ` Thierry Reding [this message]
2020-03-19 17:07 ` [PATCH 6/9] pinctrl: tegra: Pass struct tegra_pmx for pin range check Vidya Sagar
2020-03-27 10:43 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 7/9] pinctrl: tegra: Do not add default pin range on Tegra194 Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:44 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 8/9] pinctrl: tegra: Renumber the GG.0 and GG.1 pins Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:45 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 9/9] pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:46 ` Linus Walleij
2020-03-19 17:04 ` [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Vidya Sagar
2020-03-20 19:37 ` Linus Walleij
2020-03-23 13:16 ` Thierry Reding
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