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From: Vidya Sagar <vidyas@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Jon Hunter <jonathanh@nvidia.com>, <linux-gpio@vger.kernel.org>,
	<linux-tegra@vger.kernel.org>
Subject: Re: [PATCH 1/9] gpio: Support GPIO controllers without pin-ranges
Date: Thu, 19 Mar 2020 22:35:16 +0530	[thread overview]
Message-ID: <dc7a3f0a-2206-1e5a-9255-d0c6a18d1c4c@nvidia.com> (raw)
In-Reply-To: <20200319122737.3063291-2-thierry.reding@gmail.com>



On 3/19/2020 5:57 PM, Thierry Reding wrote:
> External email: Use caution opening links or attachments
> 
> 
> From: Thierry Reding <treding@nvidia.com>
> 
> Wake gpiochip_generic_request() call into the pinctrl helpers only if a
> GPIO controller had any pin-ranges assigned to it. This allows a driver
> to unconditionally use this helper if it supports multiple devices of
> which only a subset have pin-ranges assigned to them.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>   drivers/gpio/gpiolib.c | 5 ++++-
>   1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
> index f31b1d46599e..12f3c339da78 100644
> --- a/drivers/gpio/gpiolib.c
> +++ b/drivers/gpio/gpiolib.c
> @@ -2792,7 +2792,10 @@ static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
>    */
>   int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
>   {
> -       return pinctrl_gpio_request(chip->gpiodev->base + offset);
> +       if (!list_empty(&chip->gpiodev->pin_ranges))
> +               return pinctrl_gpio_request(chip->gpiodev->base + offset);
> +
> +       return 0;
>   }
>   EXPORT_SYMBOL_GPL(gpiochip_generic_request);
> 
> --
> 2.24.1
> 
Tested-by: Vidya Sagar <vidyas@nvidia.com>

  reply	other threads:[~2020-03-19 17:05 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-19 12:27 [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Thierry Reding
2020-03-19 12:27 ` [PATCH 1/9] gpio: Support GPIO controllers without pin-ranges Thierry Reding
2020-03-19 17:05   ` Vidya Sagar [this message]
2020-03-27 10:37   ` Linus Walleij
2020-03-27 12:13     ` Thierry Reding
2020-03-19 12:27 ` [PATCH 2/9] gpio: tegra186: Add support for pin ranges Thierry Reding
2020-03-19 17:05   ` Vidya Sagar
2020-03-27 10:39   ` Linus Walleij
2020-03-31 20:53     ` Thierry Reding
2020-03-19 12:27 ` [PATCH 3/9] gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 Thierry Reding
2020-03-19 17:06   ` Vidya Sagar
2020-03-27 10:39   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 4/9] pinctrl: tegra: Fix whitespace issues for improved readability Thierry Reding
2020-03-19 17:06   ` Vidya Sagar
2020-03-27 10:40   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 5/9] pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo Thierry Reding
2020-03-19 17:07   ` Vidya Sagar
2020-03-27 10:42   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 6/9] pinctrl: tegra: Pass struct tegra_pmx for pin range check Thierry Reding
2020-03-19 17:07   ` Vidya Sagar
2020-03-27 10:43   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 7/9] pinctrl: tegra: Do not add default pin range on Tegra194 Thierry Reding
2020-03-19 17:08   ` Vidya Sagar
2020-03-27 10:44   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 8/9] pinctrl: tegra: Renumber the GG.0 and GG.1 pins Thierry Reding
2020-03-19 17:08   ` Vidya Sagar
2020-03-27 10:45   ` Linus Walleij
2020-03-19 12:27 ` [PATCH 9/9] pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 Thierry Reding
2020-03-19 17:08   ` Vidya Sagar
2020-03-27 10:46   ` Linus Walleij
2020-03-19 17:04 ` [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Vidya Sagar
2020-03-20 19:37 ` Linus Walleij
2020-03-23 13:16   ` Thierry Reding

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