From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com
Cc: Naveen Naidu <naveennaidu479@gmail.com>,
linux-kernel-mentees@lists.linuxfoundation.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 02/22] PCI: Unify PCI error response checking
Date: Mon, 11 Oct 2021 23:08:32 +0530 [thread overview]
Message-ID: <c632b07eb1b08cc7d4346455a55641436a379abd.1633972263.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1633972263.git.naveennaidu479@gmail.com>
An MMIO read from a PCI device that doesn't exist or doesn't respond
causes a PCI error. There's no real data to return to satisfy the
CPU read, so most hardware fabricates ~0 data.
Use SET_PCI_ERROR_RESPONSE() to set the error response and
RESPONSE_IS_PCI_ERROR() to check the error response during hardware
read.
These definitions make error checks consistent and easier to find.
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
drivers/pci/access.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 46935695cfb9..e1954bbbd137 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -81,7 +81,7 @@ int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
addr = bus->ops->map_bus(bus, devfn, where);
if (!addr) {
- *val = ~0;
+ SET_PCI_ERROR_RESPONSE(val);
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -123,7 +123,7 @@ int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
addr = bus->ops->map_bus(bus, devfn, where & ~0x3);
if (!addr) {
- *val = ~0;
+ SET_PCI_ERROR_RESPONSE(val);
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -411,10 +411,10 @@ int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
/*
* Reset *val to 0 if pci_read_config_word() fails, it may
- * have been written as 0xFFFF if hardware error happens
- * during pci_read_config_word().
+ * have been written as 0xFFFF (PCI_ERROR_RESPONSE) if hardware error
+ * happens during pci_read_config_word().
*/
- if (ret)
+ if (RESPONSE_IS_PCI_ERROR(val))
*val = 0;
return ret;
}
@@ -446,10 +446,10 @@ int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
/*
* Reset *val to 0 if pci_read_config_dword() fails, it may
- * have been written as 0xFFFFFFFF if hardware error happens
- * during pci_read_config_dword().
+ * have been written as 0xFFFFFFFF (PCI_ERROR_RESPONSE) if hardware
+ * error happens during pci_read_config_dword().
*/
- if (ret)
+ if (RESPONSE_IS_PCI_ERROR(val))
*val = 0;
return ret;
}
@@ -523,7 +523,7 @@ EXPORT_SYMBOL(pcie_capability_clear_and_set_dword);
int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val)
{
if (pci_dev_is_disconnected(dev)) {
- *val = ~0;
+ SET_PCI_ERROR_RESPONSE(val);
return PCIBIOS_DEVICE_NOT_FOUND;
}
return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
@@ -533,7 +533,7 @@ EXPORT_SYMBOL(pci_read_config_byte);
int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val)
{
if (pci_dev_is_disconnected(dev)) {
- *val = ~0;
+ SET_PCI_ERROR_RESPONSE(val);
return PCIBIOS_DEVICE_NOT_FOUND;
}
return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
@@ -544,7 +544,7 @@ int pci_read_config_dword(const struct pci_dev *dev, int where,
u32 *val)
{
if (pci_dev_is_disconnected(dev)) {
- *val = ~0;
+ SET_PCI_ERROR_RESPONSE(val);
return PCIBIOS_DEVICE_NOT_FOUND;
}
return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
--
2.25.1
next prev parent reply other threads:[~2021-10-11 17:39 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 17:35 [PATCH 00/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:37 ` [PATCH 01/22] PCI: Add PCI_ERROR_RESPONSE and it's related defintions Naveen Naidu
2021-10-11 17:38 ` Naveen Naidu [this message]
2021-10-11 22:05 ` [PATCH 02/22] PCI: Unify PCI error response checking Rob Herring
2021-10-12 16:21 ` Naveen Naidu
2021-10-12 18:02 ` Rob Herring
2021-10-12 22:52 ` Pali Rohár
2021-10-13 2:43 ` Bjorn Helgaas
2021-10-13 13:06 ` Rob Herring
2021-10-13 17:16 ` Naveen Naidu
2021-10-13 17:54 ` Pali Rohár
2021-10-13 18:48 ` Bjorn Helgaas
2021-10-13 21:47 ` Rob Herring
2021-10-13 22:03 ` Pali Rohár
2021-10-13 22:12 ` Bjorn Helgaas
2021-10-11 17:45 ` [PATCH 03/22] PCI: thunder: Use SET_PCI_ERROR_RESPONSE() when device not found Naveen Naidu
2021-10-11 17:46 ` [PATCH 04/22] PCI: iproc: " Naveen Naidu
2021-10-11 17:51 ` [PATCH 05/22] PCI: mediatek: " Naveen Naidu
2021-10-11 17:52 ` [PATCH 06/22] PCI: exynos: " Naveen Naidu
2021-10-11 17:53 ` [PATCH 07/22] PCI: histb: " Naveen Naidu
2021-10-11 17:55 ` [PATCH 08/22] PCI: kirin: " Naveen Naidu
2021-10-11 17:56 ` [PATCH 09/22] PCI: aardvark: " Naveen Naidu
2021-10-11 18:08 ` Pali Rohár
2021-10-11 18:28 ` Naveen Naidu
[not found] ` <20211011182526.kboaxqofdpd2jjrl@theprophet>
2021-10-11 18:41 ` Pali Rohár
2021-10-12 15:59 ` Naveen Naidu
2021-10-13 2:13 ` Bjorn Helgaas
2021-10-13 17:59 ` Pali Rohár
2021-10-11 18:00 ` [PATCH 10/22] PCI: mvebu: " Naveen Naidu
2021-10-11 18:00 ` [PATCH 11/22] PCI: altera: " Naveen Naidu
2021-10-11 18:02 ` [PATCH 12/22] PCI: rcar: " Naveen Naidu
2021-10-11 18:02 ` [PATCH 13/22] PCI: rockchip: " Naveen Naidu
2021-10-11 18:04 ` [PATCH 14/22] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-11 18:06 ` [PATCH 15/22] PCI: vmd: " Naveen Naidu
2021-10-14 18:04 ` Jonathan Derrick
2021-10-11 18:07 ` [PATCH 16/22] PCI: pciehp: " Naveen Naidu
2021-10-11 19:47 ` Lukas Wunner
2021-10-12 16:05 ` Naveen Naidu
2021-10-12 23:12 ` Pali Rohár
2021-10-13 12:20 ` Lukas Wunner
2021-10-11 18:08 ` [PATCH 17/22] PCI/DPC: " Naveen Naidu
2021-10-11 18:10 ` [PATCH 18/22] PCI/PME: " Naveen Naidu
2021-10-11 18:11 ` [PATCH 19/22] PCI: cpqphp: " Naveen Naidu
2021-10-11 18:11 ` [PATCH 20/22] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:12 ` [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-11 18:13 ` [PATCH 22/22] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c632b07eb1b08cc7d4346455a55641436a379abd.1633972263.git.naveennaidu479@gmail.com \
--to=naveennaidu479@gmail.com \
--cc=bhelgaas@google.com \
--cc=linux-kernel-mentees@lists.linuxfoundation.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).