[PATCH 01/11] clk: microchip: use readl_poll_timeout() in pbclk_set_rate().

[PATCH 01/11] clk: microchip: use readl_poll_timeout() in pbclk_set_rate().

[Purna Chandra Mandal]

pbclk_set_rate() is using readl_poll_timeout_atomic() even
though spinlock is released. Fix it by replacing with
readl_poll_timeout().

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---
Note: Please pull this complete series through the MIPS tree.

---

 drivers/clk/microchip/clk-core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/microchip/clk-core.c b/drivers/clk/microchip/clk-core.c
index ca85cea..c3b3014 100644
--- a/drivers/clk/microchip/clk-core.c
+++ b/drivers/clk/microchip/clk-core.c
@@ -199,9 +199,9 @@ static int pbclk_set_rate(struct clk_hw *hw, unsigned long rate,
 
 	spin_unlock_irqrestore(&pb->core->reg_lock, flags);
 
-	/* wait again, for pbdivready */
-	err = readl_poll_timeout_atomic(pb->ctrl_reg, v, v & PB_DIV_READY,
-					1, LOCK_TIMEOUT_US);
+	/* wait again for DIV_READY */
+	err = readl_poll_timeout(pb->ctrl_reg, v, v & PB_DIV_READY,
+				 1, LOCK_TIMEOUT_US);
 	if (err)
 		return err;
 
-- 
1.8.3.1

[PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

[Purna Chandra Mandal]

Optional SOSC is an external fixed clock running at 32768HZ.
So Initialize SOSC rate as per PIC32MZDA datasheet.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

---
Note: Please pull this complete series through the MIPS tree.

---

 drivers/clk/microchip/clk-pic32mzda.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/microchip/clk-pic32mzda.c b/drivers/clk/microchip/clk-pic32mzda.c
index 020a29a..210694b 100644
--- a/drivers/clk/microchip/clk-pic32mzda.c
+++ b/drivers/clk/microchip/clk-pic32mzda.c
@@ -118,6 +118,7 @@ static const struct pic32_sec_osc_data sosc_clk = {
 	.status_reg = 0x1d0,
 	.enable_mask = BIT(1),
 	.status_mask = BIT(4),
+	.fixed_rate = 32768,
 	.init_data = {
 		.name = "sosc_clk",
 		.parent_names = NULL,
-- 
1.8.3.1

Re: [PATCH 02/11] clk: microchip: Initialize SOSC clock rate for PIC32MZDA.

[Stephen Boyd]

On 05/17, Purna Chandra Mandal wrote:
> Optional SOSC is an external fixed clock running at 32768HZ.
> So Initialize SOSC rate as per PIC32MZDA datasheet.
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> 
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 03/11] MIPS: pic32mzda: fix getting timer clock rate.

[Purna Chandra Mandal]

PIC32 clock driver is now implemented as platform driver instead of
as part of of_clk_init(). It meants all the clock modules are available
quite late in the boot sequence. So request for CPU clock by clk_get_sys()
and clk_get_rate() to find c0_timer rate fails.

To fix this use PIC32 specific early clock functions implemented for early
console support.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

---
Note: Please pull this complete series through the MIPS tree.

---

 arch/mips/pic32/pic32mzda/time.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/mips/pic32/pic32mzda/time.c b/arch/mips/pic32/pic32mzda/time.c
index ca6a62b..62a0a78 100644
--- a/arch/mips/pic32/pic32mzda/time.c
+++ b/arch/mips/pic32/pic32mzda/time.c
@@ -11,13 +11,12 @@
  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  *  for more details.
  */
-#include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/clocksource.h>
 #include <linux/init.h>
+#include <linux/irqdomain.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
-#include <linux/irqdomain.h>
 
 #include <asm/time.h>
 
@@ -58,16 +57,12 @@ unsigned int get_c0_compare_int(void)
 
 void __init plat_time_init(void)
 {
-	struct clk *clk;
+	unsigned long rate = pic32_get_pbclk(7);
 
 	of_clk_init(NULL);
-	clk = clk_get_sys("cpu_clk", NULL);
-	if (IS_ERR(clk))
-		panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
 
-	clk_prepare_enable(clk);
-	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
-	mips_hpt_frequency = clk_get_rate(clk) / 2;
+	pr_info("CPU Clock: %ldMHz\n", rate / 1000000);
+	mips_hpt_frequency = rate / 2;
 
 	clocksource_probe();
 }
-- 
1.8.3.1

Re: [PATCH 03/11] MIPS: pic32mzda: fix getting timer clock rate.

[Ralf Baechle]

On Tue, May 17, 2016 at 10:35:52AM +0530, Purna Chandra Mandal wrote:

> PIC32 clock driver is now implemented as platform driver instead of
> as part of of_clk_init(). It meants all the clock modules are available
> quite late in the boot sequence. So request for CPU clock by clk_get_sys()
> and clk_get_rate() to find c0_timer rate fails.
> 
> To fix this use PIC32 specific early clock functions implemented for early
> console support.
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> 
> ---
> Note: Please pull this complete series through the MIPS tree.
> 
> ---
> 
>  arch/mips/pic32/pic32mzda/time.c | 13 ++++---------

For now I applied only this patch as it seems independent of the remainder
of the series which still will need to be reviewed and acked by the
respective maintainers.

  Ralf

Re: [PATCH 03/11] MIPS: pic32mzda: fix getting timer clock rate.

[Harvey Hunt]

Hi Purna,

On 17/05/16 06:05, Purna Chandra Mandal wrote:
> PIC32 clock driver is now implemented as platform driver instead of
> as part of of_clk_init(). It meants all the clock modules are available
> quite late in the boot sequence. So request for CPU clock by clk_get_sys()
> and clk_get_rate() to find c0_timer rate fails.
>
> To fix this use PIC32 specific early clock functions implemented for early
> console support.
>
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>
> ---
> Note: Please pull this complete series through the MIPS tree.
>
> ---
>
>  arch/mips/pic32/pic32mzda/time.c | 13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/arch/mips/pic32/pic32mzda/time.c b/arch/mips/pic32/pic32mzda/time.c
> index ca6a62b..62a0a78 100644
> --- a/arch/mips/pic32/pic32mzda/time.c
> +++ b/arch/mips/pic32/pic32mzda/time.c
> @@ -11,13 +11,12 @@
>   *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
>   *  for more details.
>   */
> -#include <linux/clk.h>
>  #include <linux/clk-provider.h>
>  #include <linux/clocksource.h>
>  #include <linux/init.h>
> +#include <linux/irqdomain.h>
>  #include <linux/of.h>
>  #include <linux/of_irq.h>
> -#include <linux/irqdomain.h>
>
>  #include <asm/time.h>
>
> @@ -58,16 +57,12 @@ unsigned int get_c0_compare_int(void)
>
>  void __init plat_time_init(void)
>  {
> -	struct clk *clk;
> +	unsigned long rate = pic32_get_pbclk(7);

pic32_get_pbclk() is defined in arch/mips/pic32/pic32mzda/early_clk.c. 
When CONFIG_EARLY_PRINTK isn't set, early_clk.c isn't compiled and so a 
linker error occurs.

Maybe it's best to always build the early_clk.c file, or perhaps there 
is a better place to put pic32_get_pbclk()?

Thanks,

Harvey

Re: [PATCH 03/11] MIPS: pic32mzda: fix getting timer clock rate.

[Purna Chandra Mandal]

On 05/25/2016 09:32 PM, Harvey Hunt wrote:
> Hi Purna,
>
> On 17/05/16 06:05, Purna Chandra Mandal wrote:
>> PIC32 clock driver is now implemented as platform driver instead of
>> as part of of_clk_init(). It meants all the clock modules are available
>> quite late in the boot sequence. So request for CPU clock by clk_get_sys()
>> and clk_get_rate() to find c0_timer rate fails.
>>
>> To fix this use PIC32 specific early clock functions implemented for early
>> console support.
>>
>> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
>>
>> ---
>> Note: Please pull this complete series through the MIPS tree.
>>
>> ---
>>
>>  arch/mips/pic32/pic32mzda/time.c | 13 ++++---------
>>  1 file changed, 4 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/mips/pic32/pic32mzda/time.c b/arch/mips/pic32/pic32mzda/time.c
>> index ca6a62b..62a0a78 100644
>> --- a/arch/mips/pic32/pic32mzda/time.c
>> +++ b/arch/mips/pic32/pic32mzda/time.c
>> @@ -11,13 +11,12 @@
>>   *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
>>   *  for more details.
>>   */
>> -#include <linux/clk.h>
>>  #include <linux/clk-provider.h>
>>  #include <linux/clocksource.h>
>>  #include <linux/init.h>
>> +#include <linux/irqdomain.h>
>>  #include <linux/of.h>
>>  #include <linux/of_irq.h>
>> -#include <linux/irqdomain.h>
>>
>>  #include <asm/time.h>
>>
>> @@ -58,16 +57,12 @@ unsigned int get_c0_compare_int(void)
>>
>>  void __init plat_time_init(void)
>>  {
>> -    struct clk *clk;
>> +    unsigned long rate = pic32_get_pbclk(7);
>
> pic32_get_pbclk() is defined in arch/mips/pic32/pic32mzda/early_clk.c. When CONFIG_EARLY_PRINTK isn't set, early_clk.c isn't compiled and so a linker error occurs.
>
> Maybe it's best to always build the early_clk.c file, or perhaps there is a better place to put pic32_get_pbclk()?
>
Thanks Harvey.

Will fix in separate patch.

> Thanks,
>
> Harvey
>

[PATCH 04/11] irqchip: irq-pic32-evic: Fix bug with external interrupts.

[Purna Chandra Mandal]

From: Joshua Henderson <digitalpeer@digitalpeer.com>

The wrong external interrupt bits are being set, offset by 1.

Signed-off-by: Joshua Henderson <digitalpeer@digitalpeer.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

---

 drivers/irqchip/irq-pic32-evic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-pic32-evic.c b/drivers/irqchip/irq-pic32-evic.c
index e7155db..73addb4 100644
--- a/drivers/irqchip/irq-pic32-evic.c
+++ b/drivers/irqchip/irq-pic32-evic.c
@@ -91,7 +91,7 @@ static int pic32_set_type_edge(struct irq_data *data,
 	/* set polarity for external interrupts only */
 	for (i = 0; i < ARRAY_SIZE(priv->ext_irqs); i++) {
 		if (priv->ext_irqs[i] == data->hwirq) {
-			ret = pic32_set_ext_polarity(i + 1, flow_type);
+			ret = pic32_set_ext_polarity(i, flow_type);
 			if (ret)
 				return ret;
 		}
-- 
1.8.3.1

Re: [PATCH 04/11] irqchip: irq-pic32-evic: Fix bug with external interrupts.

[Marc Zyngier]

On 17/05/16 06:05, Purna Chandra Mandal wrote:
> From: Joshua Henderson <digitalpeer@digitalpeer.com>
> 
> The wrong external interrupt bits are being set, offset by 1.
> 
> Signed-off-by: Joshua Henderson <digitalpeer@digitalpeer.com>
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

I'll queue that for post -rc1.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

[PATCH 05/11] serial: pic32_uart: Fix double free of 'sport->irq_fault_name'.

[Purna Chandra Mandal]

Allocated memory for 'sport->irq_fault_name' is freed twice, first
in error check of 'if(!sport->irq_rx_name)' and other in fallback
handler.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

---

 drivers/tty/serial/pic32_uart.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/tty/serial/pic32_uart.c b/drivers/tty/serial/pic32_uart.c
index 62a43bf..7f8e99b 100644
--- a/drivers/tty/serial/pic32_uart.c
+++ b/drivers/tty/serial/pic32_uart.c
@@ -445,7 +445,6 @@ static int pic32_uart_startup(struct uart_port *port)
 				       sport->idx);
 	if (!sport->irq_rx_name) {
 		dev_err(port->dev, "%s: kasprintf err!", __func__);
-		kfree(sport->irq_fault_name);
 		ret = -ENOMEM;
 		goto out_f;
 	}
-- 
1.8.3.1

[PATCH 06/11] dt/bindings: Correct clk binding example for PIC32 SDHCI

[Purna Chandra Mandal]

Update binding example based on new clock binding documentation.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt
index 71ad57e..3149297 100644
--- a/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt
+++ b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt
@@ -20,7 +20,7 @@ Example:
 		compatible = "microchip,pic32mzda-sdhci";
 		reg = <0x1f8ec000 0x100>;
 		interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&REFCLKO4>, <&PBCLK5>;
+		clocks = <&rootclk REF4CLK>, <&rootclk PB5CLK>;
 		clock-names = "base_clk", "sys_clk";
 		bus-width = <4>;
 		cap-sd-highspeed;
-- 
1.8.3.1

Re: [PATCH 06/11] dt/bindings: Correct clk binding example for PIC32 SDHCI

[Rob Herring]

On Tue, May 17, 2016 at 10:35:55AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding documentation.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 07/11] dt/bindings: Correct clk binding example for PIC32 pinctrl

[Purna Chandra Mandal]

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
index 4b5efa5..29b72e3 100644
--- a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
@@ -34,7 +34,7 @@ pic32_pinctrl: pinctrl@1f801400{
 	#size-cells = <1>;
 	compatible = "microchip,pic32mzda-pinctrl";
 	reg = <0x1f801400 0x400>;
-	clocks = <&PBCLK1>;
+	clocks = <&rootclk PB1CLK>;
 
 	pinctrl_uart2: pinctrl_uart2 {
 		uart2-tx {
-- 
1.8.3.1

Re: [PATCH 07/11] dt/bindings: Correct clk binding example for PIC32 pinctrl

[Rob Herring]

On Tue, May 17, 2016 at 10:35:56AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 07/11] dt/bindings: Correct clk binding example for PIC32 pinctrl

[Linus Walleij]

On Tue, May 17, 2016 at 7:05 AM, Purna Chandra Mandal
<purna.mandal@microchip.com> wrote:

> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
>
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Patch applied to the pinctrl tree with Rob's ACK.

Yours,
Linus Walleij

[PATCH 08/11] dt/bindings: Correct clk binding example for PIC32 serial.

[Purna Chandra Mandal]

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt b/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
index 65b38bf..7a34345 100644
--- a/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
+++ b/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
@@ -20,7 +20,7 @@ Example:
 		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
 			<113 IRQ_TYPE_LEVEL_HIGH>,
 			<114 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&PBCLK2>;
+		clocks = <&rootclk PB2CLK>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_uart1
 				&pinctrl_uart1_cts
-- 
1.8.3.1

Re: [PATCH 08/11] dt/bindings: Correct clk binding example for PIC32 serial.

[Rob Herring]

On Tue, May 17, 2016 at 10:35:57AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 09/11] dt/bindings: Correct clk binding example for PIC32 DMT.

[Purna Chandra Mandal]

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
index 852f694..49485f8 100644
--- a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
@@ -8,12 +8,12 @@ Required properties:
 - compatible: must be "microchip,pic32mzda-dmt".
 - reg: physical base address of the controller and length of memory mapped
   region.
-- clocks: phandle of parent clock (should be &PBCLK7).
+- clocks: phandle of source clk. Should be <&rootclk PB7CLK>.
 
 Example:
 
 	watchdog@1f800a00 {
 		compatible = "microchip,pic32mzda-dmt";
 		reg = <0x1f800a00 0x80>;
-		clocks = <&PBCLK7>;
+		clocks = <&rootclk PB7CLK>;
 	};
-- 
1.8.3.1

Re: [PATCH 09/11] dt/bindings: Correct clk binding example for PIC32 DMT.

[Rob Herring]

On Tue, May 17, 2016 at 10:35:58AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 10/11] dt/bindings: Correct clk binding example for PIC32 WDT.

[Purna Chandra Mandal]

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
index d140103..f03a29a 100644
--- a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
@@ -7,12 +7,12 @@ Required properties:
 - compatible: must be "microchip,pic32mzda-wdt".
 - reg: physical base address of the controller and length of memory mapped
   region.
-- clocks: phandle of source clk. should be <&LPRC> clk.
+- clocks: phandle of source clk. Should be <&rootclk LPRCCLK>.
 
 Example:
 
 	watchdog@1f800800 {
 		compatible = "microchip,pic32mzda-wdt";
 		reg = <0x1f800800 0x200>;
-		clocks = <&LPRC>;
+		clocks = <&rootclk LPRCCLK>;
 	};
-- 
1.8.3.1

Re: [PATCH 10/11] dt/bindings: Correct clk binding example for PIC32 WDT.

[Rob Herring]

On Tue, May 17, 2016 at 10:35:59AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 11/11] dt/bindings: Correct clk binding example for PIC32 gpio.

[Purna Chandra Mandal]

Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
---

 Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt
index ef37528..dd031fc 100644
--- a/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt
@@ -33,7 +33,7 @@ gpio0: gpio0@1f860000 {
 	gpio-controller;
 	interrupt-controller;
 	#interrupt-cells = <2>;
-	clocks = <&PBCLK4>;
+	clocks = <&rootclk PB4CLK>;
 	microchip,gpio-bank = <0>;
 	gpio-ranges = <&pic32_pinctrl 0 0 16>;
 };
-- 
1.8.3.1

Re: [PATCH 11/11] dt/bindings: Correct clk binding example for PIC32 gpio.

[Rob Herring]

On Tue, May 17, 2016 at 10:36:00AM +0530, Purna Chandra Mandal wrote:
> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---
> 
>  Documentation/devicetree/bindings/gpio/microchip,pic32-gpio.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 11/11] dt/bindings: Correct clk binding example for PIC32 gpio.

[Linus Walleij]

On Tue, May 17, 2016 at 7:06 AM, Purna Chandra Mandal
<purna.mandal@microchip.com> wrote:

> Update binding example based on new clock binding scheme.
> [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
>
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>

Patch applied and squashed into the other pic32 patch
with Rob's ACK.

Yours,
Linus Walleij

Re: [PATCH 01/11] clk: microchip: use readl_poll_timeout() in pbclk_set_rate().

[Stephen Boyd]

On 05/17, Purna Chandra Mandal wrote:
> pbclk_set_rate() is using readl_poll_timeout_atomic() even
> though spinlock is released. Fix it by replacing with
> readl_poll_timeout().
> 
> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
> ---

Applied to clk-next

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