[PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[Andreas Färber]

Hello,

This series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
and the Andromeda Box Edge development board.

v2 reuses ARCH_MMP.

Both earlycon and serial are working, but an explicit console=ttyS0,115200n8
is needed; with just "earlycon" and stdout-path the earlycon stops early and
switches to a tty0, long before disabling the bootconsole...

All four CPUs come up, and an initrd can be reached.

However, there are errors about CPUs 1-3 having a zero SYS_CNTFRQ_EL0:

[    0.095812] smp: Bringing up secondary CPUs ...
======pxa1908_pmu_core_pwr_on: mpidr = 0x1
======pxa1908_pmu_core_pwr_on: mpidr = 0x2
======pxa1908_pmu_core_pwr_on: mpidr = 0x3
[    0.133419] Detected VIPT I-cache on CPU1
[    0.133430] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000
[    0.133447] Unsupported CPU feature variation.
...
[    0.133748] CPU1: Booted secondary processor [410fd032]
[    0.165465] Detected VIPT I-cache on CPU2
[    0.165474] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000
[    0.165505] CPU2: Booted secondary processor [410fd032]
[    0.197539] Detected VIPT I-cache on CPU3
[    0.197546] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000
[    0.197573] CPU3: Booted secondary processor [410fd032]
[    0.197625] smp: Brought up 1 node, 4 CPUs
[    0.522514] SMP: Total of 4 processors activated.
[    0.527212] CPU features: detected feature: 32-bit EL0 Support
[    0.533105] CPU: All CPU(s) started at EL2

KVM appears to initialize okay, but was not yet tested with guests.

[    0.865255] kvm [1]: 8-bit VMID
[    0.868401] kvm [1]: IDMAP page: d23000
[    0.872233] kvm [1]: HYP VA range: 800000000000:ffffffffffff
[    0.878262] kvm [1]: Hyp mode initialized successfully
[    0.883429] kvm [1]: vgic-v2@d1dfc000
[    0.887179] kvm [1]: vgic interrupt IRQ1
[    0.891120] kvm [1]: virtual timer IRQ4

One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
around that for UART0 with a fixed-clock.

A 3.14 based tree is available on GitHub acorn-marvell/brillo_pxa_kernel.

Booting required changes to the vendor U-Boot,
cf. https://en.opensuse.org/HCL:AndromedaBoxEdge

https://github.com/afaerber/linux/commits/edge-next

Have a lot of fun!

Cheers,
Andreas

v1 -> v2:
* Add non-DT documentation
* Use ARCH_MMP instead of ARCH_PXA
* Split off Kconfig cleanups per subsystem
* Drop "mrvl,pxa-uart" and instead implement mmp earlycon
* Add some more DT nodes

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Cc: info@andromedabox.org
Cc: devicetree@vger.kernel.org

Andreas Färber (8):
  Documentation: arm: Marvell: Document IAP140
  tty: serial: Suppress deprecated SERIAL_PXA on arm64
  tty: serial: 8250_pxa: Implement mmp earlycon
  sound: soc: pxa: Suppress SND_MMP_SOC for arm64
  ARM64: Prepare Marvell IAP140 aka PXA1908
  Documentation: devicetree: arm: marvell: Document IAP140
  ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge
  ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock

 Documentation/arm/Marvell/README                   |  12 +-
 .../devicetree/bindings/arm/marvell/iap140.txt     |  11 +
 arch/arm64/Kconfig.platforms                       |   7 +
 arch/arm64/boot/dts/marvell/Makefile               |   3 +
 .../boot/dts/marvell/iap140-andromeda-box-edge.dts |  87 ++++++++
 arch/arm64/boot/dts/marvell/iap140.dtsi            | 241 +++++++++++++++++++++
 drivers/tty/serial/8250/8250_pxa.c                 |   1 +
 drivers/tty/serial/Kconfig                         |   2 +-
 sound/soc/pxa/Kconfig                              |   4 +-
 9 files changed, 364 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/marvell/iap140.txt
 create mode 100644 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
 create mode 100644 arch/arm64/boot/dts/marvell/iap140.dtsi

-- 
2.10.2

[PATCH v2 1/8] Documentation: arm: Marvell: Document IAP140

[Andreas Färber]

IAP140 is either based on or was renamed from PXA1908.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new (Thomas)
 
 Documentation/arm/Marvell/README | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/Documentation/arm/Marvell/README b/Documentation/arm/Marvell/README
index b5bb7f5..e9d4873 100644
--- a/Documentation/arm/Marvell/README
+++ b/Documentation/arm/Marvell/README
@@ -243,7 +243,7 @@ PXA 2xx/3xx/93x/95x family
    Linux kernel plat directory: arch/arm/plat-pxa
 
 MMP/MMP2/MMP3 family (communication processor)
------------------------------------------
+----------------------------------------------
 
    Flavors:
         PXA168, a.k.a Armada 168
@@ -295,6 +295,16 @@ MMP/MMP2/MMP3 family (communication processor)
    Linux kernel mach directory: arch/arm/mach-mmp
    Linux kernel plat directory: arch/arm/plat-pxa
 
+MMP ARMv8 family (application processor)
+----------------------------------------
+
+  Flavors:
+        IAP140
+          Product brief: http://www.marvell.com/application-processors/assets/Marvell-IAP140-Platform-Brief-20160601.pdf
+          Core: quad-core ARMv8 Cortex-A53
+
+  Homepage: http://www.marvell.com/application-processors/
+
 Berlin family (Multimedia Solutions)
 -------------------------------------
 
-- 
2.10.2

[PATCH v2 2/8] tty: serial: Suppress deprecated SERIAL_PXA on arm64

[Andreas Färber]

With Marvell IAP140 being enabled as first arm64 MMP platform, don't
make the deprecated SERIAL_PXA option available outside ARM.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: split off
 * Updated for ARCH_MMP
 
 drivers/tty/serial/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 6117ac8..db83085 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -439,7 +439,7 @@ config SERIAL_MPSC_CONSOLE
 
 config SERIAL_PXA
 	bool "PXA serial port support (DEPRECATED)"
-	depends on ARCH_PXA || ARCH_MMP
+	depends on ARCH_PXA || (ARCH_MMP && ARM)
 	select SERIAL_CORE
 	select SERIAL_8250_PXA if SERIAL_8250=y
 	select SERIAL_PXA_NON8250 if !SERIAL_8250=y
-- 
2.10.2

[PATCH v2 3/8] tty: serial: 8250_pxa: Implement mmp earlycon

[Andreas Färber]

There is an early_pxa earlycon available for "mrvl,pxa-uart", but
mmp2.dtsi and soon iap140.dtsi have only "mrvl,mmp-uart". The binding
does not mandate to have the fallback, so add a second earlycon for this
alternative compatible string.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 Note: early_pxa is not documented in kernel-parameters.txt, so not adding
       mmp either for now.
 
 Should early_pxa be renamed to / accompanied by pxa before it gets documented?
 An early_ prefix seems uncommon and redundant, thus not adopting here for mmp.
 
 v2: new
 
 drivers/tty/serial/8250/8250_pxa.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/tty/serial/8250/8250_pxa.c b/drivers/tty/serial/8250/8250_pxa.c
index 4d68731..26ffa04 100644
--- a/drivers/tty/serial/8250/8250_pxa.c
+++ b/drivers/tty/serial/8250/8250_pxa.c
@@ -183,6 +183,7 @@ static int __init early_serial_pxa_setup(struct earlycon_device *device,
 	return early_serial8250_setup(device, NULL);
 }
 OF_EARLYCON_DECLARE(early_pxa, "mrvl,pxa-uart", early_serial_pxa_setup);
+OF_EARLYCON_DECLARE(mmp, "mrvl,mmp-uart", early_serial_pxa_setup);
 #endif
 
 MODULE_AUTHOR("Sergei Ianovich");
-- 
2.10.2

[PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64

[Andreas Färber]

SND_MMP_SOC selects SND_ARM, which is limited to ARM, as well as
MMP_SRAM, which is a non-DT driver in arch/arm/mach-arm/.

Avoid Kconfig warnings by not making this driver available on ARM64.

While at it, tidy the title (Soc -> SoC).

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v2: new
 
 sound/soc/pxa/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 823b5a2..f8e1c06 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -8,8 +8,8 @@ config SND_PXA2XX_SOC
 	  to select the audio interfaces to support below.
 
 config SND_MMP_SOC
-	bool "Soc Audio for Marvell MMP chips"
-	depends on ARCH_MMP
+	bool "SoC Audio for Marvell MMP chips"
+	depends on ARCH_MMP && ARM
 	select MMP_SRAM
 	select SND_SOC_GENERIC_DMAENGINE_PCM
 	select SND_ARM
-- 
2.10.2

Re: [PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 555 bytes --]

On Wed, Feb 22, 2017 at 03:29:24AM +0100, Andreas Färber wrote:

This is patch 4 of 8, what's going on with dependencies here?

Please use subject lines matching the style for the subsystem.  This
makes it easier for people to identify relevant patches.

>  config SND_MMP_SOC
> -	bool "Soc Audio for Marvell MMP chips"
> -	depends on ARCH_MMP
> +	bool "SoC Audio for Marvell MMP chips"
> +	depends on ARCH_MMP && ARM

There are no obvious build time architecture dependencies for this
driver, shouldn't we have an || COMPILE_TEST in here?

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64

[Andreas Färber]

Am 22.02.2017 um 19:47 schrieb Mark Brown:
> On Wed, Feb 22, 2017 at 03:29:24AM +0100, Andreas Färber wrote:
> 
> This is patch 4 of 8, what's going on with dependencies here?

No dependencies on previous patches. 5/8 adds ARCH_MMP to arm64.

It compiled without this (just Kconfig warnings), so this could go
through the appropriate sound tree as a cleanup.

> Please use subject lines matching the style for the subsystem.  This
> makes it easier for people to identify relevant patches.

Should I make it "ASoC: pxa: ..." then? SND_MMP_SOC selects SND_ARM,
which in sound/arm/Kconfig says 'Drivers that are implemented on ASoC
can be found in "ALSA for SoC audio support" section.', which confused
me about whether or not this is an ASoC compliant driver if it selects a
non-ASoC symbol.

>>  config SND_MMP_SOC
>> -	bool "Soc Audio for Marvell MMP chips"
>> -	depends on ARCH_MMP
>> +	bool "SoC Audio for Marvell MMP chips"
>> +	depends on ARCH_MMP && ARM
> 
> There are no obvious build time architecture dependencies for this
> driver, shouldn't we have an || COMPILE_TEST in here?

I'm the wrong person to answer that - the symbol relies on
architecture-specific SND_ARM, and my understanding was that the code
still relies on platform data, therefore it did not seem worthwhile to
just disable inapplicable dependencies such as MMP_SRAM
(arch/arm/mach-mmp/; superseded by DT mmio-sram) or SND_ARM.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64

[Takashi Iwai]

On Thu, 23 Feb 2017 15:11:46 +0100,
Andreas Färber wrote:
> 
> Am 22.02.2017 um 19:47 schrieb Mark Brown:
> > On Wed, Feb 22, 2017 at 03:29:24AM +0100, Andreas Färber wrote:
> > 
> > This is patch 4 of 8, what's going on with dependencies here?
> 
> No dependencies on previous patches. 5/8 adds ARCH_MMP to arm64.
> 
> It compiled without this (just Kconfig warnings), so this could go
> through the appropriate sound tree as a cleanup.
> 
> > Please use subject lines matching the style for the subsystem.  This
> > makes it easier for people to identify relevant patches.
> 
> Should I make it "ASoC: pxa: ..." then? SND_MMP_SOC selects SND_ARM,
> which in sound/arm/Kconfig says 'Drivers that are implemented on ASoC
> can be found in "ALSA for SoC audio support" section.', which confused
> me about whether or not this is an ASoC compliant driver if it selects a
> non-ASoC symbol.

It's a bug that selects SND_ARM there.  I guess this was wrongly taken
from the old example of AC97 ARM SoC code, which was fixed later.
ASoC stuff is basically irrelevant from the legacy sound/arm/*.


thanks,

Takashi

Re: [PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64

[Andreas Färber]

Am 23.02.2017 um 15:24 schrieb Takashi Iwai:
> On Thu, 23 Feb 2017 15:11:46 +0100,
> Andreas Färber wrote:
>> Am 22.02.2017 um 19:47 schrieb Mark Brown:
>>> Please use subject lines matching the style for the subsystem.  This
>>> makes it easier for people to identify relevant patches.
>>
>> Should I make it "ASoC: pxa: ..." then? SND_MMP_SOC selects SND_ARM,
>> which in sound/arm/Kconfig says 'Drivers that are implemented on ASoC
>> can be found in "ALSA for SoC audio support" section.', which confused
>> me about whether or not this is an ASoC compliant driver if it selects a
>> non-ASoC symbol.
> 
> It's a bug that selects SND_ARM there.  I guess this was wrongly taken
> from the old example of AC97 ARM SoC code, which was fixed later.
> ASoC stuff is basically irrelevant from the legacy sound/arm/*.

Thanks, Takashi-san. I'll update as follows then.

diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index f8e1c06..aba7213 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -9,10 +9,9 @@ config SND_PXA2XX_SOC

 config SND_MMP_SOC
        bool "SoC Audio for Marvell MMP chips"
-       depends on ARCH_MMP && ARM
-       select MMP_SRAM
+       depends on ARCH_MMP || COMPILE_TEST
+       select MMP_SRAM if ARM
        select SND_SOC_GENERIC_DMAENGINE_PCM
-       select SND_ARM
        help
          Say Y if you want to add support for codecs attached to
          the MMP SSPA interface.

Okay to do that in one patch or break up into three?

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

[PATCH v2 5/8] ARM64: Prepare Marvell IAP140 aka PXA1908

[Andreas Färber]

Make ARCH_MMP available on arm64, too.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Switched from ARCH_PXA to ARCH_MMP - obsoletes clk and mmp Kconfig changes
 * Split off serial Kconfig cleanup
 
 arch/arm64/Kconfig.platforms | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 129cc5a..c3ae8bc 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -111,6 +111,13 @@ config ARCH_MVEBU
 	   - Armada 7K SoC Family
 	   - Armada 8K SoC Family
 
+config ARCH_MMP
+	bool "Marvell MMP SoC Family"
+	select PINCTRL
+	select PINCTRL_SINGLE
+	help
+	  This enables support for the Marvell MMP family.
+
 config ARCH_QCOM
 	bool "Qualcomm Platforms"
 	select GPIOLIB
-- 
2.10.2

[PATCH v2 6/8] Documentation: devicetree: arm: marvell: Document IAP140

[Andreas Färber]

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Adopted "marvell" vendor prefix (Thomas)
 * Documented Andromeda Box Edge as example
 
 Documentation/devicetree/bindings/arm/marvell/iap140.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/marvell/iap140.txt

diff --git a/Documentation/devicetree/bindings/arm/marvell/iap140.txt b/Documentation/devicetree/bindings/arm/marvell/iap140.txt
new file mode 100644
index 0000000..37c6d92
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell/iap140.txt
@@ -0,0 +1,11 @@
+Marvell IAP140 Device Tree Bindings
+-----------------------------------
+
+Boards using a SoC of the Marvell IAP140 family must carry the following
+root node property:
+
+ - compatible :  must contain "marvell,iap140"
+
+Example:
+
+    compatible = "marvell,andromeda-box-edge", "marvell,iap140";
-- 
2.10.2

Re: [PATCH v2 6/8] Documentation: devicetree: arm: marvell: Document IAP140

[Rob Herring]

On Wed, Feb 22, 2017 at 03:29:26AM +0100, Andreas Färber wrote:
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  v1 -> v2:
>  * Adopted "marvell" vendor prefix (Thomas)
>  * Documented Andromeda Box Edge as example
>  
>  Documentation/devicetree/bindings/arm/marvell/iap140.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/marvell/iap140.txt

Acked-by: Rob Herring <robh@kernel.org>

[PATCH v2 7/8] ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge

[Andreas Färber]

PPI interrupts 11, 10, 9 are guesses, and so are the second two memory
regions of the GIC.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2:
 * Updated for ARCH_MMP, added Makefile comment
 * Adopted "marvell" vendor prefix (Thomas)
 * Disabled smmu in .dtsi, re-enabled in .dts
 * Enabled asram node
 * Added adma, timer, pinctrl nodes
 
 arch/arm64/boot/dts/marvell/Makefile               |   3 +
 .../boot/dts/marvell/iap140-andromeda-box-edge.dts |  80 +++++++
 arch/arm64/boot/dts/marvell/iap140.dtsi            | 241 +++++++++++++++++++++
 3 files changed, 324 insertions(+)
 create mode 100644 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
 create mode 100644 arch/arm64/boot/dts/marvell/iap140.dtsi

diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 3e6ce6c..fa1bf06 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -2,6 +2,9 @@
 dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-dmp.dtb
 dtb-$(CONFIG_ARCH_BERLIN) += berlin4ct-stb.dtb
 
+# MMP SoC Family
+dtb-$(CONFIG_ARCH_MMP) += iap140-andromeda-box-edge.dtb
+
 # Mvebu SoC Family
 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb
diff --git a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
new file mode 100644
index 0000000..0b0b150
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x09000000 0x01000000;
+/memreserve/ 0x0a000000 0x00080000;
+
+#include "iap140.dtsi"
+
+/ {
+	compatible = "marvell,andromeda-box-edge", "marvell,iap140";
+	model = "Andromeda Box Edge";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x40000000>;
+	};
+};
+
+&pmx {
+	pinctrl-single,gpio-range = <&range 55 55 0>,
+	                            <&range 110 32 0>,
+	                            <&range 52 1 0>;
+};
+
+&smmu {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/marvell/iap140.dtsi b/arch/arm64/boot/dts/marvell/iap140.dtsi
new file mode 100644
index 0000000..a0cefa6
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/iap140.dtsi
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2016-2017 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "marvell,iap140";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		smmu: iommu@c0010000 {
+			compatible = "arm,mmu-400";
+			reg = <0x0 0xc0010000 0x0 0x10000>;
+			#global-interrupts = <1>;
+			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+			             <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		adma: dma-controller@d128d800 {
+			compatible = "marvell,adma-1.0";
+			reg = <0x0 0xd128d800 0x0 0x100>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			asram = <&asram>;
+		};
+
+		asram: sram@d12a0000 {
+			compatible = "mmio-sram";
+			reg = <0x0 0xd12a0000 0x0 0x10000>;
+		};
+
+		gic: interrupt-controller@d1df9000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0xd1df9000 0x0 0x1000>,
+			      <0x0 0xd1dfa000 0x0 0x2000>,
+			      <0x0 0xd1dfc000 0x0 0x2000>,
+			      <0x0 0xd1dfe000 0x0 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		apb@d4000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xd4000000 0x0 0x00200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x0 0xd4000000 0x00200000>;
+
+			pdma: dma-controller@0 {
+				compatible = "marvell,pdma-1.0";
+				reg = <0x0 0x10000>;
+				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+				#dma-cells = <2>;
+				#dma-channels = <30>;
+			};
+
+			timer0: timer@14000 {
+				compatible = "mrvl,mmp-timer";
+				reg = <0x14000 0xc8>;
+				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+				             <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			timer1: timer@16000 {
+				compatible = "mrvl,mmp-timer";
+				reg = <0x16000 0xc8>;
+				interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+				             <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			uart0: serial@17000 {
+				compatible = "mrvl,mmp-uart";
+				reg = <0x17000 0x1000>;
+				interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&pdma 21 1>,
+				       <&pdma 22 1>;
+				dma-names = "rx", "tx";
+				status = "disabled";
+			};
+
+			uart1: serial@18000 {
+				compatible = "mrvl,mmp-uart";
+				reg = <0x18000 0x1000>;
+				interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&pdma 23 1>,
+				       <&pdma 24 1>;
+				dma-names = "rx", "tx";
+				status = "disabled";
+			};
+
+			pmx: pinmux@1e000 {
+				compatible = "pinconf-single";
+				reg = <0x1e000 0x330>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				#gpio-range-cells = <3>;
+				ranges;
+
+				#pinctrl-cells = <1>;
+				pinctrl-single,register-width = <32>;
+				pinctrl-single,function-mask = <7>;
+
+				range: gpio-range {
+					#pinctrl-single,gpio-range-cells = <3>;
+				};
+			};
+
+			timer2: timer@1f000 {
+				compatible = "mrvl,mmp-timer";
+				reg = <0x1f000 0xc8>;
+				status = "disabled";
+			};
+
+			uart2: serial@36000 {
+				compatible = "mrvl,mmp-uart";
+				reg = <0x36000 0x1000>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+				dmas = <&pdma 4 1>,
+				       <&pdma 5 1>;
+				dma-names = "rx", "tx";
+				status = "disabled";
+			};
+		};
+
+		axi@d4200000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xd4200000 0x0 0x00200000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x0 0xd4200000 0x00200000>;
+		};
+	};
+};
-- 
2.10.2

[PATCH v2 8/8] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock

[Andreas Färber]

Use a fixed clock to enable ttyS0 output.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 v1 -> v2: unchanged
 
 arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
index 0b0b150..15ad0f3 100644
--- a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
+++ b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts
@@ -63,6 +63,12 @@
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x40000000>;
 	};
+
+	uart0_clk: uart0-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <14740000>;
+		#clock-cells = <0>;
+	};
 };
 
 &pmx {
@@ -77,4 +83,5 @@
 
 &uart0 {
 	status = "okay";
+	clocks = <&uart0_clk>;
 };
-- 
2.10.2

Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[Rob Herring]

On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber <afaerber@suse.de> wrote:
> Hello,
>
> This series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
> and the Andromeda Box Edge development board.
>
> v2 reuses ARCH_MMP.
>
> Both earlycon and serial are working, but an explicit console=ttyS0,115200n8
> is needed; with just "earlycon" and stdout-path the earlycon stops early and
> switches to a tty0, long before disabling the bootconsole...
>
> All four CPUs come up, and an initrd can be reached.
>
> However, there are errors about CPUs 1-3 having a zero SYS_CNTFRQ_EL0:
>
> [    0.095812] smp: Bringing up secondary CPUs ...
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x1
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x2
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x3
> [    0.133419] Detected VIPT I-cache on CPU1
> [    0.133430] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000
> [    0.133447] Unsupported CPU feature variation.
> ...
> [    0.133748] CPU1: Booted secondary processor [410fd032]
> [    0.165465] Detected VIPT I-cache on CPU2
> [    0.165474] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000
> [    0.165505] CPU2: Booted secondary processor [410fd032]
> [    0.197539] Detected VIPT I-cache on CPU3
> [    0.197546] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000
> [    0.197573] CPU3: Booted secondary processor [410fd032]
> [    0.197625] smp: Brought up 1 node, 4 CPUs
> [    0.522514] SMP: Total of 4 processors activated.
> [    0.527212] CPU features: detected feature: 32-bit EL0 Support
> [    0.533105] CPU: All CPU(s) started at EL2
>
> KVM appears to initialize okay, but was not yet tested with guests.
>
> [    0.865255] kvm [1]: 8-bit VMID
> [    0.868401] kvm [1]: IDMAP page: d23000
> [    0.872233] kvm [1]: HYP VA range: 800000000000:ffffffffffff
> [    0.878262] kvm [1]: Hyp mode initialized successfully
> [    0.883429] kvm [1]: vgic-v2@d1dfc000
> [    0.887179] kvm [1]: vgic interrupt IRQ1
> [    0.891120] kvm [1]: virtual timer IRQ4
>
> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
> around that for UART0 with a fixed-clock.

The PXA1928 clock driver should be close to what you need. They are
supposed to be very similar.

> A 3.14 based tree is available on GitHub acorn-marvell/brillo_pxa_kernel.
>
> Booting required changes to the vendor U-Boot,
> cf. https://en.opensuse.org/HCL:AndromedaBoxEdge
>
> https://github.com/afaerber/linux/commits/edge-next
>
> Have a lot of fun!
>
> Cheers,
> Andreas
>
> v1 -> v2:
> * Add non-DT documentation
> * Use ARCH_MMP instead of ARCH_PXA
> * Split off Kconfig cleanups per subsystem
> * Drop "mrvl,pxa-uart" and instead implement mmp earlycon
> * Add some more DT nodes
>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Gregory Clement <gregory.clement@free-electrons.com>
> Cc: info@andromedabox.org
> Cc: devicetree@vger.kernel.org
>
> Andreas Färber (8):
>   Documentation: arm: Marvell: Document IAP140
>   tty: serial: Suppress deprecated SERIAL_PXA on arm64
>   tty: serial: 8250_pxa: Implement mmp earlycon

You should not use the pxa serial driver. AFAICT, it was separate to
add DMA support, but now the base 8250 driver supports DMA. The base
8250 driver works with the PXA1928 and should also work with the
PXA1908.

>   sound: soc: pxa: Suppress SND_MMP_SOC for arm64
>   ARM64: Prepare Marvell IAP140 aka PXA1908
>   Documentation: devicetree: arm: marvell: Document IAP140
>   ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge
>   ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[Andreas Färber]

Hi Rob,

Am 22.02.2017 um 14:34 schrieb Rob Herring:
> On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber <afaerber@suse.de> wrote:
>> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
>> around that for UART0 with a fixed-clock.
> 
> The PXA1928 clock driver should be close to what you need. They are
> supposed to be very similar.

Where do you see that in mainline? Not in drivers/clk/pxa/ at least. I'm
certain the acorn-marvell tree has a PXA1908 clk driver somewhere, too,
I just haven't ported it yet.

>> Andreas Färber (8):
>>   Documentation: arm: Marvell: Document IAP140
>>   tty: serial: Suppress deprecated SERIAL_PXA on arm64
>>   tty: serial: 8250_pxa: Implement mmp earlycon
> 
> You should not use the pxa serial driver. AFAICT, it was separate to
> add DMA support, but now the base 8250 driver supports DMA. The base
> 8250 driver works with the PXA1928 and should also work with the
> PXA1908.

Do you personally have one? I didn't spot a pxa1928 DT in mainline.

So, by my reading both 8250_of.c and 8250_pxa.c list "mrvl,mmp-uart" for
the platform driver. Is that really intentional?

What the early_pxa earlycon does is set the register shift and then
reuse the 8250 core - that looks perfectly valid to me. Are you possibly
mixing that up with the non-8250 pxa serial driver that I am already
suppressing one patch earlier?

While at it, are you aware that we have two drivers, one pxa and one
mmp, that bind to "marvell,pdma-1.0"? That seemed wrong to me, too.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[Andreas Färber]

Am 22.02.2017 um 17:43 schrieb Andreas Färber:
> Hi Rob,
> 
> Am 22.02.2017 um 14:34 schrieb Rob Herring:
>> On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber <afaerber@suse.de> wrote:
>>> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
>>> around that for UART0 with a fixed-clock.
>>
>> The PXA1928 clock driver should be close to what you need. They are
>> supposed to be very similar.
> 
> Where do you see that in mainline? Not in drivers/clk/pxa/ at least. I'm
> certain the acorn-marvell tree has a PXA1908 clk driver somewhere, too,
> I just haven't ported it yet.
> 
>>> Andreas Färber (8):
>>>   Documentation: arm: Marvell: Document IAP140
>>>   tty: serial: Suppress deprecated SERIAL_PXA on arm64
>>>   tty: serial: 8250_pxa: Implement mmp earlycon
>>
>> You should not use the pxa serial driver. AFAICT, it was separate to
>> add DMA support, but now the base 8250 driver supports DMA. The base
>> 8250 driver works with the PXA1928 and should also work with the
>> PXA1908.
> 
> Do you personally have one? I didn't spot a pxa1928 DT in mainline.
> 
> So, by my reading both 8250_of.c and 8250_pxa.c list "mrvl,mmp-uart" for
> the platform driver. Is that really intentional?
> 
> What the early_pxa earlycon does is set the register shift and then
> reuse the 8250 core - that looks perfectly valid to me. Are you possibly
> mixing that up with the non-8250 pxa serial driver that I am already
> suppressing one patch earlier?

Hit send too early: There's also 8250_early.c, but that does not appear
to use the reg-shift property (which is not mentioned in the
mrvl,mmp-uart binding) and thus omap has a custom earlycon driver there,
similar to what is in 8250_pxa.c.

> 
> While at it, are you aware that we have two drivers, one pxa and one
> mmp, that bind to "marvell,pdma-1.0"? That seemed wrong to me, too.
> 
> Regards,
> Andreas
> 


-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer, Jane Smithard, Graham Norton
HRB 21284 (AG Nürnberg)

Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement

[Rob Herring]

On Wed, Feb 22, 2017 at 10:43 AM, Andreas Färber <afaerber@suse.de> wrote:
> Hi Rob,
>
> Am 22.02.2017 um 14:34 schrieb Rob Herring:
>> On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber <afaerber@suse.de> wrote:
>>> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
>>> around that for UART0 with a fixed-clock.
>>
>> The PXA1928 clock driver should be close to what you need. They are
>> supposed to be very similar.
>
> Where do you see that in mainline? Not in drivers/clk/pxa/ at least. I'm
> certain the acorn-marvell tree has a PXA1908 clk driver somewhere, too,
> I just haven't ported it yet.

drivers/clk/mmp/clk-of-pxa1928.c

I ported/rewrote that from Marvell's 3.10 vendor tree.

>>> Andreas Färber (8):
>>>   Documentation: arm: Marvell: Document IAP140
>>>   tty: serial: Suppress deprecated SERIAL_PXA on arm64
>>>   tty: serial: 8250_pxa: Implement mmp earlycon
>>
>> You should not use the pxa serial driver. AFAICT, it was separate to
>> add DMA support, but now the base 8250 driver supports DMA. The base
>> 8250 driver works with the PXA1928 and should also work with the
>> PXA1908.
>
> Do you personally have one? I didn't spot a pxa1928 DT in mainline.

Yes. It never got released and got abandoned. I got several drivers
cleaned up to support it and the clock code in before that happened. I
had a in-progress DRM driver too. I was debugging why some monitors
worked and others didn't when I stopped working on it. I think the
board you are working on has the same ADV7533?

It's all up on my Linaro tree:
https://git.linaro.org/people/rob.herring/linux.git

> So, by my reading both 8250_of.c and 8250_pxa.c list "mrvl,mmp-uart" for
> the platform driver. Is that really intentional?

Humm, well I added support in commit 6ad991b699b4e to of_serial.c and
then it looks like it got copied to 8250_pxa.c recently. Not sure if
that really made sense or not. We should remove one of them.
8250_pxa.c looks fairly pointless to me. Turning a clock on/off in
resume/suspend is already supported by 8250_of.c (which doesn't have
the bug of turning off the console's clock in suspend). The only other
thing is the errata in serial_pxa_dl_write.

> What the early_pxa earlycon does is set the register shift and then
> reuse the 8250 core - that looks perfectly valid to me. Are you possibly
> mixing that up with the non-8250 pxa serial driver that I am already
> suppressing one patch earlier?

The earlycon core already sets up reg-shift for you.

I added earlycon support in commit a4c639b04f301d. I used "ns16650a"
as a fallback compatible string, so there's not an explicit PXA/MMP
compatible string there.

> While at it, are you aware that we have two drivers, one pxa and one
> mmp, that bind to "marvell,pdma-1.0"? That seemed wrong to me, too.

Yeah, it was drivers/tty/serial/pxa.c that I was thinking of. I was
incorrectly thinking 8250_pxa.c was that one.

Rob