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From: remi.denis.courmont@huawei.com
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: [PATCH 1/3] target/arm: keep translation start level unsigned
Date: Fri, 18 Dec 2020 16:33:19 +0200	[thread overview]
Message-ID: <20201218143321.102872-1-remi.denis.courmont@huawei.com> (raw)
In-Reply-To: <7884934.NyiUUSuA9g@basile.remlab.net>

From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>

Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
---
 target/arm/helper.c | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index df195c314c..b927e53ab0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10821,17 +10821,12 @@ do_fault:
  * Returns true if the suggested S2 translation parameters are OK and
  * false otherwise.
  */
-static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
+static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, uint32_t level,
                                int inputsize, int stride)
 {
     const int grainsize = stride + 3;
     int startsizecheck;
 
-    /* Negative levels are never allowed.  */
-    if (level < 0) {
-        return false;
-    }
-
     startsizecheck = inputsize - ((3 - level) * stride + grainsize);
     if (startsizecheck < 1 || startsizecheck > stride + 4) {
         return false;
@@ -10856,6 +10851,9 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
             if (level == 0 && pamax <= 42) {
                 return false;
             }
+            if (level == 3) {
+                return false;
+            }
             break;
         default:
             g_assert_not_reached();
@@ -10871,7 +10869,7 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool is_aa64, int level,
         /* AArch32 only supports 4KB pages. Assert on that.  */
         assert(stride == 9);
 
-        if (level == 0) {
+        if (level == 0 || level >= 3) {
             return false;
         }
     }
@@ -11203,7 +11201,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address,
 
         if (!aarch64 || stride == 9) {
             /* AArch32 or 4KB pages */
-            startlevel = 2 - sl0;
+            startlevel = (2 - sl0) & 3;
         } else {
             /* 16KB or 64KB pages */
             startlevel = 3 - sl0;
-- 
2.29.2



  reply	other threads:[~2020-12-18 14:38 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-18 14:32 [RFC][PATCH 0/3] ARMv8.4-TTST extension Rémi Denis-Courmont
2020-12-18 14:33 ` remi.denis.courmont [this message]
2020-12-30 22:10   ` [PATCH 1/3] target/arm: keep translation start level unsigned Richard Henderson
2020-12-30 22:38     ` Richard Henderson
2020-12-31  9:59       ` Rémi Denis-Courmont
2020-12-31 16:43         ` Richard Henderson
2021-01-07 19:55           ` Peter Maydell
2020-12-31  9:55     ` Rémi Denis-Courmont
2020-12-31 16:54       ` Richard Henderson
2020-12-18 14:33 ` [PATCH 2/3] target/arm: ARMv8.4-TTST extension remi.denis.courmont
2020-12-30 22:36   ` Richard Henderson
2020-12-18 14:33 ` [PATCH 3/3] target/arm: enable Small Translation tables in max CPU remi.denis.courmont
2020-12-30 22:37   ` Richard Henderson

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