From: remi.denis.courmont@huawei.com
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: [PATCH 3/3] target/arm: enable Small Translation tables in max CPU
Date: Fri, 18 Dec 2020 16:33:21 +0200 [thread overview]
Message-ID: <20201218143321.102872-3-remi.denis.courmont@huawei.com> (raw)
In-Reply-To: <7884934.NyiUUSuA9g@basile.remlab.net>
From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
---
target/arm/cpu64.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 3dc2f5da6c..8d3473db3e 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -670,6 +670,7 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64mmfr2;
t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1);
t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */
+ t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* TTST */
cpu->isar.id_aa64mmfr2 = t;
/* Replicate the same data to the 32-bit id registers. */
--
2.29.2
next prev parent reply other threads:[~2020-12-18 14:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-18 14:32 [RFC][PATCH 0/3] ARMv8.4-TTST extension Rémi Denis-Courmont
2020-12-18 14:33 ` [PATCH 1/3] target/arm: keep translation start level unsigned remi.denis.courmont
2020-12-30 22:10 ` Richard Henderson
2020-12-30 22:38 ` Richard Henderson
2020-12-31 9:59 ` Rémi Denis-Courmont
2020-12-31 16:43 ` Richard Henderson
2021-01-07 19:55 ` Peter Maydell
2020-12-31 9:55 ` Rémi Denis-Courmont
2020-12-31 16:54 ` Richard Henderson
2020-12-18 14:33 ` [PATCH 2/3] target/arm: ARMv8.4-TTST extension remi.denis.courmont
2020-12-30 22:36 ` Richard Henderson
2020-12-18 14:33 ` remi.denis.courmont [this message]
2020-12-30 22:37 ` [PATCH 3/3] target/arm: enable Small Translation tables in max CPU Richard Henderson
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