From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, beata.michalska@linaro.org
Subject: Re: [Qemu-devel] [PATCH for-4.2 17/24] target/arm: Update arm_mmu_idx for VHE
Date: Thu, 25 Jul 2019 17:01:28 +0100 [thread overview]
Message-ID: <87tvbayug7.fsf@linaro.org> (raw)
In-Reply-To: <20190719210326.15466-18-richard.henderson@linaro.org>
Richard Henderson <richard.henderson@linaro.org> writes:
> This covers initial generation in arm_mmu_idx, and reconstruction
> in core_to_arm_mmu_idx. As a conseqeuence, we also need a bit in
> TBFLAGS in order to make the latter reliable.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
> ---
> target/arm/cpu.h | 2 ++
> target/arm/helper.c | 42 +++++++++++++++++++++++++++++++-----------
> 2 files changed, 33 insertions(+), 11 deletions(-)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 4b537c4613..7310adfd9b 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -3158,6 +3158,8 @@ FIELD(TBFLAG_ANY, PSTATE_SS, 26, 1)
> /* Target EL if we take a floating-point-disabled exception */
> FIELD(TBFLAG_ANY, FPEXC_EL, 24, 2)
> FIELD(TBFLAG_ANY, BE_DATA, 23, 1)
> +/* For A profile only, if EL2 is AA64 and HCR_EL2.E2H is set. */
> +FIELD(TBFLAG_ANY, E2H, 22, 1)
>
> /* Bit usage when in AArch32 state: */
> FIELD(TBFLAG_A32, THUMB, 0, 1)
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 2d5658f9e3..54c328b844 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11250,21 +11250,29 @@ int fp_exception_el(CPUARMState *env, int cur_el)
>
> ARMMMUIdx core_to_arm_mmu_idx(CPUARMState *env, int mmu_idx)
> {
> + bool e2h;
> +
> if (arm_feature(env, ARM_FEATURE_M)) {
> return mmu_idx | ARM_MMU_IDX_M;
> }
>
> mmu_idx |= ARM_MMU_IDX_A;
> + if (mmu_idx & ARM_MMU_IDX_S) {
> + return mmu_idx;
> + }
> +
> + e2h = (env->cp15.hcr_el2 & HCR_E2H) != 0;
> + if (!arm_el_is_aa64(env, 2)) {
> + e2h = false;
> + }
> +
> switch (mmu_idx) {
> case ARMMMUIdx_E0:
> - return ARMMMUIdx_EL10_0;
> + return e2h ? ARMMMUIdx_EL20_0 : ARMMMUIdx_EL10_0;
> case ARMMMUIdx_E1:
> return ARMMMUIdx_EL10_1;
> case ARMMMUIdx_E2:
> - case ARMMMUIdx_SE0:
> - case ARMMMUIdx_SE1:
> - case ARMMMUIdx_SE3:
> - return mmu_idx;
> + return e2h ? ARMMMUIdx_EL20_2 : ARMMMUIdx_E2;
> default:
> g_assert_not_reached();
> }
> @@ -11292,24 +11300,28 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate)
>
> ARMMMUIdx arm_mmu_idx(CPUARMState *env)
> {
> + bool e2h, sec;
> int el;
>
> if (arm_feature(env, ARM_FEATURE_M)) {
> return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);
> }
>
> + sec = arm_is_secure_below_el3(env);
> + e2h = (env->cp15.hcr_el2 & HCR_E2H) != 0;
> + if (!arm_el_is_aa64(env, 2)) {
> + e2h = false;
> + }
> +
> el = arm_current_el(env);
> switch (el) {
> case 0:
> - /* TODO: ARMv8.1-VHE */
> + return sec ? ARMMMUIdx_SE0 : e2h ? ARMMMUIdx_EL20_0 : ARMMMUIdx_EL10_0;
> case 1:
> - return (arm_is_secure_below_el3(env)
> - ? ARMMMUIdx_SE0 + el
> - : ARMMMUIdx_EL10_0 + el);
> + return sec ? ARMMMUIdx_SE1 : ARMMMUIdx_EL10_1;
> case 2:
> - /* TODO: ARMv8.1-VHE */
> /* TODO: ARMv8.4-SecEL2 */
> - return ARMMMUIdx_E2;
> + return e2h ? ARMMMUIdx_EL20_2 : ARMMMUIdx_E2;
> case 3:
> return ARMMMUIdx_SE3;
> default:
> @@ -11421,6 +11433,14 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>
> flags = FIELD_DP32(flags, TBFLAG_ANY, MMUIDX, arm_to_core_mmu_idx(mmu_idx));
>
> + /*
> + * Include E2H in TBFLAGS so that core_to_arm_mmu_idx can
> + * reliably determine E1&0 vs E2&0 regimes.
> + */
> + if (arm_el_is_aa64(env, 2) && (env->cp15.hcr_el2 & HCR_E2H)) {
> + flags = FIELD_DP32(flags, TBFLAG_ANY, E2H, 1);
> + }
> +
> /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine
> * states defined in the ARM ARM for software singlestep:
> * SS_ACTIVE PSTATE.SS State
--
Alex Bennée
next prev parent reply other threads:[~2019-07-25 16:02 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-19 21:03 [Qemu-devel] [PATCH for-4.2 00/24] target/arm: Implement ARMv8.1-VHE Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 01/24] cputlb: Add tlb_set_asid_for_mmuidx Richard Henderson
2019-07-22 9:53 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 02/24] cputlb: Add tlb_flush_asid_by_mmuidx and friends Richard Henderson
2019-07-22 10:04 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 03/24] target/arm: Install ASIDs for long-form from EL1 Richard Henderson
2019-07-22 15:28 ` Alex Bennée
2019-07-22 15:48 ` Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 04/24] target/arm: Install ASIDs for short-form " Richard Henderson
2019-07-24 11:47 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 05/24] target/arm: Install ASIDs for EL2 Richard Henderson
2019-07-24 11:49 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 06/24] target/arm: Define isar_feature_aa64_vh Richard Henderson
2019-07-24 12:59 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 07/24] target/arm: Enable HCR_E2H for VHE Richard Henderson
2019-07-24 13:01 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 08/24] target/arm: Add CONTEXTIDR_EL2 Richard Henderson
2019-07-24 13:57 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 09/24] target/arm: Add TTBR1_EL2 Richard Henderson
2019-07-24 14:12 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 10/24] target/arm: Update CNTVCT_EL0 for VHE Richard Henderson
2019-07-24 14:47 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 11/24] target/arm: Add the hypervisor virtual counter Richard Henderson
2019-07-24 20:05 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 12/24] target/arm: Add VHE system register redirection and aliasing Richard Henderson
2019-07-25 14:01 ` Alex Bennée
2019-07-25 14:24 ` Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 13/24] target/arm: Split out vae1_tlbmask, vmalle1_tlbmask Richard Henderson
2019-07-25 14:02 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 14/24] target/arm: Simplify tlb_force_broadcast alternatives Richard Henderson
2019-07-25 14:08 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 15/24] target/arm: Reorganize ARMMMUIdx Richard Henderson
2019-07-25 15:57 ` Alex Bennée
2019-07-25 18:18 ` Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 16/24] target/arm: Add regime_has_2_ranges Richard Henderson
2019-07-25 15:59 ` Alex Bennée
2019-07-25 18:28 ` Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 17/24] target/arm: Update arm_mmu_idx for VHE Richard Henderson
2019-07-25 16:01 ` Alex Bennée [this message]
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 18/24] target/arm: Update arm_sctlr " Richard Henderson
2019-07-25 16:02 ` Alex Bennée
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 19/24] target/arm: Install asids for E2&0 translation regime Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 20/24] target/arm: Flush tlbs " Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 21/24] target/arm: Update arm_phys_excp_target_el for TGE Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 22/24] target/arm: Update regime_is_user for EL2&0 Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 23/24] target/arm: Update {fp, sve}_exception_el for VHE Richard Henderson
2019-07-19 21:03 ` [Qemu-devel] [PATCH for-4.2 24/24] target/arm: Enable ARMv8.1-VHE in -cpu max Richard Henderson
2019-07-22 7:31 ` [Qemu-devel] [PATCH for-4.2 00/24] target/arm: Implement ARMv8.1-VHE Alex Bennée
2019-07-22 9:37 ` Alex Bennée
2019-07-22 15:10 ` Richard Henderson
2019-07-25 16:15 ` Alex Bennée
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